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Author SHA1 Message Date
Eli Friedman
97233814a0 Make some of the fast-isel tests actually test fast-isel (and fix test failures). 
llvm-svn: 131510
 2011-05-18 00:00:10 +00:00
Devang Patel
b75e746499 Preseve line numbers while simplifying CFG. 
llvm-svn: 131508
 2011-05-17 23:29:05 +00:00
Cameron Zwarich
ed470705c0 Actually, the address operand of the Thumb2 LDREX / STREX instructions *can* 
take r13, so we can just make it a GPR. This fixes PR8825.

llvm-svn: 131507
 2011-05-17 23:26:20 +00:00
Cameron Zwarich
15807bac51 Correct a minor problem with the Thumb2 LDREX and STREX instruction encodings. They 
were marked as taking a tGPR when in reality they take an rGPR.

llvm-svn: 131506
 2011-05-17 23:11:12 +00:00
Bill Wendling
f4cb799615 Conditionalize the format of the GCOV files by target type. Darwin uses the 4.2 
format.

llvm-svn: 131503
 2011-05-17 23:05:13 +00:00
Eli Friedman
ade6f78867 Make fast-isel miss counting in -stats and -fast-isel-verbose take terminators into account; since there are many fewer isel misses with recent changes, misses caused by terminators are more significant. 
llvm-svn: 131502
 2011-05-17 23:02:10 +00:00
Dan Gohman
834a63625d Misc. code cleanups. 
llvm-svn: 131497
 2011-05-17 22:22:52 +00:00
Dan Gohman
5d23a937f7 Misc. code cleanups. 
llvm-svn: 131495
 2011-05-17 22:20:36 +00:00
Stuart Hastings
719cee1aa8 X86 pmovsx/pmovzx ignore the upper half of their inputs. 
rdar://problem/6945110

llvm-svn: 131493
 2011-05-17 22:13:31 +00:00
Tanya Lattner
7145d69427 vrev is incorrectly defined in the perfect shuffle table. The ordering is backwards (should be 0x3210 versus 0x1032) which exposed a bug when doing a shuffle on a 4xi16. I've attached a test case. 
llvm-svn: 131488
 2011-05-17 20:48:40 +00:00
Devang Patel
b7b53e9a24 Preserve line number information. 
llvm-svn: 131482
 2011-05-17 20:00:02 +00:00
Devang Patel
9a0301219b Set debug loc for new load instruction. 
llvm-svn: 131481
 2011-05-17 19:43:38 +00:00
Devang Patel
8a2b06e577 Preserve line number information. 
llvm-svn: 131480
 2011-05-17 19:43:06 +00:00
Galina Kistanova
96a3ce9a6f Move test for appropriate directory. 
llvm-svn: 131477
 2011-05-17 19:06:43 +00:00
Mon P Wang
602defb22e Enable autodetect of popcnt 
llvm-svn: 131476
 2011-05-17 18:33:37 +00:00
Jim Grosbach
5b691ebabf Frame indices are signed. Update MachineOperand methods accordingly. 
llvm-svn: 131475
 2011-05-17 18:29:21 +00:00
Eli Friedman
ba315a4fcc Add x86 fast-isel for calls returning first-class aggregates. rdar://9435872. 
This is r131438 with a couple small fixes.

llvm-svn: 131474
 2011-05-17 18:29:03 +00:00
Eli Friedman
42d94ce561 Clean up the mess created by r131467+r131469. 
llvm-svn: 131471
 2011-05-17 18:02:22 +00:00
Stuart Hastings
581113d8a0 Revert 131467 due to buildbot complaint. 
llvm-svn: 131469
 2011-05-17 16:59:46 +00:00
Stuart Hastings
a2509a7ec3 Fix an obscure issue in X86_64 parameter passing: if a tiny byval is 
passed as the fifth parameter, insure it's passed correctly (in R9).
rdar://problem/6920088

llvm-svn: 131467
 2011-05-17 16:45:55 +00:00
Jakob Stoklund Olesen
6645e60d56 Tweak cross-class coalescing to be more aggressive when the target class is small. 
The greedy register allocator has live range splitting and register class
inflation, so it can actually fully undo this join, including restoring the
original register classes.

We still don't want to do this for long live ranges, mostly because of the high
register pressure of there are many constrained live ranges overlapping.

llvm-svn: 131466
 2011-05-17 16:38:37 +00:00
Rafael Espindola
d086472933 Don't include information about the build into the information returned by 
getHostTriple. This fixes a 32 bit clang running on a 64 bit ubuntu.

llvm-svn: 131463
 2011-05-17 15:26:34 +00:00
Nadav Rotem
1b263b575b Fix a bug in PerformEXTRACT_VECTOR_ELTCombine. The code created an ADD SDNode 
with two different types, in cases where the index and the ptr had different
types.

llvm-svn: 131461
 2011-05-17 08:31:57 +00:00
Eric Christopher
d613c05f26 Update comment. 
llvm-svn: 131459
 2011-05-17 08:16:14 +00:00
Eric Christopher
c03ef7ebb3 Support XOR and AND optimization with no return value. 
Finishes off rdar://8470697

llvm-svn: 131458
 2011-05-17 08:10:18 +00:00
Eric Christopher
f81a665961 Couple less magic numbers. 
llvm-svn: 131457
 2011-05-17 07:50:41 +00:00
Eric Christopher
dc12267689 Make this code a little less magic number laden. 
llvm-svn: 131456
 2011-05-17 07:47:55 +00:00
Chris Lattner
294ec479fb add a note 
llvm-svn: 131455
 2011-05-17 07:22:33 +00:00
Stuart Hastings
d3595bfb53 Drop lli, revise test. 
llvm-svn: 131452
 2011-05-17 02:38:59 +00:00
Eli Friedman
3aa2fe389f Back out r131444 and r131438; they're breaking nightly tests. I'll look into 
it more tomorrow.

llvm-svn: 131451
 2011-05-17 02:36:59 +00:00
Eli Friedman
410094a937 Fix test. 
llvm-svn: 131444
 2011-05-17 00:39:14 +00:00
Evan Cheng
24322e6f0a Add target triple so test doesn't fail on Windows machines. 
llvm-svn: 131439
 2011-05-17 00:15:58 +00:00
Eli Friedman
8c4de16d2b Add x86 fast-isel for calls returning first-class aggregates. rdar://9435872. 
llvm-svn: 131438
 2011-05-17 00:13:47 +00:00
Owen Anderson
ba8b3af7d8 @llvm.lifetime.begin acts as a load, not @llvm.lifetime.end. 
llvm-svn: 131437
 2011-05-17 00:05:49 +00:00
Jakob Stoklund Olesen
16f11212fc Teach LiveInterval::isZeroLength about null SlotIndexes. 
When instructions are deleted, they leave tombstone SlotIndex entries.
The isZeroLength method should ignore these null indexes.

This causes RABasic to sometimes spill a callee-saved register in the
abi-isel.ll test, so don't run that test with -regalloc=basic.  Prioritizing
register allocation according to spill weight can cause more registers to be
used.

llvm-svn: 131436
 2011-05-16 23:50:05 +00:00
Jim Grosbach
d7352e9b02 Kill some dead code. 
llvm-svn: 131431
 2011-05-16 22:24:07 +00:00
Dan Gohman
9a55240376 Delete unused variables. 
llvm-svn: 131430
 2011-05-16 22:19:54 +00:00
Dan Gohman
9ea3bcc685 Trim #includes. 
llvm-svn: 131429
 2011-05-16 22:14:50 +00:00
Dan Gohman
2d7dc7849f Fix whitespace and 80-column violations. 
llvm-svn: 131428
 2011-05-16 22:09:53 +00:00
Devang Patel
8cf3c94ae5 There is no need to force DebugLoc on a PHI at this point. 
llvm-svn: 131427
 2011-05-16 22:05:03 +00:00
Jim Grosbach
59a8c1aa5b Track how many insns fast-isel successfully selects as well as how many it 
misses.

llvm-svn: 131426
 2011-05-16 21:51:07 +00:00
Eli Friedman
23e7691f59 Remove dead code. Fix associated test to use FileCheck. 
llvm-svn: 131424
 2011-05-16 21:28:22 +00:00
Devang Patel
9f871794b6 Preserve debug info for unused zero extended boolean argument. 
Radar 9422775.

llvm-svn: 131422
 2011-05-16 21:24:05 +00:00
Charles Davis
173b0d324a Add a method I forgot in the last commit. Don't worry, this one passed 
self-host :).

llvm-svn: 131421
 2011-05-16 21:13:58 +00:00
Eli Friedman
cb60e2293f Make fast-isel work correctly s/uadd.with.overflow intrinsics. 
llvm-svn: 131420
 2011-05-16 21:06:17 +00:00
Eli Friedman
bd237ec411 Fix silly typo. 
llvm-svn: 131419
 2011-05-16 20:34:53 +00:00
Eli Friedman
5f1b7e4153 Basic fast-isel of extractvalue. Not too helpful on its own, given the IR clang generates for cases like this, but it should become more useful soon. 
llvm-svn: 131417
 2011-05-16 20:27:46 +00:00
Nick Lewycky
441a5d42ed Fix errors in this llvm ir example. 
llvm-svn: 131416
 2011-05-16 19:29:30 +00:00
Jason W Kim
4b3c43cf90 Add a FIXME reminder to remove ForceARMElfPIC switch. 
llvm-svn: 131411
 2011-05-16 16:35:21 +00:00
Rafael Espindola
e0b15205c1 sets bit 0 of the function address of thumb function in .symtab 
("T is 1 if the target symbol S has type STT_FUNC and the
symbol addresses a Thumb instruction ;it is 0 otherwise."
from "ELF for the ARM Architecture" 4.7.1.2)

Patch by Koan-Sin Tan!

llvm-svn: 131406
 2011-05-16 16:17:21 +00:00