Andrew Lenharth
9812806d03
Add immediate forms of cmov and remove some cruft
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llvm-svn: 25882
2006-02-01 19:37:33 +00:00
Nate Begeman
0be60963bd
Fix some of the stuff in the PPC README file, and clean up legalization
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of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.
llvm-svn: 25875
2006-02-01 07:19:44 +00:00
Evan Cheng
f115c17f23
Allow the specification of explicit alignments for constant pool entries.
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llvm-svn: 25855
2006-01-31 22:23:14 +00:00
Chris Lattner
ca5c2d7a4c
Update alpha to reflect recent constantfp legalize changes. It's not clear
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why all this code isn't autogenerated. :(
llvm-svn: 25770
2006-01-29 06:25:22 +00:00
Chris Lattner
7a06abe72b
cmovle != cmovlt
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llvm-svn: 25761
2006-01-29 03:47:30 +00:00
Nate Begeman
87c2c0e66b
Implement Promote for VAARG, and allow it to be custom promoted for people
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who don't want the default behavior (Alpha).
llvm-svn: 25726
2006-01-28 03:14:31 +00:00
Chris Lattner
2d4f83eaaf
Switch to AlphaISD::CALL instead of ISD::CALL
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llvm-svn: 25718
2006-01-27 23:39:00 +00:00
Evan Cheng
77885c204d
Subtarget feature can now set any variable to any value
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llvm-svn: 25678
2006-01-27 08:09:42 +00:00
Chris Lattner
20d4194a0d
PHI and INLINEASM are now built-in instructions provided by Target.td
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llvm-svn: 25674
2006-01-27 01:46:15 +00:00
Andrew Lenharth
23afe2f288
minor renaming
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llvm-svn: 25640
2006-01-26 03:24:15 +00:00
Andrew Lenharth
ad88ba7c98
allow R28 to be used for frame calculations without entirely removing it from circulation
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llvm-svn: 25639
2006-01-26 03:22:07 +00:00
Andrew Lenharth
084c16fe59
oops
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llvm-svn: 25623
2006-01-25 23:33:32 +00:00
Andrew Lenharth
01e5b9e862
forgot one
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llvm-svn: 25620
2006-01-25 22:28:07 +00:00
Andrew Lenharth
d932b627f7
make things compile again
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llvm-svn: 25614
2006-01-25 21:54:38 +00:00
Nate Begeman
c29fac7fce
First part of bug 680:
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Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.
llvm-svn: 25606
2006-01-25 18:21:52 +00:00
Andrew Lenharth
3b1babbf44
maintaining stackpointer alignment. Perhaps it doesn't matter
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llvm-svn: 25592
2006-01-25 01:51:08 +00:00
Andrew Lenharth
757829acec
bye bye Pattern ISEL
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llvm-svn: 25553
2006-01-23 21:56:07 +00:00
Andrew Lenharth
f7d549848c
added stores to lsmark
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llvm-svn: 25552
2006-01-23 21:51:33 +00:00
Andrew Lenharth
85b5ef30e5
fix up more lsmark stuff
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llvm-svn: 25550
2006-01-23 21:23:26 +00:00
Andrew Lenharth
b7a4322232
yea, lowering this stuff will basically work
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llvm-svn: 25549
2006-01-23 20:59:50 +00:00
Chris Lattner
aafc339b4e
Add explicit #includes of <iostream>
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llvm-svn: 25515
2006-01-22 23:41:00 +00:00
Andrew Lenharth
96520cb68d
typo
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llvm-svn: 25464
2006-01-19 21:10:38 +00:00
Andrew Lenharth
9abecccdcb
nasty nasty patterns
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llvm-svn: 25463
2006-01-19 20:49:37 +00:00
Andrew Lenharth
b2671cf884
fix short immediate loads
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llvm-svn: 25371
2006-01-16 21:41:39 +00:00
Andrew Lenharth
87cf023175
stack and rpcc
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llvm-svn: 25369
2006-01-16 21:22:38 +00:00
Andrew Lenharth
0f185bc2ee
Friendly names
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llvm-svn: 25364
2006-01-16 19:53:25 +00:00
Nate Begeman
85b2dc0c4e
bswap implementation
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llvm-svn: 25312
2006-01-14 03:14:10 +00:00
Andrew Lenharth
e591830a97
make DAG isel the default
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llvm-svn: 25282
2006-01-13 18:49:47 +00:00
Chris Lattner
80fed2d66e
expand unsupported stacksave/stackrestore nodes
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llvm-svn: 25272
2006-01-13 02:42:53 +00:00
Nate Begeman
cff96008ac
Add bswap, rotl, and rotr nodes
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Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl
Targets should add rotl/rotr patterns if they have them
llvm-svn: 25222
2006-01-11 21:21:00 +00:00
Andrew Lenharth
09447d44ac
this pattern was bogus
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llvm-svn: 25197
2006-01-11 03:33:06 +00:00
Andrew Lenharth
0dd7d82ec6
Int immediate loading fix
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llvm-svn: 25182
2006-01-10 19:12:47 +00:00
Andrew Lenharth
58e26e2c4b
proper branch not equal sequence
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llvm-svn: 25159
2006-01-09 19:49:58 +00:00
Andrew Lenharth
193ef655ed
make 0 codegen much better
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llvm-svn: 25131
2006-01-06 19:41:51 +00:00
Chris Lattner
0bbcba6cff
unbreak the build, these are now in TargetSelectionDAG.td
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llvm-svn: 25109
2006-01-05 04:48:15 +00:00
Jim Laskey
41b3ee3c4f
Had expand logic backward.
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llvm-svn: 25105
2006-01-05 01:47:43 +00:00
Jim Laskey
5eddaee9f3
Added initial support for DEBUG_LABEL allowing debug specific labels to be
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inserted in the code.
llvm-svn: 25104
2006-01-05 01:25:28 +00:00
Andrew Lenharth
b4102c0250
typeo
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llvm-svn: 25060
2006-01-02 21:15:53 +00:00
Chris Lattner
9f51967a78
Remove a 'using namespace std'.
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llvm-svn: 25059
2006-01-01 22:20:31 +00:00
Andrew Lenharth
33a683c939
Move brcond over and fix some imm patterns. This may be the last change before changing the default alpha isel.
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llvm-svn: 25057
2006-01-01 22:16:14 +00:00
Andrew Lenharth
1f84cd6920
clean this function up some
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llvm-svn: 25055
2006-01-01 22:13:54 +00:00
Andrew Lenharth
3441657fb4
improve constant loading. Still sucks, but oh well
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llvm-svn: 25047
2005-12-30 02:30:02 +00:00
Andrew Lenharth
13a01d794b
let us get some do what I meant not what I said stuff checked in. You would think the alpha backend would be 64bit clean
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llvm-svn: 25040
2005-12-29 01:06:12 +00:00
Andrew Lenharth
b87ac716bc
Fix up immediate handling
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llvm-svn: 25039
2005-12-29 00:50:08 +00:00
Andrew Lenharth
bea3ab432b
Restore some happiness to the JIT
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llvm-svn: 25026
2005-12-27 06:25:50 +00:00
Andrew Lenharth
b48bdd4aae
Fix alpha regressions.
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llvm-svn: 25025
2005-12-27 03:53:58 +00:00
Evan Cheng
231b11ba87
Added field noResults to Instruction.
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Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.
llvm-svn: 25017
2005-12-26 09:11:45 +00:00
Andrew Lenharth
f8a6d19367
add br pattern, unify JSR and BSR ISel instrs, and add BSR support for DAG
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llvm-svn: 25011
2005-12-25 17:36:48 +00:00
Andrew Lenharth
9e8f45d185
All that just to lower div and rem
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llvm-svn: 25008
2005-12-25 01:34:27 +00:00
Andrew Lenharth
1e6795bc0c
All addressing modes are now exposed. The only remaining relocated forms
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are for function prologue.
TODO: move external symbols over to using RelLit.
: have a pattern that matches constpool|globaladdr
: have a pattern that matches (add x imm) -> x, imm or (...) -> ..., 0
llvm-svn: 25003
2005-12-24 08:29:32 +00:00