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Author SHA1 Message Date
Evan Cheng
99b25c827c High bits of movmskp{s|d} and pmovmskb are known zero. rdar://10247336 
llvm-svn: 141371
 2011-10-07 17:21:44 +00:00
Bob Wilson
b55a64ae72 Reenable tail calls for iOS 5.0 and later. 
llvm-svn: 141370
 2011-10-07 17:17:49 +00:00
Bob Wilson
d8856e17fe Reenable use of divmod compiler_rt functions for iOS 5.0 and later. 
llvm-svn: 141368
 2011-10-07 16:59:21 +00:00
Matt Beaumont-Gay
92f76e7901 Move default to top of switch 
llvm-svn: 141366
 2011-10-07 16:27:01 +00:00
Anton Korobeynikov
0944a4c5cc Peephole optimization for ABS on ARM. 
Patch by Ana Pazos!

llvm-svn: 141365
 2011-10-07 16:15:08 +00:00
Duncan Sands
559ef2f491 Teach GVN to also propagate switch cases. For example, in this code 
switch (n) {
    case 27:
      do_something(x);
    ...
  }
the call do_something(x) will be replaced with do_something(27).  In
gcc-as-one-big-file this results in the removal of about 500 lines of
bitcode (about 0.02%), so has about 1/10 of the effect of propagating
branch conditions.

llvm-svn: 141360
 2011-10-07 08:29:06 +00:00
Craig Topper
761bf0e7d3 Add X86 disassembler support for RDFSBASE, RDGSBASE, WRFSBASE, and WRGSBASE. 
llvm-svn: 141358
 2011-10-07 07:02:24 +00:00
Andrew Trick
276ecf218a PostRA scheduler fix. Clear stale loop dependencies. 
Fixes <rdar://problem/10235725>

llvm-svn: 141357
 2011-10-07 06:33:09 +00:00
Andrew Trick
7eeb88cd98 whitespace 
llvm-svn: 141356
 2011-10-07 06:27:02 +00:00
Craig Topper
71e09ffe7b Add X86 disassembler support for XSAVE, XRSTOR, and XSAVEOPT. 
llvm-svn: 141354
 2011-10-07 05:53:50 +00:00
Craig Topper
f083691b6d Revert part of r141274. Only need to change encoding for xchg %eax, %eax in 64-bit mode. This is because in 64-bit mode xchg %eax, %eax implies zeroing the upper 32-bits of RAX which makes it not a NOP. In 32-bit mode using NOP encoding is fine. 
llvm-svn: 141353
 2011-10-07 05:35:38 +00:00
Bill Wendling
5492d7a175 Use the correct vreg here. 
llvm-svn: 141342
 2011-10-06 23:41:14 +00:00
Bill Wendling
e34c65724b Generate the dispatch code for a 'thumb' function. This is very similar to the 
others. They take the call site value. Determine if it's a proper value. And
then jumps to the correct call site via a jump table.

llvm-svn: 141341
 2011-10-06 23:37:36 +00:00
Owen Anderson
dc57f29896 Fix the check for nested IT instructions in the disassembler. We need to perform the check before adding the Thumb predicate, which pops on entry off the ITBlock queue. 
llvm-svn: 141339
 2011-10-06 23:33:11 +00:00
Eli Friedman
4d63ca106a Remove the old atomic instrinsics. autoupgrade functionality is included with this patch. 
llvm-svn: 141333
 2011-10-06 23:20:49 +00:00
Bill Wendling
82b6f24ee4 Generate the dispatch table for ARM mode. 
llvm-svn: 141327
 2011-10-06 22:53:00 +00:00
Bill Wendling
3c68e1d212 Refactor some of the code that sets up the entry block for SjLj EH. No functionality change. 
llvm-svn: 141323
 2011-10-06 22:18:16 +00:00
Jim Grosbach
53b2b56db8 Tidy up tests. Un-XFAIL file and mark individual tests as FIXME instead. 
llvm-svn: 141321
 2011-10-06 22:04:05 +00:00
Bill Wendling
c8c252a859 Use a thumb ORR instead of thumb2 ORR when in thumb-only mode. (Picky! Picky!) 
Place the immediate to OR into a register so that it works.

llvm-svn: 141319
 2011-10-06 21:51:21 +00:00
Jim Grosbach
ec12700fe4 Fix and clean up tests. Un-XFAIL. 
llvm-svn: 141318
 2011-10-06 21:32:50 +00:00
Bill Wendling
e79ca82af3 * Set the low bit of the return address when we are in thumb mode. 
* Some code cleanup.

llvm-svn: 141317
 2011-10-06 21:29:56 +00:00
Jim Grosbach
17ae6aae38 Fix and clean up tests. Un-XFAIL. 
llvm-svn: 141316
 2011-10-06 21:28:30 +00:00
David Greene
711c41bd3d Fix List-of-List Processing 
Fix VarListElementInit::resolveListElementReference to return a
partially resolved VarListElementInint in the case where full
resolution is not possible.  This allows TableGen to make forward
progress resolving certain complex list expressions.

llvm-svn: 141315
 2011-10-06 21:20:46 +00:00
David Greene
0ed16506bf Make Test More Thorough 
Check that all ADD patters are processed.

Add a SUB test.

llvm-svn: 141314
 2011-10-06 21:20:44 +00:00
Matt Beaumont-Gay
13865f3e94 Fix -asserts build 
llvm-svn: 141313
 2011-10-06 20:59:09 +00:00
Justin Holewinski
19679dac62 PTX: Implement signed division 
llvm-svn: 141306
 2011-10-06 20:00:33 +00:00
Benjamin Kramer
0a688d0b71 Use StringSwitch. 
llvm-svn: 141305
 2011-10-06 18:53:43 +00:00
Benjamin Kramer
5ce646b553 Simplify code. No functionality change. 
llvm-svn: 141299
 2011-10-06 18:23:56 +00:00
David Greene
e918e1b1f7 Fix Typo 
Compare the entire keyword string.

llvm-svn: 141295
 2011-10-06 14:37:47 +00:00
Peter Collingbourne
78a1609fa2 s/tblgen/llvm-tblgen/g in a few missed places, including the tests 
llvm-svn: 141294
 2011-10-06 13:39:59 +00:00
Peter Collingbourne
fe4c1d613c Remove the Clang tblgen backends from LLVM. 
llvm-svn: 141293
 2011-10-06 13:21:42 +00:00
Torok Edwin
5a26a27370 Don't require C bindings opcode numbers to be kept in sync. 
They are not in sync now, for example Bitcast would show up as LLVMCall.
So instead introduce 2 functions that map to and from the opcodes in the C
bindings.

llvm-svn: 141290
 2011-10-06 12:39:34 +00:00
Torok Edwin
fc9cb1b7a0 Add uwtable, returnstwice and nonlazybind to the C bindings also. 
llvm-svn: 141289
 2011-10-06 12:13:32 +00:00
Torok Edwin
e5135b07e8 ocaml/C bindings: type->isSized() 
llvm-svn: 141288
 2011-10-06 12:13:28 +00:00
Torok Edwin
413276a992 add binding to read icmp predicate 
llvm-svn: 141287
 2011-10-06 12:13:20 +00:00
Torok Edwin
b0b404e35f ocaml/C bindings: getmdstring, add num_op, get_op should work on metadata too 
llvm-svn: 141286
 2011-10-06 12:13:11 +00:00
Torok Edwin
76fc6a1a53 C/OCaml API to retrieve struct name. 
llvm-svn: 141285
 2011-10-06 12:12:50 +00:00
Torok Edwin
be951e90d4 ocaml bindings: add llvm_ipo based on IPO.h 
llvm-svn: 141284
 2011-10-06 12:12:27 +00:00
Torok Edwin
1c3d252cfd add more tests for the OCaml bindings 
llvm-svn: 141283
 2011-10-06 12:12:12 +00:00
Craig Topper
2614f6f120 Fix assembling of xchg %eax, %eax to not use the NOP encoding of 0x90. This was done by creating a new register group that excludes AX registers. Fixes PR10345. Also added aliases for flipping the order of the operands of xchg <reg>, %eax. 
llvm-svn: 141274
 2011-10-06 06:44:41 +00:00
Evan Cheng
246086d6f6 Cosmetic change. 
llvm-svn: 141269
 2011-10-06 02:47:18 +00:00
Peter Collingbourne
253c6a3690 Build system infrastructure for multiple tblgens. 
llvm-svn: 141266
 2011-10-06 01:51:51 +00:00
Bill Wendling
73eb058991 Add the MBBs before inserting the instructions. Doing it afterwards could lead 
to an infinite loop because of the def-use chains.

Also use a frame load instead of store for the LD instruction.

llvm-svn: 141263
 2011-10-06 00:53:33 +00:00
Jakob Stoklund Olesen
eca6f0542b Remove the TRI::getSubRegisterRegClass() hook. 
This restores my karma after I added TRI::getSubClassWithSubReg().

Register constraints are applied 'backwards'.  Starting from the
register class required by an instruction operand, the correct question
is: 'How can I constrain the super-register register class so all its
sub-registers satisfy the instruction constraint?' The
getMatchingSuperRegClass() hook answers that.

We never need to go 'forwards': Starting from a super-register register
class, what register class are the sub-registers in?  The
getSubRegisterRegClass() hook did that.

llvm-svn: 141258
 2011-10-06 00:08:27 +00:00
Cameron Zwarich
5fb7c6643e Always merge profitable shifts on A9, not just when they have a single use. 
llvm-svn: 141248
 2011-10-05 23:39:02 +00:00
Cameron Zwarich
cc5f846d58 Remove a check from ARM shifted operand isel helper methods, which were blocking 
merging an lsl #2 that has multiple uses on A9. This shift is free, so there is
no problem merging it in multiple places. Other unprofitable shifts will not be
merged.

llvm-svn: 141247
 2011-10-05 23:38:50 +00:00
Bill Wendling
02aa225b72 Get the proper call site numbers for the landing pads. Also remove a magic 
number (18) for the proper addressing mode.

llvm-svn: 141245
 2011-10-05 23:28:57 +00:00
Bill Wendling
729a01085f Add accessor method to check if the landing pad symbol has call site information. 
llvm-svn: 141244
 2011-10-05 23:26:10 +00:00
David Greene
fa0c5e33b7 Fix a typo. 
Fix the argument passed in the multidef example.

llvm-svn: 141243
 2011-10-05 23:16:44 +00:00
David Greene
f6b87ae29a Prefix Template Arg Names with Multiclass Name 
For consistency, prefix multiclass template arg names with the
multiclass name followed by "::" to avoid name clashes among
multiclass arguments and other entities in the multiclass.

llvm-svn: 141239
 2011-10-05 22:42:54 +00:00