Chris Lattner
9a53871650
This is the correct fix for PR1427. This fixes mmx-shuffle.ll and doesn't
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cause other regressions.
llvm-svn: 37160
2007-05-17 17:13:13 +00:00
Anton Korobeynikov
375cafc275
Revert patch for PR1427. It breaks almost all vector tests.
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llvm-svn: 37159
2007-05-17 07:50:14 +00:00
Chris Lattner
307a29e831
add support for 128-bit integer add/sub
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llvm-svn: 37154
2007-05-17 06:35:11 +00:00
Chris Lattner
f65fe1d931
Fix PR1427 and test/CodeGen/X86/mmx-shuffle.ll
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llvm-svn: 37141
2007-05-17 03:29:42 +00:00
Chris Lattner
e67947b38f
implement the missing maskmovq mmx intrinsic that akor hit.
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llvm-svn: 37100
2007-05-16 06:08:17 +00:00
Chris Lattner
ce20a357f1
fix subtle bugs in inline asm operand selection
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llvm-svn: 37065
2007-05-15 01:28:08 +00:00
Anton Korobeynikov
7daaf71b29
More DWARF-related things cleanup:
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1. Fix PR1380
2. Apply Duncan's patch from PR1410
3. Insert workaround for "one personality function per module" as noted in PR1414
4. Emit correct debug frames for x86/linux. This partly fixes DebugInfo/2006-11-06-StackTrace.cpp: stack trace is
shown correctly, but arguments for function on top of stack are displayed incorrectly.
llvm-svn: 37015
2007-05-12 22:36:25 +00:00
Chris Lattner
96e9e88590
add some notes
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llvm-svn: 36965
2007-05-10 00:08:04 +00:00
Bill Wendling
88e78f8bdb
3DNowA implies 3DNow. 64-bit implies SSE1, SSE2, and I assume MMX.
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llvm-svn: 36860
2007-05-06 07:56:19 +00:00
Nate Begeman
f496eb7607
Reference correct header
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llvm-svn: 36834
2007-05-06 04:00:55 +00:00
Chris Lattner
9f8e81f9d3
move CodeGen/X86/overlap-add.ll here.
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llvm-svn: 36799
2007-05-05 22:10:24 +00:00
Anton Korobeynikov
ce48606d7a
Emit sections/directives in the proper order. This fixes PR1376. Also,
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some small cleanup was made.
llvm-svn: 36780
2007-05-05 09:04:50 +00:00
Bill Wendling
dc82c5a195
Add an "implies" field to features. This indicates that, if the current
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feature is set, then the features in the implied list should be set also.
The opposite is also enforced: if a feature in the implied list isn't set,
then the feature that owns that implies list shouldn't be set either.
llvm-svn: 36756
2007-05-04 20:38:40 +00:00
Chris Lattner
60cd08c23e
Fix two classes of bugs:
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1. x86 backend rejected (&gv+c) for the 'i' constraint when in static mode.
2. the matcher didn't correctly reject and accept some global addresses.
the right predicate is GVRequiresExtraLoad, not "relomodel = pic".
llvm-svn: 36670
2007-05-03 16:52:29 +00:00
Dan Gohman
a97ce790d0
Sets the section names for fixed-size constants and use the mergeable
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flag for ELF on x86 so that duplicate constants can be eliminated by
the linker. This matches what GCC does with its -fmerge-constants
option, which is enabled at most -O levels.
llvm-svn: 36666
2007-05-03 16:38:57 +00:00
Devang Patel
cd45427a87
Drop 'const'
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llvm-svn: 36662
2007-05-03 01:11:54 +00:00
Bill Wendling
5a84dca7df
Non-algorithmic change. Moved definitions around into separate sections
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for SSE1, SSE2, SSE3, and SSSE3.
llvm-svn: 36656
2007-05-02 23:11:52 +00:00
Bill Wendling
18b8948839
Update.
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llvm-svn: 36653
2007-05-02 21:42:20 +00:00
Devang Patel
8ee9065162
Use 'static const char' instead of 'static const int'.
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Due to darwin gcc bug, one version of darwin linker coalesces
static const int, which defauts PassID based pass identification.
llvm-svn: 36652
2007-05-02 21:39:20 +00:00
Anton Korobeynikov
44aa4c588b
Emit correct register move information in eh frames for X86. This allows Shootout-C++/except to pass on x86/linux
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with non-llvm-compiled (e.g. "native") unwind runtime.
llvm-svn: 36647
2007-05-02 19:53:33 +00:00
Anton Korobeynikov
d1bf4af988
Emit correct DWARF reg # for RA (return address) register
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llvm-svn: 36646
2007-05-02 08:46:03 +00:00
Anton Korobeynikov
6e6bfcaf4d
Fix couple of bugs connected with eh info:
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1. Correct output offsets on Linux
2. Fix "style" of personality function. It shouldn't be indirect.
llvm-svn: 36633
2007-05-01 22:23:12 +00:00
Devang Patel
38a66bc82e
Do not use typeinfo to identify pass in pass manager.
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llvm-svn: 36632
2007-05-01 21:15:47 +00:00
Anton Korobeynikov
f808ab1e97
Use correct PC symbol
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llvm-svn: 36628
2007-05-01 10:19:31 +00:00
Anton Korobeynikov
82d11e006a
Adjust correct EH-related sections
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llvm-svn: 36627
2007-05-01 10:16:06 +00:00
Evan Cheng
e47ec4d104
eliminateFrameIndex() change.
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llvm-svn: 36626
2007-05-01 09:13:03 +00:00
Anton Korobeynikov
3d95e52ea2
Implement protected visibility. This partly implements PR1363. Linker
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should be taught to deal with protected symbols.
llvm-svn: 36565
2007-04-29 18:35:00 +00:00
Dan Gohman
6cd8e14d68
Fix PR1339 and CodeGen/X86/dollar-name.ll
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llvm-svn: 36495
2007-04-26 21:07:05 +00:00
Bill Wendling
d380bc565b
Have MMX registers clobbered in x86-64 too.
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llvm-svn: 36494
2007-04-26 21:06:48 +00:00
Evan Cheng
c6fa6cb4c5
Fix for PR1348. If stack inc / dec amount is > 32-bits, issue a series of add / sub instructions.
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llvm-svn: 36456
2007-04-26 01:09:28 +00:00
Evan Cheng
7f44e880dc
Match MachineFunction::UsedPhysRegs changes.
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llvm-svn: 36452
2007-04-25 22:13:27 +00:00
Bill Wendling
552e4ff1be
Add SSSE3 as a feature of Core2. Add MMX registers to the list of registers
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clobbered by a call.
llvm-svn: 36448
2007-04-25 21:31:48 +00:00
Chris Lattner
fd730d86e3
do the multiplication as signed, so that 2*-2 == -4 instead of 4294967292
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when promoted to 64-bits
llvm-svn: 36442
2007-04-25 17:23:53 +00:00
Anton Korobeynikov
25dc9a61cb
Implement aliases. This fixes PR1017 and it's dependent bugs. CFE part
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will follow.
llvm-svn: 36435
2007-04-25 14:27:10 +00:00
Evan Cheng
de9468373e
Relex assertions to account for additional implicit def / use operands.
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llvm-svn: 36430
2007-04-25 07:12:14 +00:00
Chris Lattner
ca7480e8cb
support for >4G stack frames
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llvm-svn: 36425
2007-04-25 04:30:24 +00:00
Chris Lattner
452294cb99
support >4G stack frames
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llvm-svn: 36423
2007-04-25 04:25:10 +00:00
Bill Wendling
8127d9ce82
Update.
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llvm-svn: 36407
2007-04-24 21:20:03 +00:00
Bill Wendling
54134a37e0
Add the PADDQ to the list.
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llvm-svn: 36406
2007-04-24 21:19:14 +00:00
Bill Wendling
498c102df6
Add the final MMX instructions. Correct a few wrong patterns.
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llvm-svn: 36405
2007-04-24 21:18:37 +00:00
Bill Wendling
fed8496c6b
Remove some invalid instructions from this check.
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llvm-svn: 36404
2007-04-24 21:17:46 +00:00
Bill Wendling
6856e741fa
Support for the special case of a vector with the canonical form:
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vector_shuffle v1, v2, <2, 6, 3, 7>
I.e.
vector_shuffle v, undef, <2, 2, 3, 3>
MMX only has a shuffle for v4i16 vectors. It needs to use the unpackh for
this type of operation.
llvm-svn: 36403
2007-04-24 21:16:55 +00:00
Lauro Ramos Venancio
b75c6c5cbc
X86 TLS: optimize the implementation of "local exec" model.
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llvm-svn: 36359
2007-04-23 01:28:10 +00:00
Lauro Ramos Venancio
b1a101f0e7
X86 TLS: fix and optimize the implementation of "initial exec" model.
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llvm-svn: 36355
2007-04-22 22:50:52 +00:00
Lauro Ramos Venancio
3b60b9546e
X86 TLS: Implement review feedback.
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llvm-svn: 36318
2007-04-21 20:56:26 +00:00
Jeff Cohen
2afa206eb3
Comment out usage of write() for now.
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llvm-svn: 36287
2007-04-20 22:40:10 +00:00
Lauro Ramos Venancio
bc32d90b46
Implement "general dynamic", "initial exec" and "local exec" TLS models for
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X86 32 bits.
llvm-svn: 36283
2007-04-20 21:38:10 +00:00
Evan Cheng
a7f94abf95
Specify sub-register relations. e.g. RAX: [EAX], EAX: [AX], AX: [AL,AH].
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llvm-svn: 36279
2007-04-20 21:15:21 +00:00
Jeff Cohen
a2a6fab9b5
Make Microsoft assembler and linker happy.
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llvm-svn: 36265
2007-04-20 00:33:54 +00:00
Dan Gohman
bdb94669ba
Fix the spelling of the prefetchnta instruction.
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llvm-svn: 36256
2007-04-18 14:09:14 +00:00