Chris Lattner
9ab561788e
start parsing instructions into patterns, start doing many more checks of
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'set's.
llvm-svn: 23343
2005-09-14 00:09:24 +00:00
Chris Lattner
e2591652a2
don't emit the namespace inside the class!
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llvm-svn: 23341
2005-09-13 22:05:02 +00:00
Chris Lattner
1da656efd4
Emit code suitable for emission into the ISel class, allowing us to use/define
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methods.
llvm-svn: 23340
2005-09-13 22:03:37 +00:00
Chris Lattner
9bb7fff501
continue xform function parsing
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llvm-svn: 23338
2005-09-13 21:59:15 +00:00
Chris Lattner
abc740453c
Start parsing node transformation information
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llvm-svn: 23337
2005-09-13 21:51:00 +00:00
Chris Lattner
0dd99c9aaf
Add a new Record::getValueAsCode method to mirror the other getValueAs*
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methods. Use it to simplify some code.
llvm-svn: 23336
2005-09-13 21:44:28 +00:00
Chris Lattner
4e59482982
completely eliminate TreePattern::PatternType
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llvm-svn: 23335
2005-09-13 21:20:49 +00:00
Chris Lattner
773456a944
Regenerate
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llvm-svn: 23311
2005-09-12 05:30:06 +00:00
Chris Lattner
8b34f3d20d
Rearrange two rules, which apparently makes some versions of bison happier.
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llvm-svn: 23310
2005-09-12 05:29:43 +00:00
Jeff Cohen
7e6b5c60fc
Fix miscellaneous Visual Studio build problems.
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llvm-svn: 23307
2005-09-10 02:00:02 +00:00
Chris Lattner
ada7ac14a1
add an accessor to provide more checking
...
llvm-svn: 23289
2005-09-09 01:15:01 +00:00
Chris Lattner
2490f8f606
use new accessors to simplify code. Add checking to make sure top-level instr
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definitions are void
llvm-svn: 23288
2005-09-09 01:11:44 +00:00
Chris Lattner
2b656c6102
add some accessors
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llvm-svn: 23287
2005-09-09 01:11:17 +00:00
Chris Lattner
334e21eb98
Fix incorrect comment
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llvm-svn: 23285
2005-09-08 23:26:30 +00:00
Chris Lattner
a6d21c974c
Implement a complete type inference system for dag patterns, based on the
...
constraints defined in the DAG node definitions in the .td files. This
allows us to infer (and check!) the types for all nodes in the current
ppc .td file. For example, instead of:
Inst pattern EQV: (set GPRC:i32:$rT, (xor (xor GPRC:i32:$rA, GPRC:i32:$rB), (imm)<<Predicate_immAllOnes>>))
we now fully infer:
Inst pattern EQV: (set:void GPRC:i32:$rT, (xor:i32 (xor:i32 GPRC:i32:$rA, GPRC:i32:$rB), (imm:i32)<<Predicate_immAllOnes>>))
from: (set GPRC:$rT, (not (xor GPRC:$rA, GPRC:$rB)))
llvm-svn: 23284
2005-09-08 23:22:48 +00:00
Chris Lattner
e2fb8f3a77
Compute the value types that are natively supported by a target.
...
llvm-svn: 23282
2005-09-08 21:43:21 +00:00
Chris Lattner
152a72de2c
Parse information about type constraints on SDNodes
...
llvm-svn: 23281
2005-09-08 21:27:15 +00:00
Chris Lattner
ef07fffe37
use node info in the one place we currently use it
...
llvm-svn: 23280
2005-09-08 21:04:46 +00:00
Chris Lattner
d9930002aa
start parsing SDNode info records
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llvm-svn: 23279
2005-09-08 21:03:01 +00:00
Chris Lattner
515c19f56d
Fix indentation
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llvm-svn: 23276
2005-09-08 19:47:28 +00:00
Chris Lattner
b07d2cc2eb
regenerate
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llvm-svn: 23275
2005-09-08 18:48:47 +00:00
Chris Lattner
df9876cdb7
Add support for automatically created anonymous definitions.
...
This implements Regression/TableGen/AnonDefinitionOnDemand.td
llvm-svn: 23274
2005-09-08 18:48:23 +00:00
Chris Lattner
9e7e8d43e8
regenerate
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llvm-svn: 23271
2005-09-08 18:22:57 +00:00
Chris Lattner
2e3ed074d8
Tabs to spaces.
...
llvm-svn: 23270
2005-09-08 18:22:35 +00:00
Chris Lattner
03637c7200
Keep names even when inlining. This allows us to realize that ADDI is:
...
(set GPRC:i32:$rD, (add GPRC:i32:$rA, (imm)<<Predicate_immSExt16>>:$imm))
not:
(set GPRC:i32:$rD, (add GPRC:i32:$rA, (imm)<<Predicate_immSExt16>>))
(we keep the ":$imm")
llvm-svn: 23269
2005-09-08 17:45:12 +00:00
Chris Lattner
65c98b6441
Initial cut of the dag isel generator. This is still very much a work in
...
progress. It correctly parses instructions and pattern fragments and glues
together pattern fragments into instructions.
The only code it generates currently is some boilerplate code for things
like the EntryNode.
llvm-svn: 23261
2005-09-07 23:44:43 +00:00
Chris Lattner
b529b1bdbd
Rename a class. These files are being migrated to the new isel and I want to
...
reuse the names
llvm-svn: 23252
2005-09-06 22:51:34 +00:00
Chris Lattner
f12074e8f6
regenerate
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llvm-svn: 23249
2005-09-06 21:23:27 +00:00
Chris Lattner
5cd3a27513
Tighten up the specification to allow TableGen/nested-comment.td to pass
...
(fixing a bug where / in a /* */ comment would cause it to not close).
llvm-svn: 23248
2005-09-06 21:23:09 +00:00
Chris Lattner
12c57505bf
Add an option and stuff implementation of a dag isel emitter
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llvm-svn: 23236
2005-09-03 01:14:03 +00:00
Reid Spencer
46a7fdeb66
Implement PR614:
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These changes modify the makefiles so that the output of flex and bison are
placed in the SRC directory, not the OBJ directory. It is intended that they
be checked in as any other LLVM source so that platforms without convenient
access to flex/bison can be compiled. From now on, if you change a .y or
.l file you *must* also commit the generated .cpp and .h files.
llvm-svn: 23115
2005-08-27 18:50:39 +00:00
Chris Lattner
497c012e54
spell this right
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llvm-svn: 23099
2005-08-26 20:55:40 +00:00
Chris Lattner
6c4ea26961
spell this variable right
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llvm-svn: 23095
2005-08-26 20:42:52 +00:00
Chris Lattner
b474a0ab06
Expose a new flag to TargetInstrInfo
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llvm-svn: 23094
2005-08-26 20:40:46 +00:00
Chris Lattner
17f0f9beae
add a marker at the end of the instruction enum list
...
llvm-svn: 23090
2005-08-26 20:17:00 +00:00
Chris Lattner
9ceee53f9a
Emit this:
...
static const TargetOperandInfo OperandInfo6[] = { { &PPC32::CRRCRegClass }, { 0 }, };
instead of this:
static const TargetOperandInfo OperandInfo6[] = { { PPC32::CRRCRegisterClass }, { 0 }, };
For operand information, which does not require dynamic (startup-time)
initialization.
llvm-svn: 22931
2005-08-19 20:29:14 +00:00
Chris Lattner
916e016ac1
Expose the derived register classes to the public header, allowing them
...
to be accessed.
llvm-svn: 22930
2005-08-19 20:23:42 +00:00
Chris Lattner
20c1c4cf07
Split register class "Methods" into MethodProtos and MethodBodies
...
llvm-svn: 22928
2005-08-19 19:12:51 +00:00
Chris Lattner
cef54bfd28
Refactor to use Target.getRegisterClasses consistently, which provides
...
anonymous regclass definition renaming.
Change the generated code to emit register classes as properly namespace
qualified entities like everything else.
expose the actual class definition as an object, though this isn't quite
usable yet.
llvm-svn: 22920
2005-08-19 18:47:59 +00:00
Chris Lattner
077a4e87c4
Emit real operand info for instructions. This currently works but is bad
...
in one way: the generated tables require dynamic initialization for the
register classes. This will be fixed in a future patch.
llvm-svn: 22919
2005-08-19 18:46:26 +00:00
Chris Lattner
341308dc6b
Read the namespace field from register classes
...
llvm-svn: 22918
2005-08-19 18:45:20 +00:00
Chris Lattner
bf7633b73b
add a setName method to record
...
llvm-svn: 22912
2005-08-19 17:58:49 +00:00
Chris Lattner
1344e9cf9c
Add a setName method to Record.
...
llvm-svn: 22911
2005-08-19 17:58:11 +00:00
Chris Lattner
36f99a1374
For now, just emit empty operand info structures.
...
llvm-svn: 22910
2005-08-19 16:57:28 +00:00
Chris Lattner
5ac318c67b
Fix a problem jeffc noticed
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llvm-svn: 22903
2005-08-19 06:16:04 +00:00
Chris Lattner
1685432a06
The code emitter generator only supports targets with 32-bit instruction
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words. There is no way for one of these targets to have a > 32-bit immediate!
llvm-svn: 22897
2005-08-19 01:04:33 +00:00
Chris Lattner
7ab998463c
now that all of the targets are clean w.r.t. the number of operands for each
...
instruction defined, actually emit this to the InstrInfoDescriptor, which
allows an assert in the machineinstrbuilder to do some checking for us,
and is required by the dag->dag emitter
llvm-svn: 22895
2005-08-19 00:59:49 +00:00
Chris Lattner
d03fa09ce7
Figure out how many operands each instruction has, keep track of whether
...
or not it's variable.
llvm-svn: 22885
2005-08-18 23:38:41 +00:00
Chris Lattner
1f718aa8b5
revert this change, which causes breakage, temporarily
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llvm-svn: 22880
2005-08-18 22:12:31 +00:00
Chris Lattner
b312f4d374
When emitting implicit use/def lists, only emit each unique list once. Though
...
LLVM is able to merge identical static const globals, GCC isn't, and this caused
some bloat in the generated data. This has a marginal effect on PPC, shrinking
the implicit sets from 10->4, but shrinks X86 from 179 to 23, a much bigger
reduction.
This should speed up the register allocator as well by reducing the dcache
footprint for this static data.
llvm-svn: 22879
2005-08-18 21:36:47 +00:00