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Author SHA1 Message Date
Chris Lattner
e9c0d1574a declare targets with (void) instead of () since this is a C header. 
Patch by Lars R in PR6961.

llvm-svn: 102523
 2010-04-28 20:24:45 +00:00
Chris Lattner
4629370fa2 fix PR6112 - When globalopt (or any other pass) does RAUW(@G, %G), 
metadata references in non-function-local MDNodes should drop to 
null.

llvm-svn: 102519
 2010-04-28 20:16:12 +00:00
Evan Cheng
fb33f168e0 Pretty print DBG_VALUE machine instructions. 
Before:
DBG_VALUE %RSI, 0, !-1; dbg:SimpleRegisterCoalescing.cpp:2707
Now:
DBG_VALUE %RSI, 0, !"this"; dbg:SimpleRegisterCoalescing.cpp:2707

llvm-svn: 102518
 2010-04-28 20:03:13 +00:00
Chris Lattner
9867c1a075 Rework global alignment computation again. Now we do round up 
alignment of globals to the preferred alignment, but only when
there is no section specified on the global (by far the common
case).

llvm-svn: 102515
 2010-04-28 19:58:07 +00:00
Devang Patel
181c86e4e7 While lowering dbg_declare, emit DBG_VALUE machine instruction if alloca matching llvm.dbg.declare intrinsic is missing. 
llvm-svn: 102513
 2010-04-28 19:27:33 +00:00
Jakob Stoklund Olesen
bf2915f891 Recompute kill flags from live intervals after coalescing instead of trying to 
update them. Computing kill flags is notoriously difficult, and the coalescer
would get it wrong sometimes, and it would completely skip physical registers.

Now we simply remove kill flags based on the live intervals after coalescing.
This is a few percent slower, but now we get correct kill flags for physical
registers after coalescing.

llvm-svn: 102510
 2010-04-28 18:28:39 +00:00
Jakob Stoklund Olesen
f3dc101cd2 Teach X86FloatingPoint that a register can be killed multiple times by the same 
instruction.

This instruction would crash the pass:

  INLINEASM <es:foo $0 $1>, 9, %FP0<kill>, 9, %FP0<kill>, 14, %EFLAGS<earlyclobber,def,dead>

Now it doesn't.

llvm-svn: 102509
 2010-04-28 18:28:37 +00:00
Bob Wilson
98f2186636 Undo most of my previous whitespace fix. I think I like it better this way 
after all.

llvm-svn: 102508
 2010-04-28 18:18:36 +00:00
Bob Wilson
ba5b622a80 Fix inconsistent use of HOSTS and TARGETS variables. 
llvm-svn: 102505
 2010-04-28 18:06:27 +00:00
Bob Wilson
07f7b3462e Fix whitespace. 
llvm-svn: 102504
 2010-04-28 17:50:03 +00:00
Evan Cheng
d4fe387eb8 Enable i16 to i32 promotion by default. 
llvm-svn: 102493
 2010-04-28 08:30:49 +00:00
Evan Cheng
4561d60a2b Try operation promotion only if regular dag combine and target-specific ones failed to do anything. 
llvm-svn: 102492
 2010-04-28 07:10:39 +00:00
Evan Cheng
4e5846c61e Unbreak the build. Only form shld / shrd after legalization. 
llvm-svn: 102488
 2010-04-28 02:25:18 +00:00
Evan Cheng
08e5f737d2 Update tests. 
llvm-svn: 102487
 2010-04-28 01:53:13 +00:00
Devang Patel
570e9d53a7 Emit debug info for byval parameters. 
llvm-svn: 102486
 2010-04-28 01:39:28 +00:00
Evan Cheng
b7bb090d5d Rather than having a ton of patterns for double shift instructions, e.g. SHLD16rrCL, just perform custom dag combine to form x86 specific dag so they match to the same pattern. This also makes sure later dag combine do not cause isel to miss them (e.g. promoting i16 to i32). 
llvm-svn: 102485
 2010-04-28 01:18:01 +00:00
Chris Lattner
19715b76b7 further simplify EmitAlignment by eliminating the 
ForcedAlignBits argument, tweaking the single client of it.

llvm-svn: 102484
 2010-04-28 01:08:40 +00:00
Chris Lattner
d14f04d0f7 remove a dead argument to EmitAlignment. 
llvm-svn: 102483
 2010-04-28 01:06:02 +00:00
Chris Lattner
d3cfa7f3eb remove some default arguments to EmitAlignment. 
llvm-svn: 102482
 2010-04-28 01:05:45 +00:00
Devang Patel
d848109a46 Refactor. 
llvm-svn: 102481
 2010-04-28 01:03:09 +00:00
Dan Gohman
9a9dc98868 Rewrite the section on trap values to contain a generic description 
of dependence and define trap values in terms of dependence, instead
of trying to cover the concept with a flurry of ad-hoc rules.

The dependence model isn't complete yet, but it's already much more
rigorous than the description it replaces.

llvm-svn: 102479
 2010-04-28 00:49:41 +00:00
Dan Gohman
f8eeafd9f1 Fix spelling errors. 
llvm-svn: 102478
 2010-04-28 00:36:01 +00:00
Stuart Hastings
0768675d1b Tweak x86 INC/DEC generation to look for CopyToReg or SETCC. Radar 7866163. 
llvm-svn: 102477
 2010-04-28 00:35:10 +00:00
Chris Lattner
22d3b3b3b7 further clarify alignment of globals, fix instcombine 
to not increase the alignment of globals with an assigned
alignment and section.

llvm-svn: 102476
 2010-04-28 00:31:12 +00:00
Chris Lattner
3b199c318b improve the global variable alignment description. 
it is not generally valid for targets to overalign
them when an alignment is specified.

llvm-svn: 102474
 2010-04-28 00:13:42 +00:00
Devang Patel
00f63442db Use MachineOperand::is* predicates. 
llvm-svn: 102472
 2010-04-27 22:24:37 +00:00
Devang Patel
06f4482831 Use isReg(), isImm() and isFPImm(). 
llvm-svn: 102470
 2010-04-27 22:04:41 +00:00
Devang Patel
5d20a6c621 Check operand type first. 
llvm-svn: 102468
 2010-04-27 21:49:04 +00:00
Evan Cheng
65a95091cf Fix obvious typos. 
llvm-svn: 102467
 2010-04-27 21:46:03 +00:00
Devang Patel
8b3c1ffb8b Ignore DBG_VALUE instructions that points to undef values. 
llvm-svn: 102463
 2010-04-27 20:54:45 +00:00
Evan Cheng
f9531c1175 SRA promotion is also not free. 
llvm-svn: 102456
 2010-04-27 19:48:31 +00:00
Evan Cheng
94bcca7004 - When legal, promote a load to zextload rather than ext load. 
- Catch more further dag combine opportunities as result of operand promotion, e.g. (i32 anyext (i16 trunc (i32 x))) -> (i32 x)

llvm-svn: 102455
 2010-04-27 19:48:13 +00:00
Devang Patel
4698fffbb8 Identify when a lexical scope is split in to multiple instruction ranges. Emit such ranges using DW_AT_ranges. 
This patch fixes bug (PR6894) introduced by previous version of this patch.

llvm-svn: 102454
 2010-04-27 19:46:33 +00:00
Evan Cheng
2aaefc6167 Do not count kill, implicit_def instructions as printed instructions. 
llvm-svn: 102453
 2010-04-27 19:38:45 +00:00
Chris Lattner
a9c1328501 round zero-byte .zerofill directives up to 1 byte. This 
should fix some "g++.dg-struct-layout-1" failures, 
rdar://7886017

llvm-svn: 102421
 2010-04-27 07:41:44 +00:00
Chris Lattner
eee2e72653 fix wordo 
llvm-svn: 102418
 2010-04-27 07:28:11 +00:00
Chris Lattner
d0aac8b957 remove some comments. 
llvm-svn: 102417
 2010-04-27 06:57:10 +00:00
Dale Johannesen
244d2bdb24 Revert a small part of 102372; this fixes at least one 
of the dbg testsuite regressions.  I don't think this is
really the right fix; this change exposed an existing problem
upstream somewhere.

llvm-svn: 102410
 2010-04-27 02:10:05 +00:00
Bill Wendling
8a16d236db r98363 deleted a '!' when cleaning up whitespace. This caused globals which are 
*not* declarations to *not* be placed in the "preserve" list.
<rdar://problem/7870735>

llvm-svn: 102405
 2010-04-27 00:55:25 +00:00
Dale Johannesen
af026229b2 Un-XFAIL this on ppc. My enabling of dbg_declare handling 
in ISel fixed it.

llvm-svn: 102404
 2010-04-27 00:01:42 +00:00
Chris Lattner
2ceb31a172 Fix a problem that lower invoke has with allocas (PR6694), and 
add a version of createLowerInvokePass that allows the client
to specify whether it wants "expensive" or "cheap" lowering.

Patch by Alex Mac!

llvm-svn: 102402
 2010-04-26 23:49:32 +00:00
Chris Lattner
df345f8909 add a comment in verbose-asm mode indicating why a noop is being generated. 
llvm-svn: 102401
 2010-04-26 23:41:43 +00:00
Chris Lattner
9292bad5f5 on darwin empty functions need to codegen into something of non-zero length, 
otherwise labels get incorrectly merged.  We handled this by emitting a 
".byte 0", but this isn't correct on thumb/arm targets where the text segment
needs to be a multiple of 2/4 bytes.  Handle this by emitting a noop.  This
is more gross than it should be because arm/ppc are not fully mc'ized yet.

This fixes rdar://7908505

llvm-svn: 102400
 2010-04-26 23:37:21 +00:00
Dan Gohman
5aba2a8293 Integrate Jeffery Yasskin's suggestions with respect to 
traps flowing through memory references, add some text to
better cover phi nodes and externally-visible side effects,
add an example of instructions being control-dependent
on a trap value, and reword some of the existing trap rules.

llvm-svn: 102399
 2010-04-26 23:36:52 +00:00
Bob Wilson
ece63716aa Handle register-to-register copies within the tGPR class. 
Radar 7896289

llvm-svn: 102396
 2010-04-26 23:20:08 +00:00
Bob Wilson
6547515094 Avoid adding a null MD node operand, which crashes with "-debug" when trying 
to print the operand.

llvm-svn: 102395
 2010-04-26 22:56:56 +00:00
Devang Patel
ac2c76f813 Use DW_AT_entry_pc instead of DW_AT_low_pc/DW_AT_high_pc pair. This simplifies debug range entries. 
llvm-svn: 102394
 2010-04-26 22:54:28 +00:00
Dan Gohman
40561dd0ba When checking whether the special handling for an addrec increment which 
doesn't dominate the header is needed, don't check whether the increment
expression has computable loop evolution. While the operands of an
addrec are required to be loop-invariant, they're not required to 
dominate any part of the loop. This fixes PR6914.

llvm-svn: 102389
 2010-04-26 21:46:36 +00:00
Dan Gohman
9c1b7fdc46 Add a comment to this test. 
llvm-svn: 102387
 2010-04-26 21:37:43 +00:00
Jeffrey Yasskin
0819d5660a Consolidate the description of volatile operations, now that some of the 
intrinsics have volatile semantics in addition to the load and store
instructions.  

llvm-svn: 102384
 2010-04-26 21:21:24 +00:00