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Commit Graph

180 Commits

Author SHA1 Message Date
Krzysztof Parzyszek
513db043c7 [Hexagon] Generate PIC-specific versions of save/restore routines
In PIC mode, the registers R14, R15 and R28 are reserved for use by
the PLT handling code. This causes all functions to clobber these
registers. While this is not new for regular function calls, it does
also apply to save/restore functions, which do not follow the standard
ABI conventions with respect to the volatile/non-volatile registers.

Patch by Jyotsna Verma.

llvm-svn: 264324
2016-03-24 19:18:48 +00:00
Duncan P. N. Exon Smith
5aed8db9e7 WIP: CodeGen: Use MachineInstr& in MachineInstrBundle.h, NFC
Update APIs in MachineInstrBundle.h to take and return MachineInstr&
instead of MachineInstr* when the instruction cannot be null.  Besides
being a nice cleanup, this is tacking toward a fix for PR26753.

llvm-svn: 262141
2016-02-27 17:05:33 +00:00
Duncan P. N. Exon Smith
53cb4596f6 CodeGen: TII: Take MachineInstr& in predicate API, NFC
Change TargetInstrInfo API to take `MachineInstr&` instead of
`MachineInstr*` in the functions related to predicated instructions
(I'll try to come back later and get some of the rest).  All of these
functions require non-null parameters already, so references are more
clear.  As a bonus, this happens to factor away a host of implicit
iterator => pointer conversions.

No functionality change intended.

llvm-svn: 261605
2016-02-23 02:46:52 +00:00
Duncan P. N. Exon Smith
429a618d84 CodeGen: Bring back MachineBasicBlock::iterator::getInstrIterator()...
This is a little embarrassing.

When I reverted r261504 (getIterator() => getInstrIterator()) in
r261567, I did a `git grep` to see if there were new calls to
`getInstrIterator()` that I needed to migrate.  There were 10-20 hits,
and I blindly did a `sed ...` before calling `ninja check`.

However, these were `MachineInstrBundleIterator::getInstrIterator()`,
which predated r261567.  Perhaps coincidentally, these had an identical
name and return type.

This commit undoes my careless sed and restores
`MachineBasicBlock::iterator::getInstrIterator()`.

llvm-svn: 261577
2016-02-22 21:30:15 +00:00
Duncan P. N. Exon Smith
0fa6439bcd Revert "CodeGen: MachineInstr::getIterator() => getInstrIterator(), NFC"
This reverts commit r261504, since it's not obvious the new name is
better:
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20160222/334298.html

I'll recommit if we get consensus that it's the right direction.

llvm-svn: 261567
2016-02-22 20:49:58 +00:00
Duncan P. N. Exon Smith
b2dab65ba3 CodeGen: MachineInstr::getIterator() => getInstrIterator(), NFC
Delete MachineInstr::getIterator(), since the term "iterator" is
overloaded when talking about MachineInstr.

- Downcast to ilist_node in iplist::getNextNode() and getPrevNode() so
  that ilist_node::getIterator() is still available.
- Add it back as MachineInstr::getInstrIterator().  This matches the
  naming in MachineBasicBlock.
- Add MachineInstr::getBundleIterator().  This is explicitly called
  "bundle" (not matching MachineBasicBlock) to disintinguish it clearly
  from ilist_node::getIterator().
- Update all calls.  Some of these I switched to `auto` to remove
  boiler-plate, since the new name is clear about the type.

There was one call I updated that looked fishy, but it wasn't clear what
the right answer was.  This was in X86FrameLowering::inlineStackProbe(),
added in r252578 in lib/Target/X86/X86FrameLowering.cpp.  I opted to
leave the behaviour unchanged, but I'll reply to the original commit on
the list in a moment.

llvm-svn: 261504
2016-02-21 22:58:35 +00:00
Krzysztof Parzyszek
4004463702 [Hexagon] Recognize more cases in copyPhysReg and stack slot load/store
llvm-svn: 260748
2016-02-12 21:56:41 +00:00
Krzysztof Parzyszek
31aecfe356 [Hexagon] Recognize more instructions in isLoadFromStackSlot/isStoreToStackSlot
llvm-svn: 260725
2016-02-12 20:54:15 +00:00
Krzysztof Parzyszek
01c8f9e8e7 [Hexagon] Add utility functions to detect sign- and zero-extending loads
llvm-svn: 260698
2016-02-12 18:37:23 +00:00
Krzysztof Parzyszek
7ec3ade80f [Hexagon] Use general purpose registers to spill pred/mod registers into
Patch by Tobias Edler Von Koch.

llvm-svn: 258527
2016-01-22 19:15:58 +00:00
Krzysztof Parzyszek
3c4fc74899 [Hexagon] Expand pseudo instruction Insert4
llvm-svn: 257771
2016-01-14 15:37:16 +00:00
Krzysztof Parzyszek
5b1b8914af [Hexagon] Handle branches with non-mbb operands
llvm-svn: 257768
2016-01-14 15:05:27 +00:00
Krzysztof Parzyszek
dd2bf3bd45 [Hexagon] Update the Hexagon packetizer
llvm-svn: 255807
2015-12-16 19:36:12 +00:00
Krzysztof Parzyszek
0ea913c715 [Hexagon] Add "const" to function parameters in HexagonInstrInfo
llvm-svn: 255544
2015-12-14 21:32:25 +00:00
Sanjay Patel
51a4d88a44 fix 'the the '; NFC
llvm-svn: 254928
2015-12-07 19:21:39 +00:00
Krzysztof Parzyszek
f494c1982c [Hexagon] Hexagon V60 HVX intrinsic defintions
Author: Ron Lieberman <ronl@codeaurora.org>
llvm-svn: 254165
2015-11-26 16:54:33 +00:00
Krzysztof Parzyszek
128795bb47 [Hexagon] HVX vector register classes and more isel patterns
llvm-svn: 254132
2015-11-26 04:33:11 +00:00
Krzysztof Parzyszek
7903507e90 [Hexagon] Treat transfers of FP immediates are pseudo instructions
This is a temporary fix to address ICE on 2005-10-21-longlonggtu.ll.
The proper fix will be to use A2_tfrsi, but it will need more work to
teach all users of A2_tfrsi to also expect a floating-point operand.

llvm-svn: 254099
2015-11-25 21:40:03 +00:00
Krzysztof Parzyszek
65a9ee0c69 [Hexagon] Add missing include of <cctype>
Lack thereof breaks Windows builds due to the use of std::isspace
in HexagonInstrInfo.cpp.

llvm-svn: 253987
2015-11-24 15:11:13 +00:00
Krzysztof Parzyszek
f41a043936 [Hexagon] Bring HexagonInstrInfo up to date
llvm-svn: 253986
2015-11-24 14:55:26 +00:00
Krzysztof Parzyszek
722b0fe061 [Hexagon] Change Based->Base in getBasedWithImmOffset
llvm-svn: 250848
2015-10-20 19:21:05 +00:00
Duncan P. N. Exon Smith
7295da0c84 Hexagon: Remove implicit ilist iterator conversions, NFC
There are two things out of the ordinary in this commit.  First, I made
a loop obviously "infinite" in HexagonInstrInfo.cpp.  After checking if
an instruction was at the beginning of a basic block (in which case,
`break`), the loop decremented and checked the iterator for `nullptr` as
the loop condition.  This has never been possible (the prev pointers are
always been circular, so even with the weird ilist/iplist
implementation, this isn't been possible), so I removed the condition.

Second, in HexagonAsmPrinter.cpp there was another case of comparing a
`MachineBasicBlock::instr_iterator` against `MachineBasicBlock::end()`
(which returns `MachineBasicBlock::iterator`).  While not incorrect,
it's fragile.  I switched this to `::instr_end()`.

All that said, no functionality change intended here.

llvm-svn: 250778
2015-10-20 00:46:39 +00:00
Krzysztof Parzyszek
f0b61fb8a6 [Hexagon] Add an early if-conversion pass
llvm-svn: 249423
2015-10-06 15:49:14 +00:00
Cong Hou
16bf52a24c Pass BranchProbability/BlockMass by value instead of const& as they are small. NFC.
llvm-svn: 247357
2015-09-10 23:10:42 +00:00
Alex Lorenz
7b1d22a17d PseudoSourceValue: Replace global manager with a manager in a machine function.
This commit removes the global manager variable which is responsible for
storing and allocating pseudo source values and instead it introduces a new
manager class named 'PseudoSourceValueManager'. Machine functions now own an
instance of the pseudo source value manager class.

This commit also modifies the 'get...' methods in the 'MachinePointerInfo'
class to construct pseudo source values using the instance of the pseudo
source value manager object from the machine function.

This commit updates calls to the 'get...' methods from the 'MachinePointerInfo'
class in a lot of different files because those calls now need to pass in a
reference to a machine function to those methods.

This change will make it easier to serialize pseudo source values as it will
enable me to transform the mips specific MipsCallEntry PseudoSourceValue
subclass into two target independent subclasses.

Reviewers: Akira Hatanaka
llvm-svn: 244693
2015-08-11 23:09:45 +00:00
Ahmed Bougacha
ee490f0abc [CodeGen] ArrayRef'ize cond/pred in various TII APIs. NFC.
llvm-svn: 239553
2015-06-11 19:30:37 +00:00
Keno Fischer
154ce9f3df [InstrInfo] Refactor foldOperandImpl to thread through InsertPt. NFC
Summary:
This was a longstanding FIXME and is a necessary precursor to cases
where foldOperandImpl may have to create more than one instruction
(e.g. to constrain a register class). This is the split out NFC changes from
D6262.

Reviewers: pete, ributzka, uweigand, mcrosier

Reviewed By: mcrosier

Subscribers: mcrosier, ted, llvm-commits

Differential Revision: http://reviews.llvm.org/D10174

llvm-svn: 239336
2015-06-08 20:09:58 +00:00
Brendon Cahoon
44a2180995 [Hexagon] Update AnalyzeBranch, etc target hooks
Improved the AnalyzeBranch, InsertBranch, and RemoveBranch
functions in order to handle more of our branch instructions.
This requires changes to analyzeCompare and PredicateInstructions.
Specifically, we've added support for new value compare jumps,
improved handling of endloop, added more compare instructions,
and improved support for predicate instructions.

Differential Revision: http://reviews.llvm.org/D9559

llvm-svn: 236876
2015-05-08 16:16:29 +00:00
Brendon Cahoon
37b8b0d293 [Hexagon] Use constant extenders to fix up hardware loops
Use a loop instruction with a constant extender for a hardware
loop instruction that is too far away from the start of the loop.
This is cheaper than changing the SA register value.

Differential Revision: http://reviews.llvm.org/D9262

llvm-svn: 235882
2015-04-27 14:16:43 +00:00
Krzysztof Parzyszek
8605e42505 [Hexagon] Use A2_tfrsi for constant pool and jump table addresses
llvm-svn: 235535
2015-04-22 18:25:53 +00:00
Krzysztof Parzyszek
be5ccc1041 [Hexagon] Consider constant-extended offsets to be valid
llvm-svn: 235529
2015-04-22 17:51:26 +00:00
Krzysztof Parzyszek
75c2c01b61 [Hexagon] Overhaul of stack object allocation
- Use static allocation for aligned stack objects.
- Simplify dynamic stack object allocation.
- Simplify elimination of frame-indices.

llvm-svn: 235521
2015-04-22 16:43:53 +00:00
Krzysztof Parzyszek
bcfafa313d Expand MUX instructions early on Hexagon
This time with all files included.

llvm-svn: 233696
2015-03-31 13:35:12 +00:00
Krzysztof Parzyszek
a45218861d Revert 233694. Weak SVN-fu.
llvm-svn: 233695
2015-03-31 13:32:32 +00:00
Krzysztof Parzyszek
c520a7c528 Expand MUX instructions early on Hexagon
llvm-svn: 233694
2015-03-31 13:29:17 +00:00
Krzysztof Parzyszek
9cc7bfdeec [Hexagon] Add support for vector instructions
llvm-svn: 232728
2015-03-19 16:33:08 +00:00
Krzysztof Parzyszek
7711e054b1 [Hexagon] ENDLOOP is a non-reversible conditional branch
llvm-svn: 232725
2015-03-19 15:18:57 +00:00
Krzysztof Parzyszek
9be33ff87e [Hexagon] Use pseudo-instructions for true/false predicate values
llvm-svn: 232657
2015-03-18 19:07:53 +00:00
Krzysztof Parzyszek
74e58441b5 [Hexagon] Intrinsics for circular and bit-reversed loads and stores
llvm-svn: 232645
2015-03-18 16:23:44 +00:00
Krzysztof Parzyszek
7c0a6d7439 [Hexagon] Handle ENDLOOP0 in InsertBranch and RemoveBranch
llvm-svn: 232643
2015-03-18 15:56:43 +00:00
Eric Christopher
430437ec76 Remove subtarget dependence from HexagonRegisterInfo.
llvm-svn: 231887
2015-03-10 23:45:55 +00:00
Colin LeMahieu
91da68b7ad [Hexagon] Use single tailcall pseudoinst and fix checking for label jumping versus tail calling.
llvm-svn: 231713
2015-03-09 22:05:21 +00:00
Colin LeMahieu
a4d567fa07 [Hexagon] Reapply r231699. Remove assumption that second operand is an immediate when checking if A2_tfrsi is combinable.
llvm-svn: 231710
2015-03-09 21:48:13 +00:00
Benjamin Kramer
411a71a68d ArrayRefize memory operand folding. NFC.
llvm-svn: 230846
2015-02-28 12:04:00 +00:00
David Blaikie
9259521220 Fix the clang -Werror build (-Wunused-variable)
llvm-svn: 228635
2015-02-10 00:16:36 +00:00
Colin LeMahieu
6ba6e9c428 [Hexagon] Removing more V4 predicates since V4 is the required minimum.
llvm-svn: 228614
2015-02-09 21:56:37 +00:00
Colin LeMahieu
db2545bd9b [Hexagon] Renaming A2_addi and formatting.
llvm-svn: 228318
2015-02-05 17:49:13 +00:00
Colin LeMahieu
ac8c4238a0 [Hexagon] Adding encoding information for absolute-reg mode stores. Xfailing a test until constant extenders are correctly put in the same packet.
llvm-svn: 228158
2015-02-04 17:52:06 +00:00
Colin LeMahieu
0710e9b065 [Hexagon] Replacing old versions of stores and loads.
llvm-svn: 226065
2015-01-15 00:15:30 +00:00
Colin LeMahieu
255d98103d [Hexagon] Replacing old version of convert and load f64.
llvm-svn: 226057
2015-01-14 23:07:36 +00:00