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Author SHA1 Message Date
Devang Patel
6aef3e8bb3 80 cols. 
llvm-svn: 107807
 2010-07-07 20:12:52 +00:00
Dan Gohman
d0caefa601 Implement bottom-up fast-isel. This has the advantage of not requiring 
a separate DCE pass over MachineInstrs.

llvm-svn: 107804
 2010-07-07 19:20:32 +00:00
Dan Gohman
424cc6b616 Add X86FastISel support for return statements. This entails refactoring 
a bunch of stuff, to allow the target-independent calling convention
logic to be employed.

llvm-svn: 107800
 2010-07-07 18:32:53 +00:00
Bruno Cardoso Lopes
8d350872d4 Add AVX AES instructions 
llvm-svn: 107798
 2010-07-07 18:24:20 +00:00
Dan Gohman
317e584821 Update the insert position after scheduling, which may change the 
position when emitting multiple blocks when executing a custom
inserter.

llvm-svn: 107797
 2010-07-07 18:22:13 +00:00
Devang Patel
c5344b8cc5 Update comment. 
llvm-svn: 107796
 2010-07-07 18:18:18 +00:00
Dan Gohman
2e0a949d9f Fix debugging strings. 
llvm-svn: 107795
 2010-07-07 17:28:45 +00:00
Duncan Sands
bf3a1f45c3 Issue the warning about being slow whenever optimization is disabled, 
and not just for Debug+Asserts builds.

llvm-svn: 107792
 2010-07-07 16:48:16 +00:00
Dan Gohman
b2d5b47efb Give FunctionLoweringInfo an MBB member, avoiding the need to pass it 
around everywhere, and also give it an InsertPt member, to enable isel
to operate at an arbitrary position within a block, rather than just
appending to a block.

llvm-svn: 107791
 2010-07-07 16:47:08 +00:00
Dan Gohman
b87c534168 Simplify FastISel's constructor by giving it a FunctionLoweringInfo 
instance, rather than pointers to all of FunctionLoweringInfo's
members.

This eliminates an NDEBUG ABI sensitivity.

llvm-svn: 107789
 2010-07-07 16:29:44 +00:00
Dan Gohman
1c3ce1ccd5 Move FunctionLoweringInfo.h out into include/llvm/CodeGen. This will 
allow target-specific fast-isel code to make use of it directly.

llvm-svn: 107787
 2010-07-07 16:01:37 +00:00
Dan Gohman
c768525273 Split the SDValue out of OutputArg so that SelectionDAG-independent 
code can do calling-convention queries. This obviates OutputArgReg.

llvm-svn: 107786
 2010-07-07 15:54:55 +00:00
Chris Lattner
96566c78ef add some triple for minix, patch by Kees van Reeuwijk from PR7582 
llvm-svn: 107785
 2010-07-07 15:52:27 +00:00
Dan Gohman
f60a8be1d0 Move ArgFlagsTy, OutputArg, and InputArg out of SelectionDAGNodes.h and 
into a new header, TargetCallingConv.h.

llvm-svn: 107782
 2010-07-07 15:28:42 +00:00
Dan Gohman
28eddf12ea Move CallingConvLower.cpp out of the SelectionDAG directory. 
llvm-svn: 107781
 2010-07-07 15:15:27 +00:00
Jakob Stoklund Olesen
aed9d04523 Fix more places assuming subregisters have live intervals 
llvm-svn: 107780
 2010-07-07 14:41:22 +00:00
Gabor Greif
84c77d994d adapt condition for changed default build mode 
who knows how to cover Asserts or Debug separately
please do not hesitate to extend this

llvm-svn: 107779
 2010-07-07 14:37:04 +00:00
Dan Gohman
bbee8c93fb Add a getFirstNonPHI utility function. 
llvm-svn: 107778
 2010-07-07 14:33:51 +00:00
Dan Gohman
dbfdd07710 Minore code simplification. 
llvm-svn: 107777
 2010-07-07 14:30:04 +00:00
Dan Gohman
2a08e2ce81 Remove interprocedural-basic-aa and associated code. The AliasAnalysis 
interface needs implementations to be consistent, so any code which
wants to support different semantics must use a different interface.
It's not currently worthwhile to add a new interface for this new
concept.

Document that AliasAnalysis doesn't support cross-function queries.

llvm-svn: 107776
 2010-07-07 14:27:09 +00:00
Gabor Greif
c33bc67100 typo in comment, regeneration not necessary 
llvm-svn: 107774
 2010-07-07 13:58:46 +00:00
Gabor Greif
600c671ab6 conditionalize by CallInst::ArgOffset 
llvm-svn: 107767
 2010-07-07 10:34:03 +00:00
Gabor Greif
a01cb6f114 conditionalize on CallInst::ArgOffset 
llvm-svn: 107766
 2010-07-07 09:43:45 +00:00
Gabor Greif
886389fe30 minor cosmetic changes that happened to sit in my tree 
llvm-svn: 107764
 2010-07-07 09:29:07 +00:00
Duncan Sands
eb15d2084a Rename "Release" builds as "Release+Asserts"; rename "Release-Asserts" 
builds to "Release".  The default build is unchanged (optimization on,
assertions on), however it is now called Release+Asserts.  The intent
is that future LLVM releases released via llvm.org will be Release builds
in the new sense, i.e. will have assertions disabled (currently they have
assertions enabled, for a more than 20% slowdown).  This will bring them
in line with MacOS releases, which ship with assertions disabled.  It also
means that "Release" now means the same things in make and cmake builds:
cmake already disables assertions for "Release" builds AFAICS.

llvm-svn: 107758
 2010-07-07 07:48:00 +00:00
Bruno Cardoso Lopes
6222076cd1 Add AVX SSE4.2 instructions 
llvm-svn: 107752
 2010-07-07 03:39:29 +00:00
Bruno Cardoso Lopes
931471d7e8 Use only one multiclass to pinsrq instructions 
llvm-svn: 107750
 2010-07-07 01:43:01 +00:00
Bruno Cardoso Lopes
65fbd0530f Now that almost all SSE4.1 AVX instructions are added, move code around to more appropriate sections. No functionality changes 
llvm-svn: 107749
 2010-07-07 01:33:38 +00:00
Bruno Cardoso Lopes
675ebe2dc0 Add AVX SSE4.1 insertps, ptest and movntdqa instructions 
llvm-svn: 107747
 2010-07-07 01:14:56 +00:00
Bruno Cardoso Lopes
fa10461265 Add AVX SSE4.1 extractps and pinsr instructions 
llvm-svn: 107746
 2010-07-07 01:01:13 +00:00
Jakob Stoklund Olesen
3f4e5779d7 Revert "Remove references to INSERT_SUBREG after de-SSA" r107725. 
Buildbot breakage.

llvm-svn: 107744
 2010-07-07 00:32:25 +00:00
Bob Wilson
822b21f0de Also use REG_SEQUENCE for VTBX instructions. 
llvm-svn: 107743
 2010-07-07 00:08:54 +00:00
Jim Grosbach
71b7efe8ad Mark eh.sjlj.set/longjmp custom lowerings as Darwin-only since that's where 
they've been tested to work.

llvm-svn: 107742
 2010-07-07 00:07:57 +00:00
Bruno Cardoso Lopes
54c2f858b3 Add AVX SSE4.1 Extract Integer instructions 
llvm-svn: 107740
 2010-07-07 00:07:24 +00:00
Jim Grosbach
657ab4a8ee By default, the eh.sjlj.setjmp/longjmp intrinsics should just do nothing rather 
than assuming a target will custom lower them. Targets which do so should
exlicitly mark them as having custom lowerings. PR7454.

llvm-svn: 107734
 2010-07-06 23:44:52 +00:00
Jakob Stoklund Olesen
04124836b5 Remove references to INSERT_SUBREG after de-SSA 
llvm-svn: 107732
 2010-07-06 23:40:35 +00:00
Bob Wilson
ce80768ebf Use REG_SEQUENCE nodes to make the table registers for VTBL instructions be 
allocated to consecutive registers.

llvm-svn: 107730
 2010-07-06 23:36:25 +00:00
Dale Johannesen
81ea05c193 Accept RIP-relative symbols with 'i' constraint, and 
print the (%rip) only if the 'a' modifier is present.
PR 7528.

llvm-svn: 107727
 2010-07-06 23:27:00 +00:00
Jakob Stoklund Olesen
83ab844c9b Convert INSERT_SUBREG to COPY in TwoAddressInstructionPass. 
INSERT_SUBREG will now only appear in SSA machine instructions.

Fix the handling of partial redefs in ProcessImplicitDefs. This is now relevant
since partial redef COPY instructions appear.

llvm-svn: 107726
 2010-07-06 23:26:25 +00:00
Jakob Stoklund Olesen
44c333e87c Track defs for all aliases in NEONMoveFix. 
This means that an instruction defining an S register will affect the domain of
the parent D register.

llvm-svn: 107725
 2010-07-06 23:26:23 +00:00
Bruno Cardoso Lopes
b9e1c33054 Add the rest of AVX SSE4.1 packed move with sign/zero extend instructions 
llvm-svn: 107723
 2010-07-06 23:15:17 +00:00
Dale Johannesen
f06021547c Make test not hang waiting for input. 
llvm-svn: 107721
 2010-07-06 23:06:58 +00:00
Bruno Cardoso Lopes
0c6ec0b068 Add part of AVX SSE4.1 packed move with sign/zero extend instructions 
llvm-svn: 107720
 2010-07-06 23:01:41 +00:00
Bruno Cardoso Lopes
af8968696a Fix comment from previous patch 
llvm-svn: 107717
 2010-07-06 22:38:32 +00:00
Bruno Cardoso Lopes
a0b37e839c Add AVX vblendvpd, vblendvps and vpblendvb instructions 
Update VEX encoding to support those new instructions

llvm-svn: 107715
 2010-07-06 22:36:24 +00:00
Dan Gohman
d409104054 CanLowerReturn doesn't need a SelectionDAG; it just needs an LLVMContext. 
SelectBasicBlock doesn't needs its BasicBlock argument.

llvm-svn: 107712
 2010-07-06 22:19:37 +00:00
Devang Patel
7ab104353b Propagate debug loc. 
llvm-svn: 107710
 2010-07-06 22:08:15 +00:00
Bob Wilson
084a11cb59 Represent NEON load/store alignments in bytes, not bits. 
llvm-svn: 107701
 2010-07-06 21:26:18 +00:00
Jakob Stoklund Olesen
bc4a57ef56 One more case assuming that subregs have live ranges. 
llvm-svn: 107700
 2010-07-06 21:13:03 +00:00
John McCall
a59e143fec Closing tags start with slashes. 
llvm-svn: 107699
 2010-07-06 21:07:14 +00:00