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Author SHA1 Message Date
Jim Laskey
f0f90be71c Sort the features and processor lists for the sake of search (and maintainers.) 
llvm-svn: 23879
 2005-10-22 07:59:56 +00:00
Chris Lattner
f6b98c786e 64-bit reg support should not be enabled by default, as support isn't complete. 
llvm-svn: 23878
 2005-10-21 22:15:43 +00:00
Chris Lattner
9f1b2541f5 add a case missing from the dag combiner that exposed the failure on 
2005-10-21-longlonggtu.ll.

llvm-svn: 23875
 2005-10-21 21:23:25 +00:00
Chris Lattner
ffa76df587 Instead of aborting if not a case we can handle specially, break out and 
let the generic code handle it.  This fixes CodeGen/Generic/2005-10-21-longlonggtu.ll on ppc.

also, reindent this code

llvm-svn: 23874
 2005-10-21 21:17:10 +00:00
Chris Lattner
7d5010382a New testcase that crashes the ppc backend 
llvm-svn: 23871
 2005-10-21 21:09:13 +00:00
Jim Laskey
1fbdee408d Plugin new subtarget backend into the build. 
llvm-svn: 23870
 2005-10-21 19:05:19 +00:00
Jim Laskey
c2e76396fc New TableGen backends for subtarget information. Only command line stuff 
active now.  Scheduling itinerary next.

llvm-svn: 23869
 2005-10-21 19:00:04 +00:00
Chris Lattner
fa987d5a95 silence a release mode warning 
llvm-svn: 23868
 2005-10-21 16:01:26 +00:00
Chris Lattner
610724aedd add missing prototype 
llvm-svn: 23867
 2005-10-21 15:49:28 +00:00
Chris Lattner
5a9eb6d07b Make the coallescer a bit smarter, allowing it to join more live ranges. 
For example, we can now join things like [0-30:0)[31-40:1)[52-59:2)
with [40:60:0) if the 52-59 range is defined by a copy from the 40-60 range.
The resultant range ends up being [0-30:0)[31-60:1).

This fires a lot through-out the test suite (e.g. shrinking bc from
19492 -> 18509 machineinstrs) though most gains are smaller (e.g. about
50 copies eliminated from crafty).

llvm-svn: 23866
 2005-10-21 06:49:50 +00:00
Chris Lattner
393200c3c6 Fix LiveInterval::getOverlapingRanges to take things in the right order 
(an unused method).

Fix the merger so that it can merge ranges like this  [10:12)[16:40) with
[12:38) into [10:40) instead of bogus ranges.  This sort of input will be
possible for the merger coming shortly

llvm-svn: 23865
 2005-10-21 06:41:30 +00:00
Nate Begeman
d633b875bb Match rotate. This does actually match the rotates in an rc5 cipher, but I 
haven't seen it fire on our testsuite.

llvm-svn: 23863
 2005-10-21 06:36:18 +00:00
Chris Lattner
63aa74e804 My previous patch was too conservative. Reject FP and void types, but do 
allow pointer types.

llvm-svn: 23859
 2005-10-21 05:45:41 +00:00
Nate Begeman
5a915709c3 Don't generate operations that aren't yet supported 
llvm-svn: 23858
 2005-10-21 01:52:45 +00:00
Nate Begeman
c979beb5f2 Kill some now-dead code. 
llvm-svn: 23857
 2005-10-21 01:52:20 +00:00
Nate Begeman
eee9e70716 Fix a typo in the dag combiner, so that this can work on i64 targets 
llvm-svn: 23856
 2005-10-21 01:51:45 +00:00
Andrew Lenharth
0068bc388e byte zap not immediate goodness 
llvm-svn: 23855
 2005-10-21 01:24:05 +00:00
Chris Lattner
b018f20c7b Make tblgen emit: 
tblgen: In ZAPNOTi: Cannot use 'IZAPX' in an input pattern!
for a bad pattern, instead of an ugly assertion.

llvm-svn: 23854
 2005-10-21 01:19:59 +00:00
Nate Begeman
6c42f509bc Invert the TargetLowering flag that controls divide by consant expansion. 
Add a new flag to TargetLowering indicating if the target has really cheap
  signed division by powers of two, make ppc use it.  This will probably go
  away in the future.
Implement some more ISD::SDIV folds in the dag combiner
Remove now dead code in the x86 backend.

llvm-svn: 23853
 2005-10-21 00:02:42 +00:00
Andrew Lenharth
065fe477eb Inst cleanup. As a bonus, operands are in the correct order for cmovs. Expect new stuff to pass in the JIT tonight 
llvm-svn: 23852
 2005-10-20 23:58:36 +00:00
Chris Lattner
2587e44b65 Use a literal to define ineg instead of immzero 
llvm-svn: 23851
 2005-10-20 23:30:37 +00:00
Chris Lattner
04c1fe840d Fix a conditional so we don't access past the end of the range. Thanks to 
Andrew for bringing this to my attn.

llvm-svn: 23850
 2005-10-20 22:50:10 +00:00
Andrew Lenharth
0856abb644 added a few 1 operand form stuff. Seems to break regalloc on alpha. sigh 
llvm-svn: 23849
 2005-10-20 19:39:24 +00:00
Andrew Lenharth
6c39e6c389 add cttz and ctpop 
llvm-svn: 23848
 2005-10-20 19:38:11 +00:00
Nate Begeman
44712926a0 Fix a couple bugs in the const div stuff where we'd generate MULHS/MULHU 
for types that aren't legal, and fail a divisor is less than zero
comparison, which would cause us to drop a subtract.

llvm-svn: 23846
 2005-10-20 17:45:03 +00:00
Chris Lattner
1f9a14683a don't use llabs with apparently VC++ doesn't have 
llvm-svn: 23845
 2005-10-20 17:01:00 +00:00
Chris Lattner
3c1570debb Fix order of eval problem from when I refactored this into a function. 
llvm-svn: 23844
 2005-10-20 16:56:40 +00:00
Andrew Lenharth
81d2375468 Sounds good, finish the intop conversion. 
llvm-svn: 23843
 2005-10-20 14:42:48 +00:00
Nate Begeman
bbce8c042c Add some more patterns for i64 on ppc 
llvm-svn: 23842
 2005-10-20 07:51:08 +00:00
Chris Lattner
ad14e0db81 add a new method, play around with some code. 
Fix a *bug* in the extendIntervalEndTo method.  In particular, if adding
[2:10) to an interval containing [0:2),[10:30), we produced [0:10),[10,30).
Which is not the most smart thing to do.  Now produce [0:30).

llvm-svn: 23841
 2005-10-20 07:39:25 +00:00
Chris Lattner
ca5f516c08 add a new method 
llvm-svn: 23840
 2005-10-20 07:37:59 +00:00
Chris Lattner
13d804c465 Refactor some code, pulling it out into a function. No functionality change. 
llvm-svn: 23839
 2005-10-20 06:06:30 +00:00
Chris Lattner
3451ac7691 Do NOT touch FP ops with LSR. This fixes a testcase Nate sent me from an 
inner loop like this:

LBB_RateConvertMono8AltiVec_2:  ; no_exit
        lis r2, ha16(.CPI_RateConvertMono8AltiVec_0)
        lfs f3, lo16(.CPI_RateConvertMono8AltiVec_0)(r2)
        fmr f3, f3
        fadd f0, f2, f0
        fadd f3, f0, f3
        fcmpu cr0, f3, f1
        bge cr0, LBB_RateConvertMono8AltiVec_2  ; no_exit

to an inner loop like this:

LBB_RateConvertMono8AltiVec_1:  ; no_exit
        fsub f2, f2, f1
        fcmpu cr0, f2, f1
        fmr f0, f2
        bge cr0, LBB_RateConvertMono8AltiVec_1  ; no_exit

Doh! good catch!

llvm-svn: 23838
 2005-10-20 04:47:10 +00:00
Chris Lattner
763a62efa6 Add some pattern fragments to simplify the repetitive parts of the patterns 
for some common ops and use them for a few examples.  Andrew, if you like
this, feel free to convert the rest over, if you hate it, feel free to
revert.

llvm-svn: 23837
 2005-10-20 04:21:06 +00:00
Chris Lattner
27aacf1b55 simplify this a bit by using immediates 
llvm-svn: 23836
 2005-10-20 03:57:03 +00:00
Nate Begeman
dc1a2a1f19 Move the target constant divide optimization up into the dag combiner, so 
that the nodes can be folded with other nodes, and we can not duplicate
code in every backend.  Alpha will probably want this too.

llvm-svn: 23835
 2005-10-20 02:15:44 +00:00
Nate Begeman
2b0b27775d Enable targets to say that integer divide is expensive, which will trigger 
an upcoming optimization in the DAG Combiner.

llvm-svn: 23834
 2005-10-20 02:14:14 +00:00
Andrew Lenharth
21beb13e51 forgot this one 
llvm-svn: 23833
 2005-10-20 00:29:02 +00:00
Andrew Lenharth
a7554852b3 ret 0; works, not much else 
still lots of uglyness.
Maybe calls will come soon.
Fixing the return value of things will be necessary to make alpha work.

llvm-svn: 23832
 2005-10-20 00:28:31 +00:00
John Criswell
9ced67a0e1 This fixes PR638: 
Regression/CodeGen/Generic/2004-02-08-UnwindSupport.llx

llvm-svn: 23831
 2005-10-19 20:07:15 +00:00
Jim Laskey
514a74d946 Added InstrSchedClass to each of the PowerPC Instructions. 
Note that when adding new instructions that you should refer to the table at the
bottom of PPCSchedule.td.

llvm-svn: 23830
 2005-10-19 19:51:16 +00:00
John Criswell
ef91e2976a Moved to Regression/Codegen/Generic. 
llvm-svn: 23829
 2005-10-19 18:52:52 +00:00
John Criswell
c1547066cd This is a generic test for all code generators. It originally came from 
Regression/Codegen/X86.

llvm-svn: 23826
 2005-10-19 18:51:07 +00:00
Nate Begeman
83f0f34140 Write patterns for the various shl and srl patterns that don't involve 
doing something clever.

llvm-svn: 23824
 2005-10-19 18:42:01 +00:00
John Criswell
190ec6e8f8 Force i386 code generation for an i386 specific test. 
llvm-svn: 23821
 2005-10-19 18:30:39 +00:00
Jim Laskey
0918760dec Push processor descriptions to the top of target and add command line info. 
llvm-svn: 23820
 2005-10-19 13:34:52 +00:00
Chris Lattner
1bac5bc8a3 add support for literal immediates in patterns to match, allowing us to 
write things like this:

def : Pat<(add GPRC:$in, 12),
          (ADD12 GPRC:$in)>;

Andrew: if this isn't enough or doesn't work for you, please lemme know.
llvm-svn: 23819
 2005-10-19 04:41:05 +00:00
Chris Lattner
61ae05f5dd now that tblgen is smarter, use integers directly. This should help Andrew too 
llvm-svn: 23818
 2005-10-19 04:32:04 +00:00
Chris Lattner
1b8609b570 Add basic support for integer constants in pattern results. 
llvm-svn: 23817
 2005-10-19 04:30:56 +00:00
Chris Lattner
cac2ff4864 Fix some checking that was causing duraid to get a perplexing assertion 
instead of a happy error message

llvm-svn: 23816
 2005-10-19 04:12:14 +00:00