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Commit Graph

143965 Commits

Author SHA1 Message Date
Marek Olsak
a557dbdaf4 AMDGPU: Remove a useless VI SMRD pattern
Summary: already covered by complex patterns

Reviewers: arsenm, nhaehnle, tstellarAMD

Subscribers: kzhuravl, wdng, yaxunl, tony-tye

Differential Revision: https://reviews.llvm.org/D28995

llvm-svn: 293477
2017-01-30 12:25:14 +00:00
Marek Olsak
2e4174c34a AMDGPU: Fix assembler encoding for EXP instructions on VI
Reviewers: arsenm, tstellarAMD

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, tony-tye

Differential Revision: https://reviews.llvm.org/D28992

llvm-svn: 293476
2017-01-30 12:25:03 +00:00
Daniel Berlin
39077e1d87 Revert "[MemorySSA] Revert r293361 and r293363, as the tests fail under asan."
This reverts commit r293471, reapplying r293361 and r293363 with a fix
for an out-of-bounds read.

llvm-svn: 293474
2017-01-30 11:35:39 +00:00
Sam McCall
f48206b9c8 [MemorySSA] Revert r293361 and r293363, as the tests fail under asan.
llvm-svn: 293471
2017-01-30 09:19:50 +00:00
Kristof Beyls
942514e271 [GlobalISel] Add support for indirectbr
Differential Revision: https://reviews.llvm.org/D28079

llvm-svn: 293470
2017-01-30 09:13:18 +00:00
Asaf Badouh
47c6fb27f5 [X86][MCU] replace select with bit manipulation instead of branches
Differential Revision: https://reviews.llvm.org/D28354


 

llvm-svn: 293469
2017-01-30 08:16:59 +00:00
Alexey Bader
06714d2f18 [LanRef] Fix typo in getelementptr example.
Summary: Change B type from double to pointer to double.

Reviewers: delena, sanjoy

Reviewed By: sanjoy

Subscribers: sanjoy, llvm-commits

Differential Revision: https://reviews.llvm.org/D29009

llvm-svn: 293467
2017-01-30 07:38:58 +00:00
Craig Topper
cc9b3bb6e4 [AVX-512] Remove duplicate CodeGenOnly patterns for scalar register broadcast. We can use COPY_TO_REGCLASS like AVX does.
This causes stack spill slots be oversized sometimes, but the same should already be happening with AVX.

llvm-svn: 293464
2017-01-30 06:59:06 +00:00
Sam McCall
68789f144b Include LLVMDumpValue in release builds.
This part of the C API is still used in language bindings.

llvm-svn: 293460
2017-01-30 05:40:52 +00:00
Jonas Paulsson
9835ab8af4 [LoopVectorize] Improve getVectorCallCost() getScalarizationOverhead() call.
By calling getScalarizationOverhead with the CallInst instead of the types of
its arguments, we make sure that only unique call arguments are added to the
scalarization cost.

getScalarizationOverhead() is extended to handle calls by only passing on the
actual call arguments (which is not all the operands).

This also eliminates a wrapper function with the same name.

review: Hal Finkel
llvm-svn: 293459
2017-01-30 05:38:05 +00:00
Craig Topper
6e2f398822 [AVX-512] Remove KSET0B/KSET1B in favor of the patterns that select KSET0W/KSET1W for v8i1.
llvm-svn: 293458
2017-01-30 05:37:47 +00:00
Davide Italiano
cdd18faef7 [MemorySSA] Correct an assertion surrounding with parentheses.
llvm-svn: 293453
2017-01-30 03:16:43 +00:00
Will Dietz
21250da05e Test RuntimeDyld doesn't crash with R_X86_64_NONE (r293388).
Largely based on LLD test for dtrace.

llvm-svn: 293451
2017-01-30 01:28:42 +00:00
Craig Topper
8f052b2fcd [AVX-512] Don't reuse VSHLI/VSRLI for mask register shifts. VSHLI/VSHRI shift within elements while KSHIFT moves whole elements.
llvm-svn: 293448
2017-01-30 00:06:01 +00:00
Chris Ray
c72cdede75 [X86][Disassembler] Added SALC instruction
Reviewers: joe.abbey, craig.topper

Reviewed By: craig.topper

Subscribers: majnemer, llvm-commits

Differential Revision: https://reviews.llvm.org/D29201

llvm-svn: 293447
2017-01-29 23:02:47 +00:00
Craig Topper
f455f0ffda [AVX-512] Fix lowering for mask register concatenation with undef in the lower half.
Previously this test case fired an assertion in getNode because we tried to create an insert_subvector with both input types the same size and the index pointing to half the vector width.

llvm-svn: 293446
2017-01-29 22:53:33 +00:00
Chris Ray
a76ba55906 [X86] Fixing flag usage for RCL and RCR
Summary: The RCL and RCR instructions use the carry flag.

Reviewers: craig.topper

Reviewed By: craig.topper

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29237

llvm-svn: 293441
2017-01-29 20:05:30 +00:00
Matthias Braun
7adfbb9eae MachineInstr: Remove parameter from dump()
The primary use of the dump() functions in LLVM is for use in a
debugger. Unfortunately lldb does not seem to handle default arguments
so using `p SomeMI.dump()` fails and you have to type the longer `p
SomeMI.dump(nullptr)`. Remove the paramter to make the most common use
easy. (You can always construct something like `p
SomeMI.print(dbgs(),MyTII)` if you need more features).

Differential Revision: https://reviews.llvm.org/D29241

llvm-svn: 293440
2017-01-29 18:20:42 +00:00
Simon Pilgrim
9d757d239f [X86][SSE] Lower scalar_to_vector(0) to zero vector
Replaces an xor+movd/movq with an xorps which will be shorter in codesize, avoid an int-fpu transfer, allow modern cores to fast path the result during decode and helps other combines recognise an all-zero vector.

The only reason I can think of that we'd want to keep scalar_to_vector in this case is to help recognise the upper elts are undef but this doesn't seem to be a problem.

Differential Revision: https://reviews.llvm.org/D29097

llvm-svn: 293438
2017-01-29 18:13:37 +00:00
Zvi Rackover
c0ab0a6c7c [X86] Reproducer for pr31719. NFC
llvm-svn: 293437
2017-01-29 17:57:26 +00:00
Matthias Braun
e219baa1b2 llvm-c: Keep LLVMDumpModule() even in release builds
While this probably should be considered a dump debugger utility, the C
API currently has no other ways to print a module to stderr for error
reporting purposes, so keep it even in release builds.

llvm-svn: 293436
2017-01-29 17:52:03 +00:00
Sanjay Patel
25491b6e66 [InstCombine] enable (X >>?,exact C1) << C2 --> X << (C2 - C1) for vectors with splats
llvm-svn: 293435
2017-01-29 17:11:18 +00:00
Sanjay Patel
a2a34d3386 [InstCombine] add tests for shl(shr X, C1), C2 transforms; NFC
llvm-svn: 293434
2017-01-29 16:52:59 +00:00
Saleem Abdulrasool
f4a03e0903 ARM: support -mlong-calls with AEABI TLS on ELF
Support lowering AEABI TLS access (__aeabi_read_tp) with long calls.
This requires adjusting the call sequence to use an indirect call to get
full addressability.

Resolves PR31769!

llvm-svn: 293433
2017-01-29 16:46:22 +00:00
Sanjay Patel
4eb6691ce0 [ValueTracking] clean up lookThroughCast; NFCI
1. Use auto with dyn_cast.
2. Don't use else after return.
3. Convert chain of 'else if' to switch.
4. Improve variable names.

llvm-svn: 293432
2017-01-29 16:34:57 +00:00
Elena Demikhovsky
d9f46a497c [X86 Codegen] Fixed a bug in unsigned saturation
PACKUSWB converts Signed word to Unsigned byte, (the same about DW) and it can't be used for umin+truncate pattern.
AVX-512 VPMOVUS* instructions fit the pattern since they convert Unsigned to Unsigned.

See https://llvm.org/bugs/show_bug.cgi?id=31773

Differential Revision: https://reviews.llvm.org/D29196

llvm-svn: 293431
2017-01-29 13:18:30 +00:00
NAKAMURA Takumi
04feb3f011 Add -mtriple=aarch64-unknown to llvm/test/CodeGen/AArch64/GlobalISel/gisel-abort.ll.
Unsupported target might be induced if default target is neither macho nor elf. (e.g. *-win32)

llvm-svn: 293430
2017-01-29 11:10:34 +00:00
Daniel Berlin
9ac3b40058 NewGVN: Fix where newline is printed in debug printing of memory equivalence
llvm-svn: 293428
2017-01-29 10:26:03 +00:00
Igor Breger
704eff8858 [X86][GlobalISel] Add limited argument lowering support to the IRTranslator.
Summary:
Add limited (i8/i16/i32/i64)  argument lowering support to the IRTranslator.
Inspired by commit 289940.

Reviewers: t.p.northover, qcolombet, ab, zvi, rovka

Reviewed By: rovka

Subscribers: dberris, rovka, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D28987

llvm-svn: 293427
2017-01-29 08:35:42 +00:00
Chandler Carruth
71f68d4a4e [ArgPromote] Move static helpers to modern LLVM naming conventions while
here. NFC.

Simple refactoring while prepping a port to the new PM.

Differential Revision: https://reviews.llvm.org/D29249

llvm-svn: 293426
2017-01-29 08:03:21 +00:00
Chandler Carruth
6d7a3c2465 [ArgPromote] Run clang-format to normalize remarkably idiosyncratic
formatting that has evolved here over the past years prior to making
somewhat invasive changes to thread new PM support through the business
logic.

Differential Revision: https://reviews.llvm.org/D29248

llvm-svn: 293425
2017-01-29 08:03:19 +00:00
Chandler Carruth
96c54155f6 [ArgPromote] Re-arrange the code in a more typical, logical way.
This arranges the static helpers in an order where they are defined
prior to their use to avoid the need of forward declarations, and
collect the core pass components at the bottom below their helpers.

This also folds one trivial function into the pass itself. Factoring
this 'runImpl' was an attempt to help porting to the new pass manager,
however in my attempt to begin this port in earnest it turned out to not
be a substantial help. I think it will be easier to factor things
without it.

This is an NFC change and does a minimal amount of edits over all.
Subsequent NFC cleanups will normalize the formatting with clang-format
and improve the basic doxygen commenting.

Differential Revision: https://reviews.llvm.org/D29247

llvm-svn: 293424
2017-01-29 08:03:16 +00:00
Craig Topper
76620cef51 [SelectionDAG] Make SDNode::getConstantOperandVal an inline method.
It's operation already exists manually in many places without using the method.

llvm-svn: 293421
2017-01-29 06:08:02 +00:00
Justin Hibbits
3f2d5a86d1 Add some Book-E instructions to the asm parser and printer.
Summary:
Adds the following instructions:
* mfpmr
* mtpmr
* icblc
* icblq
* icbtls

Fix the scheduling for mtspr on e5500, which uses CFX0, instead of
SFX0/SFX1 as on e500mc.

Addresses PR 31538.

Differential Revision: https://reviews.llvm.org/D29002

llvm-svn: 293417
2017-01-29 04:55:57 +00:00
Craig Topper
1395699325 [DAGCombiner] Use unsigned for a constant vector index instead of APInt.
The type system requires that the number of vector elements should fit in 32-bits so this should be safe.

llvm-svn: 293414
2017-01-29 04:38:21 +00:00
Craig Topper
a66fe964a5 [DAGCombiner] Remove unnecessary check on the size of the type of the index of EXTRACT_SUBVECTOR.
The type system already requires that the number of vector elements must fit in 32-bits so an index should as well. Even if the type of the index were larger all we care about is that the constant index can fit in 64-bits so that we can call getZExtValue.

llvm-svn: 293413
2017-01-29 04:38:19 +00:00
Craig Topper
355e2dd907 [DAGCombiner] Make sure index of EXTRACT_SUBVECTOR is a constant before trying to use getConstantOperandVal.
llvm-svn: 293412
2017-01-29 04:38:16 +00:00
Lang Hames
d03dc789c1 [Orc][RPC] Have handleOne abandon pending responses upon channel failure.
llvm-svn: 293411
2017-01-29 04:25:16 +00:00
Lang Hames
666c80ef8b [Orc][RPC] Remove redundant braces. NFC.
llvm-svn: 293410
2017-01-29 04:09:01 +00:00
Xinliang David Li
88f1087cc7 Add support to dump dot graph block layout after MBP
Differential Revision: https://reviews.llvm.org/D29141

llvm-svn: 293408
2017-01-29 01:57:02 +00:00
Davide Italiano
56adeb9386 Remove inclusion of SSAUpdater from several passes.
It is, in fact, unused. Found while reviewing Danny's new
SSAUpdater and porting passes to it to see how the new API
looked like.

llvm-svn: 293407
2017-01-29 01:55:24 +00:00
David Majnemer
81a7274bf2 [Target] Add NoSignedZerosFPMath to the TargetOptions constructor
Most flags were already initialized by the TargetOptions constructor but
we missed out on one.  Also, simplify the constructor by using field
initializers when possible.

llvm-svn: 293406
2017-01-29 01:27:08 +00:00
Lang Hames
4b3e1d3723 [Orc][RPC] Remove a couple of redundant calls to abandonAllPendingResponses.
appendCallAsync, which all RPC call functions ultimately build on, will call
abandonAllPendingResponses on channel error. These extra calls are redundant.

llvm-svn: 293405
2017-01-29 00:51:17 +00:00
Craig Topper
a2c64a15f0 [X86] Fix vector ANDN matching to work correctly when both inputs to the AND are XORs.
llvm-svn: 293403
2017-01-28 23:52:09 +00:00
Craig Topper
744e073207 [X86] Add test case that shows failure to use a vector ANDN when both inputs to the AND are XORs.
The matching code tries to canonicalize XOR to the left, but if there are two XORs and only one is a vnot, this canonicalization can prevent matching.

llvm-svn: 293402
2017-01-28 23:52:04 +00:00
Davide Italiano
f07b7b2ae7 [PM] MLSM has been enabled for a way. Reclaim a cl::opt.
llvm-svn: 293401
2017-01-28 23:45:37 +00:00
Kostya Serebryany
603f62b4b7 [libfuzzer] include errno.h. On Ubuntu 14.04 we got away w/o it, but other systems seem to require it
llvm-svn: 293389
2017-01-28 18:56:05 +00:00
Will Dietz
384dabfad9 RuntimeDyldELF: Don't abort on R_X86_64_NONE, it's a no-oop.
llvm-svn: 293388
2017-01-28 18:39:01 +00:00
Will Dietz
9eb3674bd8 AMDGPU: Add GlobalISel to required_libraries.
llvm-svn: 293387
2017-01-28 18:13:08 +00:00
Mohammad Shahid
a2646e67e7 [SLP] Vectorize loads of consecutive memory accesses, accessed in non-consecutive (jumbled) way.
The jumbled scalar loads will be sorted while building the tree and these accesses will be marked to generate shufflevector after the vectorized load with proper mask.

Reviewers: hfinkel, mssimpso, mkuper

Differential Revision: https://reviews.llvm.org/D26905

Change-Id: I9c0c8e6f91a00076a7ee1465440a3f6ae092f7ad
llvm-svn: 293386
2017-01-28 17:59:44 +00:00