Eric Christopher
a7456220ba
Regenerate configure and friends for Chad.
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llvm-svn: 135592
2011-07-20 17:04:49 +00:00
Jay Foad
03130446b5
Fix a GCC warning.
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llvm-svn: 135581
2011-07-20 08:15:21 +00:00
Evan Cheng
55d7fcc5f7
- Move CodeModel from a TargetMachine global option to MCCodeGenInfo.
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- Introduce JITDefault code model. This tells targets to set different default
code model for JIT. This eliminates the ugly hack in TargetMachine where
code model is changed after construction.
llvm-svn: 135580
2011-07-20 07:51:56 +00:00
Evan Cheng
abb07a0c9d
Include MCRegisterInfo to eliminate a compilation warning.
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llvm-svn: 135575
2011-07-20 06:54:19 +00:00
Francois Pichet
74e35bf8ec
Fix the CMake build.
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llvm-svn: 135573
2011-07-20 06:35:24 +00:00
Evan Cheng
380dc98371
Add MCObjectFileInfo and sink the MCSections initialization code from
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TargetLoweringObjectFileImpl down to MCObjectFileInfo.
TargetAsmInfo is done to one last method. It's *almost* gone!
llvm-svn: 135569
2011-07-20 05:58:47 +00:00
Andrew Trick
57280c0f11
indvars: Added getInsertPointForUses to find a valid place to truncate the IV.
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llvm-svn: 135568
2011-07-20 05:32:06 +00:00
Andrew Trick
9c4333db13
indvars -disable-iv-rewrite: Add NarrowIVDefUse to cache def-use
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info. Holding Use* pointers is bad form even though it happened to
work in this case.
llvm-svn: 135566
2011-07-20 04:39:24 +00:00
NAKAMURA Takumi
19d48c106d
X86Subtarget.h: Assume "x86_64-cygwin", though it has not been released yet, to appease test/CodeGen/X86 on cygwin.
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llvm-svn: 135564
2011-07-20 04:02:20 +00:00
Eric Christopher
7510091996
New pointer rotate test.
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llvm-svn: 135562
2011-07-20 03:09:11 +00:00
Eric Christopher
51af0c896c
Extra semi-colon.
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llvm-svn: 135561
2011-07-20 02:44:39 +00:00
Andrew Trick
d2b268558b
indvars test case for r135558.
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llvm-svn: 135559
2011-07-20 02:14:37 +00:00
Andrew Trick
ee2d72e5f1
indvars -disable-iv-rewrite fix: derived GEP IVs
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llvm-svn: 135558
2011-07-20 02:08:58 +00:00
Benjamin Kramer
679af0868f
Don't leak CodeGenInfos.
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llvm-svn: 135555
2011-07-20 01:27:58 +00:00
Akira Hatanaka
a9cbfe8f88
Change name of class.
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llvm-svn: 135550
2011-07-20 00:53:09 +00:00
Akira Hatanaka
f61c905927
Define classes for definitions of atomic instructions.
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llvm-svn: 135546
2011-07-20 00:23:01 +00:00
Bill Wendling
f3325864ce
Build and install the archive when building the Apple way.
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llvm-svn: 135538
2011-07-19 23:33:42 +00:00
Akira Hatanaka
a50bbdfe15
Lower memory barriers to sync instructions.
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llvm-svn: 135537
2011-07-19 23:30:50 +00:00
Evan Cheng
9a80b0a7e6
Fix an obvious typo that's preventing x86 (32-bit) from using .literal16.
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llvm-svn: 135535
2011-07-19 23:14:32 +00:00
Eli Friedman
f809f44cf5
PR10386: Don't try to split an edge from an indirectbr.
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llvm-svn: 135534
2011-07-19 22:59:41 +00:00
Benjamin Kramer
f5ca440fd0
Fix off-by-one.
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llvm-svn: 135533
2011-07-19 22:59:25 +00:00
Jim Grosbach
e70c8eb49a
Tweak ARM assembly parsing and printing of MSR instruction.
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The system register spec should be case insensitive. The preferred form for
output with mask values of 4, 8, and 12 references APSR rather than CPSR.
Update and tidy up tests accordingly.
llvm-svn: 135532
2011-07-19 22:45:10 +00:00
Devang Patel
65afdd27d0
Distinguish between two copies of one inlined variable.
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llvm-svn: 135528
2011-07-19 22:31:15 +00:00
Jim Grosbach
720b8c6578
ARM assembly parsing of MRS instruction.
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Teach the parser to recognize the APSR and SPSR system register names. Add
and update tests accordingly.
llvm-svn: 135527
2011-07-19 21:59:29 +00:00
Owen Anderson
ad0f17c102
Enhance the FixedLengthDecoder to be able to generate plausible-looking decoders for ARM.
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llvm-svn: 135524
2011-07-19 21:06:00 +00:00
Akira Hatanaka
cccc5fca34
Change variable name.
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llvm-svn: 135522
2011-07-19 20:56:53 +00:00
Jim Grosbach
66af8b4a40
ARM assembly parsing for MRC/MRC2/MRRC/MRRC2.
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Add range checking to the immediate operands. Update tests accordingly.
llvm-svn: 135521
2011-07-19 20:35:35 +00:00
Akira Hatanaka
14e517df43
Use the correct opcodes: SLLV/SRLV or AND must be used instead of SLL/SRL or
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ANDi, when the instruction does not have any immediate operands.
llvm-svn: 135520
2011-07-19 20:34:00 +00:00
Jim Grosbach
40cce44255
Move mr[r]c[2] ARM tests and tidy up a bit.
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llvm-svn: 135517
2011-07-19 20:28:56 +00:00
Jim Grosbach
69686aec2b
ARM testcases for MOVT.
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llvm-svn: 135516
2011-07-19 20:23:25 +00:00
Akira Hatanaka
b4db39fa83
Use descriptive variable names.
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llvm-svn: 135514
2011-07-19 20:11:17 +00:00
Jim Grosbach
9debba28ed
ARM assembly parsing for MOV (register).
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Correct the handling of the 's' suffix when parsing ARM mode. It's only a
truly separate opcode in Thumb. Add test cases to make sure we handle
the s and condition suffices correctly, including diagnostics.
llvm-svn: 135513
2011-07-19 20:10:31 +00:00
Jim Grosbach
7e61a1ecf2
Tidy up.
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llvm-svn: 135507
2011-07-19 19:47:11 +00:00
Jim Grosbach
8ebe7d700a
Tighten conditional for 'mov' cc_out.
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Make sure we only clobber the cc_out operand if it is indeed a default
non-setting operand.
llvm-svn: 135506
2011-07-19 19:45:44 +00:00
Devang Patel
5a4bb57ec5
Reapply r135457. This needs llvm-gcc change, that I forgot to check-in yesterday.
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llvm-svn: 135504
2011-07-19 19:41:54 +00:00
Jim Grosbach
294b83e3e2
ARM assembly parsing for MOV (immediate).
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Add range checking for the immediate operand and handle the "mov" mnemonic
choosing between encodings based on the value of the immediate. Add tests
for fixups, encoding choice and values, and diagnostic for out of range values.
llvm-svn: 135500
2011-07-19 19:13:28 +00:00
Jim Grosbach
0789ef018d
Whitespace.
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llvm-svn: 135499
2011-07-19 19:02:39 +00:00
Jim Grosbach
14e26dd644
Remove unused code.
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cc_out and pred operands are added during parsing via custom C++ now.
llvm-svn: 135497
2011-07-19 18:32:48 +00:00
Akira Hatanaka
19c16a84ff
Fix comments.
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llvm-svn: 135496
2011-07-19 18:19:40 +00:00
Akira Hatanaka
f59cbeec14
Remove redundant instructions.
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- In EmitAtomicBinaryPartword, mask incr in loopMBB only if atomic.swap is the
instruction being expanded, instead of masking it in thisMBB.
- Remove redundant Or in EmitAtomicCmpSwap.
llvm-svn: 135495
2011-07-19 18:14:26 +00:00
Akira Hatanaka
57d207bc7b
Separate code that modifies control flow from code that adds instruction to
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basic blocks.
llvm-svn: 135490
2011-07-19 17:09:53 +00:00
Jim Grosbach
31cda4ed6d
ARM range checking for so_imm operands in assembly parsing.
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llvm-svn: 135489
2011-07-19 16:50:30 +00:00
Bob Wilson
7c9092c9aa
Revert "Make a provision to encode inline location in a variable. This will enable dwarf writer to easily distinguish between two instances of a inlined variable in one basic block."
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This reverts commit 9fec5e346efdf744b151ae6604f912908315fa7a.
llvm-svn: 135486
2011-07-19 16:32:50 +00:00
Bob Wilson
c7cb9841ca
Revert "Update docs to reflect r135457."
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This reverts commit ba034c0a2e71303c7cf3f43ca8e69dc8436b32e2.
llvm-svn: 135485
2011-07-19 16:31:58 +00:00
Jay Foad
6d007bef3c
Convert ConstantFoldGetElementPtr to use ArrayRef.
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llvm-svn: 135483
2011-07-19 15:30:30 +00:00
Jay Foad
bbbf29aab7
Convert SimplifyGEPInst to use ArrayRef.
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llvm-svn: 135482
2011-07-19 15:07:52 +00:00
Jay Foad
83a0e1fa99
Convert gep_type_begin and gep_type_end to use ArrayRef.
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llvm-svn: 135481
2011-07-19 14:42:50 +00:00
Jay Foad
0974b71f17
Convert TargetData::getIndexedOffset to use ArrayRef.
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llvm-svn: 135478
2011-07-19 14:01:37 +00:00
Jay Foad
ae5894c5cc
Use ArrayRef in ConstantFoldInstOperands and ConstantFoldCall.
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llvm-svn: 135477
2011-07-19 13:32:40 +00:00
Richard Osborne
b469141419
Add intrinsics for the zext / sext instructions.
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llvm-svn: 135476
2011-07-19 13:28:50 +00:00