1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-21 12:02:58 +02:00
Commit Graph

150644 Commits

Author SHA1 Message Date
Nirav Dave
a8e1f97e9f Update constants in complex-return test to prevent reduction to smaller constants
llvm-svn: 306192
2017-06-24 01:29:24 +00:00
Derek Schuff
12579ccf87 [WebAssembly] Fix build after r306177
llvm-svn: 306190
2017-06-24 01:00:43 +00:00
Rafael Espindola
1866e3eb13 Remove redundant argument.
llvm-svn: 306189
2017-06-24 00:26:57 +00:00
Rafael Espindola
e03485fce2 Fix use of uninitialized value.
llvm-svn: 306188
2017-06-24 00:18:15 +00:00
Lang Hames
7b43a9c7c5 [ORC] Re-apply r306166 and r306168 with fix for regression test.
llvm-svn: 306182
2017-06-23 23:25:28 +00:00
Zachary Turner
68fda3e094 [llvm-pdbutil] Dump raw bytes of module symbols and debug chunks.
llvm-svn: 306179
2017-06-23 23:08:57 +00:00
Rafael Espindola
ac446b5f8d Move Value adjustment to applyFixup. NFC.
llvm-svn: 306178
2017-06-23 23:05:15 +00:00
Rafael Espindola
4a88e44b0d ARM: move some logic from processFixupValue to applyFixup.
processFixupValue is called on every relaxation iteration. applyFixup
is only called once at the very end. applyFixup is then the correct
place to do last minute changes and value checks.

While here, do proper range checks again for fixup_arm_thumb_bl. We
used to do it, but dropped because of thumb2. We now do it again, but
use the thumb2 range.

llvm-svn: 306177
2017-06-23 22:52:36 +00:00
Rafael Espindola
b766456220 This reverts commit r306166 and r306168.
Revert "[ORC] Remove redundant semicolons from DEFINE_SIMPLE_CONVERSION_FUNCTIONS uses."
Revert "[ORC] Move ORC IR layer interface from addModuleSet to addModule and fix the module type as std::shared_ptr<Module>."

They broke ExecutionEngine/OrcMCJIT/test-global-ctors.ll on linux.

llvm-svn: 306176
2017-06-23 22:50:24 +00:00
Petar Jovanovic
6ce379ed1b Reland r306095: [mips] Fix reg positions in the aui/daui instructions
After fixing (r306173) a failing test in the lld test suite (r306173),
reland r306095.

Original commit message:

  [mips] Fix register positions in the aui/daui instructions

  Swapped the position of the rt and rs register in the aui/daui
  instructions for mips32r6 and mips64r6. With this change, the format of
  the generated instructions complies with specifications and GCC.
  Patch by Milos Stojanovic.

llvm-svn: 306174
2017-06-23 22:37:19 +00:00
Reid Kleckner
06075685d3 [llvm-readobj] Fix COFF RVA table dumping bug
We would return an error in getVaPtr if the RVA table being dumped was
the last data in the .rdata section. Avoid the issue by subtracting one
from the offset and adding it back to get an open interval again.

llvm-svn: 306171
2017-06-23 22:12:11 +00:00
Geoff Berry
66526dcfd5 [AArch64][Falkor] Remove some non-existent opcodes from sched detail regexes. NFC.
llvm-svn: 306170
2017-06-23 21:59:09 +00:00
Eugene Zelenko
403aa6c77c [DebugInfo] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
llvm-svn: 306169
2017-06-23 21:57:40 +00:00
Lang Hames
531daa9d45 [ORC] Remove redundant semicolons from DEFINE_SIMPLE_CONVERSION_FUNCTIONS uses.
llvm-svn: 306168
2017-06-23 21:56:09 +00:00
Zachary Turner
5bcb7f9566 [llvm-pdbutil] Dump raw bytes of type and id records.
llvm-svn: 306167
2017-06-23 21:50:54 +00:00
Lang Hames
1f6bb5ebe0 [ORC] Move ORC IR layer interface from addModuleSet to addModule and fix the
module type as std::shared_ptr<Module>.

llvm-svn: 306166
2017-06-23 21:45:29 +00:00
Anna Thomas
d5cade06d3 Revert "[LoopDeletion] NFC: Move phi node value setting into prepass"
This reverts commit r306157.
It caused some timeouts in clang tests. Perhaps unreachable loops have
far too many phi nodes.
Reverting and investigating.

llvm-svn: 306162
2017-06-23 21:30:48 +00:00
Zachary Turner
a5aa4dd5a1 [llvm-pdbutil] Dump raw bytes of various DBI stream subsections.
llvm-svn: 306160
2017-06-23 21:11:54 +00:00
Vadzim Dambrouski
30cbe58e68 [MSP430] Fix data layout string.
Summary:
Without this patch some types have incorrect size and/or alignment
according to the MSP430 EABI.

Reviewers: asl, awygle

Reviewed By: asl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34561

llvm-svn: 306159
2017-06-23 21:11:45 +00:00
Nirav Dave
3cbf4263b2 Add bitcast store-merge test.
llvm-svn: 306158
2017-06-23 20:52:14 +00:00
Anna Thomas
e1644bb60d [LoopDeletion] NFC: Move phi node value setting into prepass
Currently, the implementation of delete dead loops has a special case
when the loop being deleted is never executed. This special case
(updating of exit block's incoming values for phis) can be
run as a prepass for non-executable loops before performing
the actual deletion.

llvm-svn: 306157
2017-06-23 20:38:50 +00:00
Craig Topper
6d50fa93b3 [APInt] Make the single word cases of isMaxSignedValue/isMinSignedValue just compare with the expected value rather than counting bits. NFCI
llvm-svn: 306155
2017-06-23 20:28:52 +00:00
Craig Topper
aff2a3c641 [APInt] Use trailing bit counting methods instead of population count method in isAllOnesValue, isMaxSigendValue, and isMinSignedValue. NFCI
The trailing bit methods will early out if they find a bit of the opposite while popcount must always look at all bits. I also assume that more CPUs implement trailing bit counting with native instructions than population count.

llvm-svn: 306154
2017-06-23 20:28:49 +00:00
Craig Topper
000d0b4e5f [APInt] Move the single word cases of countTrailingZeros and countLeadingOnes inline for consistency with countTrailingOnes and countLeadingZeros. NFCI
llvm-svn: 306153
2017-06-23 20:28:45 +00:00
Craig Topper
1c7173d459 [CorrelatedValuePropagation] Fix typo in comment sense->since. NFC
llvm-svn: 306152
2017-06-23 20:28:40 +00:00
Craig Topper
aadab27637 [CorrelatedValuePropagation] Remove comment about iterating switch cases in reverse order. This is no longer being done after r298791. NFC
llvm-svn: 306151
2017-06-23 20:28:35 +00:00
Zachary Turner
b33f95af4f [llvm-pdbutil] Show what blocks a stream occupies.
This is useful when you want to look at a specific chunk of a
stream or look for discontinuities, and you need to know the
list of blocks occupied by a stream.

llvm-svn: 306150
2017-06-23 20:28:14 +00:00
Zachary Turner
086ec4ddf5 [llvm-pdbutil] Dump raw bytes of pdb name map.
This patch dumps the raw bytes of the pdb name map which contains
the mapping of stream name to stream index for the string table
and other reserved streams.

llvm-svn: 306148
2017-06-23 20:18:38 +00:00
Brian Gesiak
b0b7e2b937 [opt-viewer] Remove positional arg checks (NFC)
Summary:
opt-stats.py and opt-viewer.py's argument parsers both take a positional
argument 'yaml_files'. Positional arguments in Python's argparse module are
required by default, so the subsequent checks for `len(args.yaml_files) == 0`
are unnecessary -- if the length was zero, then the call to
`parser.parse_args()` would have thrown an error already.

Because there is no way for `len(args.yaml_files)` to be zero at these
points, removing the code is NFC.

Reviewers: anemet, davidxl

Reviewed By: anemet

Subscribers: llvm-commits, fhahn

Differential Revision: https://reviews.llvm.org/D34567

llvm-svn: 306147
2017-06-23 20:06:34 +00:00
Zachary Turner
e26961f9a6 [llvm-pdbutil] Add the ability to dump raw bytes from the file.
Normally we can only make sense of the content of a PDB in terms
of streams and blocks, but in some cases it may be useful to dump
bytes at a specific absolute file offset.  For example, if you
know that some interesting data is at a particular location and
you want to see some surrounding data.

llvm-svn: 306146
2017-06-23 19:54:44 +00:00
Krzysztof Parzyszek
dc91b9896c Revert "[Hexagon] Handle decreasing of stack alignment in frame lowering"
This breaks passing of aligned function arguments.

llvm-svn: 306145
2017-06-23 19:47:04 +00:00
Chad Rosier
ef448d0349 [AArch64] Prefer Bcc to CBZ/CBNZ/TBZ/TBNZ when NZCV flags can be set for "free".
This patch contains a pass that transforms CBZ/CBNZ/TBZ/TBNZ instructions into a
conditional branch (Bcc), when the NZCV flags can be set for "free". This is
preferred on targets that have more flexibility when scheduling Bcc
instructions as compared to CBZ/CBNZ/TBZ/TBNZ (assuming all other variables are
equal). This can reduce register pressure and is also the default behavior for
GCC.

A few examples:

 add w8, w0, w1  -> cmn w0, w1             ; CMN is an alias of ADDS.
 cbz w8, .LBB_2  -> b.eq .LBB0_2           ; single def/use of w8 removed.

 add w8, w0, w1  -> adds w8, w0, w1        ; w8 has multiple uses.
 cbz w8, .LBB1_2 -> b.eq .LBB1_2

 sub w8, w0, w1       -> subs w8, w0, w1   ; w8 has multiple uses.
 tbz w8, #31, .LBB6_2 -> b.ge .LBB6_2

In looking at all current sub-target machine descriptions, this transformation
appears to be either positive or neutral.

Differential Revision: https://reviews.llvm.org/D34220.

llvm-svn: 306144
2017-06-23 19:20:12 +00:00
whitequark
c10d7c92e0 [X86] Fix SP adjustment in stack probes emitted on 32-bit Windows.
Commit r306010 adjusted the condition as follows:

-  if (Is64Bit) {
+  if (!STI.isTargetWin32()) {

The intent was to preserve the behavior on all Windows platforms
but extend the behavior on 64-bit Windows platforms to every
other one. (Before r306010, emitStackProbeCall only ever executed
when emitting code for Windows triples.)

Unfortunately,
  if (Is64Bit && STI.isOSWindows())
is not the same as
  if (!STI.isTargetWin32())
because of the way isTargetWin32() is defined:

  bool isTargetWin32() const {
    return !In64BitMode && (isTargetCygMing() ||
                            isTargetKnownWindowsMSVC());
  }

In practice this broke the JIT tests on 32-bit Windows, which did not
satisfy the new condition:

    LLVM :: ExecutionEngine/MCJIT/2003-01-15-AlignmentTest.ll
    LLVM :: ExecutionEngine/MCJIT/2003-08-15-AllocaAssertion.ll
    LLVM :: ExecutionEngine/MCJIT/2003-08-23-RegisterAllocatePhysReg.ll
    LLVM :: ExecutionEngine/MCJIT/test-loadstore.ll
    LLVM :: ExecutionEngine/OrcMCJIT/2003-01-15-AlignmentTest.ll
    LLVM :: ExecutionEngine/OrcMCJIT/2003-08-15-AllocaAssertion.ll
    LLVM :: ExecutionEngine/OrcMCJIT/2003-08-23-RegisterAllocatePhysReg.ll
    LLVM :: ExecutionEngine/OrcMCJIT/test-loadstore.ll

because %esp was not updated correctly. The failures are only visible
on a MSVC 2017 Debug build, for which we do not have bots.

llvm-svn: 306142
2017-06-23 18:58:10 +00:00
Zachary Turner
287c1c9e0d [llvm-pdbutil] Add a function for formatting MSF data.
The goal here is to make it possible to display absolute
file offsets when dumping byets from an MSF.  The problem is
that when dumping bytes from an MSF, often the bytes will
cross a block boundary and encounter a discontinuity.  We
can't use the normal formatBinary() function for this because
this would just treat the sequence as entirely ascending, and
not account out-of-order blocks.

This patch adds a formatMsfData() function to our printer, and
then uses this function to improve the output of the -stream-data
command line option for dumping bytes from a particular stream.

Test coverage is also expanded to make sure to include all possible
scenarios of offsets, sizes, and crossing block boundaries.

llvm-svn: 306141
2017-06-23 18:52:13 +00:00
Krzysztof Parzyszek
055ab5f02b [Hexagon] Remove call to printAndVerify from HexagonPassConfig
It causes an extra pass of the machine verifier to be added to the pass
manager, and causes test/CodeGen/Generic/llc-start-stop.ll to fail.

llvm-svn: 306140
2017-06-23 18:47:55 +00:00
Sanjay Patel
312d2a746a [x86] fix value types for SBB transform (PR33560)
I'm not sure yet why this wouldn't fail in the simple case,
but clearly I used the wrong value type with:
https://reviews.llvm.org/rL306040

...and the bug manifests with:
https://bugs.llvm.org/show_bug.cgi?id=33560

llvm-svn: 306139
2017-06-23 18:42:15 +00:00
Simon Pilgrim
1ace1d14c9 [X86][AVX] Regenerate i256 bitcasted store test
Check on slow/fast unaligned memory targets

llvm-svn: 306138
2017-06-23 18:34:56 +00:00
Simon Pilgrim
8867fd150f Fix Wdocumentation warning.
llvm-svn: 306133
2017-06-23 18:03:04 +00:00
Simon Pilgrim
e9f8eb86e1 Regenerate extract-store.ll tests
llvm-svn: 306131
2017-06-23 17:19:44 +00:00
Peter Collingbourne
039ac88f8b Fix a misleading indentation warning.
llvm-svn: 306130
2017-06-23 17:17:47 +00:00
Peter Collingbourne
b432a3fa83 Make the size specification for cache_size_bytes case insensitive.
llvm-svn: 306129
2017-06-23 17:13:51 +00:00
Peter Collingbourne
29463000bd Add a ThinLTO cache policy for controlling the maximum cache size in bytes.
This is useful when an upper limit on the cache size needs to be
controlled independently of the amount of the amount of free space.

One use case is a machine with a large number of cache directories
(e.g. a buildbot slave hosting a large number of independent build
jobs). By imposing an upper size limit on each cache directory,
users can more easily estimate the server's capacity.

Differential Revision: https://reviews.llvm.org/D34547

llvm-svn: 306126
2017-06-23 17:05:03 +00:00
Krzysztof Parzyszek
1bf9551e73 [Hexagon] Handle decreasing of stack alignment in frame lowering
llvm-svn: 306124
2017-06-23 16:53:59 +00:00
Zachary Turner
3c9b1c7aba Add a BinarySubstreamRef, and a method to read one.
This is essentially just a BinaryStreamRef packaged with an
offset and the logic for reading one is no different than the
logic for reading a BinaryStreamRef, except that we save the
current offset.

llvm-svn: 306122
2017-06-23 16:38:40 +00:00
Simon Pilgrim
cc47580f50 Remove trailing whitespace. NFCI.
llvm-svn: 306121
2017-06-23 16:35:32 +00:00
Tim Northover
2454dd4f6e GlobalISel: remove G_SEQUENCE instruction.
It was trying to do too many things. The basic lumping together of values for
legalization purposes is now handled by G_MERGE_VALUES. More complex things
involving gaps and odd sizes are handled by G_INSERT sequences.

llvm-svn: 306120
2017-06-23 16:15:55 +00:00
Tim Northover
b1c935a08d GlobalISel: convert buildSequence to use non-deprecated instructions.
G_SEQUENCE is going away soon so as a first step the MachineIRBuilder needs to
be taught how to emulate it with alternatives. We use G_MERGE_VALUES where
possible, and a sequence of G_INSERTs if not.

llvm-svn: 306119
2017-06-23 16:15:37 +00:00
Jun Bum Lim
5a457d3f82 [InlineCost] Do not take INT_MAX when Cost is negative
Summary: visitSwitchInst should not take INT_MAX when Cost is negative. Instead of INT_MAX , we also use a valid upperbound cost when overflow occurs in Cost.

Reviewers: hans, echristo, dmgreen

Reviewed By: dmgreen

Subscribers: mcrosier, javed.absar, llvm-commits, eraman

Differential Revision: https://reviews.llvm.org/D34436

llvm-svn: 306118
2017-06-23 16:12:37 +00:00
Ulrich Weigand
c7437c5490 [SystemZ] Remove unnecessary serialization before volatile loads
This reverts the use of TargetLowering::prepareVolatileOrAtomicLoad
introduced by r196905.  Nothing in the semantics of the "volatile"
keyword or the definition of the z/Architecture actually requires
that volatile loads are preceded by a serialization operation, and
no other compiler on the platform actually implements this.

Since we've now seen a use case where this additional serialization
causes noticable performance degradation, this patch removes it.

The patch still leaves in the serialization before atomic loads,
which is now implemented directly in lowerATOMIC_LOAD.  (This also
seems overkill, but that can be addressed separately.)

llvm-svn: 306117
2017-06-23 15:56:14 +00:00
Sanjay Patel
ad0e7996a1 [x86] auto-generate complete checks; NFC
llvm-svn: 306114
2017-06-23 15:29:49 +00:00