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Author SHA1 Message Date
Jim Grosbach
a9a0c62719 Remove unused Target argument from AsmParser construction methods. 
The argument is unused, and is a layering violation in any case.

llvm-svn: 137735
 2011-08-16 18:33:49 +00:00
Bruno Cardoso Lopes
d64294fb0a Instead of always leaving the work to the generic legalizer when 
there is no support for native 256-bit shuffles, be more smart in some
cases, for example, when you can extract specific 128-bit parts and use
regular 128-bit shuffles for them. Example:

For this shuffle:
  shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32>
                <i32 1, i32 0, i32 7, i32 6>

This was expanded to:
  vextractf128  $1, %ymm1, %xmm2
  vpextrq $0, %xmm2, %rax
  vmovd %rax, %xmm1
  vpextrq $1, %xmm2, %rax
  vmovd %rax, %xmm2
  vpunpcklqdq %xmm1, %xmm2, %xmm1
  vpextrq $0, %xmm0, %rax
  vmovd %rax, %xmm2
  vpextrq $1, %xmm0, %rax
  vmovd %rax, %xmm0
  vpunpcklqdq %xmm2, %xmm0, %xmm0
  vinsertf128 $1, %xmm1, %ymm0, %ymm0
  ret

Now we get:
  vshufpd $1, %xmm0, %xmm0, %xmm0
  vextractf128  $1, %ymm1, %xmm1
  vshufpd $1, %xmm1, %xmm1, %xmm1
  vinsertf128 $1, %xmm1, %ymm0, %ymm0

llvm-svn: 137733
 2011-08-16 18:21:54 +00:00
Devang Patel
28ad105008 Remove unnecessary version check. 
llvm-svn: 137728
 2011-08-16 17:41:41 +00:00
Jim Grosbach
90387c44f4 ARM .align NOP padding uses different encoding pre-ARMv6. 
Patch by Kristof Beyls and James Malloy.

llvm-svn: 137723
 2011-08-16 17:06:20 +00:00
Nadav Rotem
7b211baed3 Revert r137562 because it caused PR10674 
llvm-svn: 137719
 2011-08-16 14:34:29 +00:00
David Chisnall
cfbcd5cf21 Add a mechanism for optimisation plugins to register passes that all front ends can use without needing to be aware of the plugin (or the plugin be aware of the front end). 
Before 3.0, I'd like to add a mechanism for automatically loading a set of plugins from a config file.  API suggestions welcome...

llvm-svn: 137717
 2011-08-16 13:58:41 +00:00
Bill Wendling
3e159bd43d A few places where we want to skip the landingpad instruction for insertion. 
llvm-svn: 137712
 2011-08-16 04:52:55 +00:00
Akira Hatanaka
12df91513e Fix handling of double precision loads and stores when Mips1 is targeted. 
Mips1 does not support double precision loads or stores, therefore two single
precision loads or stores must be used in place of these instructions. This 
patch treats double precision loads and stores as if they are legal
instructions until MCInstLowering, instead of generating the single precision
instructions during instruction selection or Prolog/Epilog code insertion.

Without the changes made in this patch, llc produces code that has the same 
problem described in r137484 or bails out when
MipsInstrInfo::storeRegToStackSlot or loadRegFromStackSlot is called before
register allocation.

llvm-svn: 137711
 2011-08-16 03:51:51 +00:00
Akira Hatanaka
d8865ea155 Define function MipsMCInstLower::LowerOperand. 
llvm-svn: 137707
 2011-08-16 02:21:03 +00:00
Akira Hatanaka
1e1909b7c8 Add parameter Offset to MipsMCInstLower::LowerSymbolOperand. 
llvm-svn: 137706
 2011-08-16 02:15:03 +00:00
Eli Friedman
66e399697a Revert a bit of r137667; the logic in question can safely handle atomic load/store. 
llvm-svn: 137702
 2011-08-16 01:28:22 +00:00
Eli Friedman
f969dabf83 After talking with Bill, it seems like the LandingPad handling here is likely 
to be wrong (or at least somewhat suspect).  Leave a FIXME for Bill.

llvm-svn: 137694
 2011-08-16 00:41:37 +00:00
Eli Friedman
eb7e5209e5 Minor comment fixes. 
llvm-svn: 137693
 2011-08-16 00:20:11 +00:00
Eli Friedman
6a475e691d Update SimplifyCFG for atomic operations. 
This commit includes a mention of the landingpad instruction, but it's not
changing the behavior around it.  I think the current behavior is correct,
though.  Bill, can you double-check that?

llvm-svn: 137691
 2011-08-15 23:59:28 +00:00
Eli Friedman
f0e7c084ea Add comments and test for atomic load/store and mem2reg. 
llvm-svn: 137690
 2011-08-15 23:55:52 +00:00
Devang Patel
00c82827ab Refactor. 
llvm-svn: 137689
 2011-08-15 23:47:24 +00:00
Owen Anderson
2e722e7cd4 Specify a necessary fixed bit for VLD3DUP, and otherwise rearrange the Thumb2 NEON decoding hooks to bring us closer to correctness. 
llvm-svn: 137686
 2011-08-15 23:38:54 +00:00
Bruno Cardoso Lopes
f026c60f3d While I'm here, remove the "_alt" hacks to a series of INSERT_SUBREG and 
also add the AVX versions of the 128-bit patterns

llvm-svn: 137685
 2011-08-15 23:36:51 +00:00
Bruno Cardoso Lopes
1e817d1451 Reorder declarations of vmovmskp* and also put the necessary AVX 
predicate and TB encoding fields. This fix the encoding for the
attached testcase. This fixes PR10625.

llvm-svn: 137684
 2011-08-15 23:36:45 +00:00
Devang Patel
822410da56 Continue to hoist uses of getCompileUnit() up. The goal is to get rid of uses of getCompileUnit(). 
llvm-svn: 137683
 2011-08-15 23:36:40 +00:00
Bill Wendling
3a5b0249c3 In places where it's using "getFirstNonPHI", skip the landingpad instruction if necessary. 
llvm-svn: 137679
 2011-08-15 23:19:54 +00:00
Jim Grosbach
31c0c9a1f6 MCTargetAsmParser target match predicate support. 
Allow a target assembly parser to do context sensitive constraint checking
on a potential instruction match. This will be used, for example, to handle
Thumb2 IT block parsing.

llvm-svn: 137675
 2011-08-15 23:03:29 +00:00
Devang Patel
f1b61abc8c Add a finalize() hook, that'll let DIBuilder construct compile unit lazily. 
llvm-svn: 137673
 2011-08-15 23:00:00 +00:00
Bill Wendling
3016a47ed2 Don't sink the instruction to before a landingpad instruction. 
llvm-svn: 137672
 2011-08-15 22:53:05 +00:00
Devang Patel
e0aa92d509 This is somewhat déjà-vu, but avoid using getCompileUnit() as much as possible. 
llvm-svn: 137668
 2011-08-15 22:24:32 +00:00
Eli Friedman
fdd5480178 Update inter-procedural optimizations for atomic load/store. 
llvm-svn: 137667
 2011-08-15 22:16:46 +00:00
Eli Friedman
36ef5fd140 Update instcombine for atomic load/store. 
llvm-svn: 137664
 2011-08-15 22:09:40 +00:00
Devang Patel
8fe83ecaf3 Refactor. Variables are part of compile unit so let CompileUnit create new variable. 
llvm-svn: 137663
 2011-08-15 22:04:40 +00:00
Eli Friedman
a88908f4e7 Add some comments here because the lack of a check for volatile/atomic here is a bit unusual. 
llvm-svn: 137662
 2011-08-15 21:56:39 +00:00
Bruno Cardoso Lopes
b81c3ed76d Fix PR10656. It's only profitable to use 128-bit inserts and extracts 
when AVX mode is one. Otherwise is just more work for the type
legalizer.

llvm-svn: 137661
 2011-08-15 21:45:54 +00:00
Devang Patel
f5e3a86ea0 There is no need to maintain a set to keep track of variables that use location expressions. In such cases, AT_location attribute's value will be a label. 
llvm-svn: 137659
 2011-08-15 21:43:21 +00:00
Devang Patel
9ea2ce9b7b Fix warning. 
llvm-svn: 137658
 2011-08-15 21:35:16 +00:00
Devang Patel
1113107823 Simplify. Let DbgVariable keep track of variable's DBG_VALUE machine instruction. 
llvm-svn: 137656
 2011-08-15 21:24:36 +00:00
Bill Wendling
a75d2d0416 Duncan pointed out that the LandingPadInst might read memory. (It might also 
write to memory.) Marking it as such makes some checks for immobility go away.

llvm-svn: 137655
 2011-08-15 21:14:31 +00:00
Eli Friedman
b25f5aeda5 Fix llvm::CloneModule to correctly clone globals. Patch per bug report by Simon Moll on llvmdev. 
llvm-svn: 137654
 2011-08-15 21:05:06 +00:00
Eli Friedman
bfebfae6f6 Fix predicates methods on Instruction to handle atomic load/store correctly. 
llvm-svn: 137652
 2011-08-15 21:00:18 +00:00
Eli Friedman
5acfaeab2d Misc analysis passes that need to be aware of atomic load/store. 
llvm-svn: 137650
 2011-08-15 20:54:19 +00:00
Eli Friedman
e18709e5b2 Atomic load/store support in LICM. 
llvm-svn: 137648
 2011-08-15 20:52:09 +00:00
Owen Anderson
42946000dd Enforce the constraint that Rt must be even on LDRD/STRD instructions in ARM mode. Update tests to reflect this fact. 
Patch by James Molloy.

llvm-svn: 137647
 2011-08-15 20:51:32 +00:00
Owen Anderson
f86afc2459 Remove dead classes. 
llvm-svn: 137643
 2011-08-15 20:11:11 +00:00
Bill Wendling
0c8837a1f1 The "landingpad" instruction will never be "trivially" dead. 
llvm-svn: 137642
 2011-08-15 20:10:51 +00:00
Owen Anderson
4854258d9c Fix incorrect encoding of UMAAL and friends. Patch by James Molloy. 
llvm-svn: 137641
 2011-08-15 20:08:25 +00:00
Devang Patel
7e0fc7cf86 Simplify mapping to variable from its abstract variable info. 
When a variable is inlined multiple places, abstract variable keeps name, location, type etc.. info and all other concreate instances of the variable directly refers to abstract variable.

llvm-svn: 137637
 2011-08-15 19:01:20 +00:00
Owen Anderson
cd94fca93d Fix decoding LDRSB and LDRSH in Thumb1 mode. Patch by James Molloy. 
llvm-svn: 137636
 2011-08-15 19:00:06 +00:00
Owen Anderson
894585de33 Fix problems decoding the to/from-lane NEON memory instructions, and add a comprehensive NEON decoding testcase. 
llvm-svn: 137635
 2011-08-15 18:44:44 +00:00
Devang Patel
2b6f546226 Refactor. 
llvm-svn: 137632
 2011-08-15 18:40:16 +00:00
Devang Patel
84b2564244 Refactor. 
llvm-svn: 137631
 2011-08-15 18:35:42 +00:00
Bill Wendling
a8d6570a7a Don't try to sink the landingpad instruction. It's immobile. 
llvm-svn: 137629
 2011-08-15 18:23:40 +00:00
Bill Wendling
8cc5168e87 The landingpad instruction isn't loop-invariant. 
llvm-svn: 137628
 2011-08-15 18:22:49 +00:00
Bill Wendling
b0c5dd0ebd Mark the SCC as "might unwind" if we run into a 'resume' instruction. 
llvm-svn: 137627
 2011-08-15 18:22:00 +00:00