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Commit Graph

172724 Commits

Author SHA1 Message Date
Zachary Turner
fd70d7c7f5 Fix a crash in llvm-undname with invalid types.
llvm-svn: 349165
2018-12-14 17:43:56 +00:00
Sanjay Patel
72f91cad26 [SystemZ] make test immune to scalarization improvements; NFC
The undef operands mean this test is probably still too fragile
to accomplish what the comments suggest.

llvm-svn: 349164
2018-12-14 17:28:52 +00:00
Sanjay Patel
623313f3ea [Hexagon] make test immune to scalarization improvements; NFC
llvm-svn: 349163
2018-12-14 17:23:01 +00:00
Sanjay Patel
85107b6d83 [x86] auto-generate complete checks; NFC
llvm-svn: 349162
2018-12-14 16:49:57 +00:00
Sanjay Patel
c4a624d53a [x86] regenerate test checks; NFC
llvm-svn: 349161
2018-12-14 16:46:21 +00:00
Sanjay Patel
c8a6650754 [x86] make tests immune to scalarization improvements; NFC
llvm-svn: 349160
2018-12-14 16:44:58 +00:00
Ehsan Amiri
3516334b63 NFC. Adding an empty line to test the updated commit credentials.
llvm-svn: 349158
2018-12-14 16:19:02 +00:00
Scott Linder
538dfe3e23 Implement -frecord-command-line (-frecord-gcc-switches)
Implement options in clang to enable recording the driver command-line
in an ELF section.

Implement a new special named metadata, llvm.commandline, to support
frontends embedding their command-line options in IR/ASM/ELF.

This differs from the GCC implementation in some key ways:

* In GCC there is only one command-line possible per compilation-unit,
  in LLVM it mirrors llvm.ident and multiple are allowed.
* In GCC individual options are separated by NULL bytes, in LLVM entire
  command-lines are separated by NULL bytes. The advantage of the GCC
  approach is to clearly delineate options in the face of embedded
  spaces. The advantage of the LLVM approach is to support merging
  multiple command-lines unambiguously, while handling embedded spaces
  with escaping.

Differential Revision: https://reviews.llvm.org/D54487
Clang Differential Revision: https://reviews.llvm.org/D54489

llvm-svn: 349155
2018-12-14 15:38:15 +00:00
John Brawn
2e907d9b53 [RegAllocGreedy] IMPLICIT_DEF values shouldn't prefer registers
It costs nothing to spill an IMPLICIT_DEF value (the only spill code that's
generated is a KILL of the value), so when creating split constraints if the
live-out value is IMPLICIT_DEF the exit constraint should be DontCare instead
of PrefReg.

Differential Revision: https://reviews.llvm.org/D55652

llvm-svn: 349151
2018-12-14 14:07:57 +00:00
Diana Picus
47cdb935e0 [ARM GlobalISel] Thumb2: casts between int and ptr
Mark as legal and add tests. Nothing special to do.

llvm-svn: 349147
2018-12-14 13:45:38 +00:00
Diana Picus
d19866cdc7 [ARM GlobalISel] Remove duplicate test. NFCI
Fixup for r349026. I forgot to delete these test functions from the
original file when I moved them to arm-legalize-exts.mir.

llvm-svn: 349146
2018-12-14 13:28:34 +00:00
Diana Picus
36a62f59bc [ARM GlobalISel] Minor refactoring. NFCI
Refactor the ARMInstructionSelector to cache some opcodes in the
constructor instead of checking all the time if we're in ARM or Thumb
mode.

llvm-svn: 349143
2018-12-14 12:37:24 +00:00
Diana Picus
1f523d85de [ARM GlobalISel] Allow simple binary ops in Thumb2
Mark G_ADD, G_SUB, G_MUL, G_AND, G_OR and G_XOR as legal for both ARM
and Thumb2.

Extract the legalizer tests for these opcodes into another file.

Add tests for the instruction selector.

llvm-svn: 349142
2018-12-14 11:58:14 +00:00
Simon Tatham
cd2724a625 [TableGen:AsmWriter] Cope with consecutive tied operands.
When you define an instruction alias as a subclass of InstAlias, you
specify all the MC operands for the instruction it expands to, except
for operands that are tied to a previous one, which you leave out in
the expectation that the Tablegen output code will fill them in
automatically.

But the code in Tablegen's AsmWriter backend that skips over a tied
operand was doing it using 'if' instead of 'while', because it wasn't
expecting to find two tied operands in sequence.

So if an instruction updates a pair of registers in place, so that its
MC representation has two input operands tied to the output ones (for
example, Arm's UMLAL instruction), then any alias which wants to
expand to a special case of that instruction is likely to fail to
match, because the indices of subsequent operands will be off by one
in the generated printAliasInstr function.

This patch re-indents some existing code, so it's clearest when
viewed as a diff with whitespace changes ignored.

Reviewers: fhahn, rengolin, sdesmalen, atanasyan, asb, jholewinski, t.p.northover, kparzysz, craig.topper, stoklund

Reviewed By: rengolin

Subscribers: javed.absar, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D53816

llvm-svn: 349141
2018-12-14 11:39:55 +00:00
Simon Pilgrim
0777513533 Revert rL349136: [llvm-exegesis] Optimize ToProcess in dbScan
Summary:
Use `vector<char> Added + vector<size_t> ToProcess` to replace `SetVector ToProcess`

We also check `Added[P]` to enqueueing a point more than once, which
also saves us a `ClusterIdForPoint_[Q].isUndef()` check.

Reviewers: courbet, RKSimon, gchatelet, john.brawn, lebedev.ri

Subscribers: tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D54442
........
Patch wasn't approved and breaks buildbots

llvm-svn: 349139
2018-12-14 09:25:08 +00:00
Craig Topper
486c1ccebe [DAGCombiner][X86] Prevent visitSIGN_EXTEND from returning N when (sext (setcc)) already has the target desired type for the setcc
Summary:
If the setcc already has the target desired type we can reach the getSetCC/getSExtOrTrunc after the MatchingVecType check with the exact same types as the nodes we started with. This causes those causes VsetCC to be CSEd to N0 and the getSExtOrTrunc will CSE to N. When we return N, the caller will think that meant we called CombineTo and did our own worklist management. But that's not what happened. This prevents target hooks from being called for the node.

To fix this, I've now returned SDValue if the setcc is already the desired type. But to avoid some regressions in X86 I've had to disable one of the target combines that wasn't being reached before in the case of a (sext (setcc)). If we get vector widening legalization enabled that entire function will be deleted anyway so hopefully this is only for the short term.

Reviewers: RKSimon, spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D55459

llvm-svn: 349137
2018-12-14 08:28:24 +00:00
Fangrui Song
35cc05e50f [llvm-exegesis] Optimize ToProcess in dbScan
Summary:
Use `vector<char> Added + vector<size_t> ToProcess` to replace `SetVector ToProcess`

We also check `Added[P]` to enqueueing a point more than once, which
also saves us a `ClusterIdForPoint_[Q].isUndef()` check.

Reviewers: courbet, RKSimon, gchatelet, john.brawn, lebedev.ri

Subscribers: tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D54442

llvm-svn: 349136
2018-12-14 08:27:35 +00:00
Fangrui Song
9a95d5568f [ThinLTO] Fix test added in rL349076
llvm-svn: 349135
2018-12-14 08:21:08 +00:00
Fangrui Song
1f32d67d40 [Object] Rename getRelrRelocationType to getRelativeRelocationType
Summary:
The two utility functions were added in D47919 to support SHT_RELR.
However, these are just relative relocations types and are't
necessarily be named Relr.

Reviewers: phosek, dberris

Reviewed By: dberris

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D55691

llvm-svn: 349133
2018-12-14 07:46:58 +00:00
Petr Hosek
6a4e651274 [llvm-xray] Use correct variable name
This fixes the compiler error introduced in r349129.

llvm-svn: 349130
2018-12-14 06:06:19 +00:00
Petr Hosek
98196da44e [llvm-xray] Store offset pointers in temporaries
DataExtractor::getU64 modifies the OffsetPtr which also pass to
RelocateOrElse which breaks on Windows. This addresses the issue
introduced in r349120.

Differential Revision: https://reviews.llvm.org/D55689

llvm-svn: 349129
2018-12-14 05:56:20 +00:00
Nico Weber
349a17eff9 [gn build] Merge r348963 and r349076
llvm-svn: 349124
2018-12-14 03:20:46 +00:00
Petr Hosek
aa9b3d7c8c [llvm-xray] Support for PIE
When the instrumented binary is linked as PIE, we need to apply the
relative relocations to sleds. This is handled by the dynamic linker
at runtime, but when processing the file we have to do it ourselves.

Differential Revision: https://reviews.llvm.org/D55542

llvm-svn: 349120
2018-12-14 01:37:56 +00:00
Alex Lorenz
6f0d069409 [macho] save the SDK version stored in module metadata into the version min and
build version load commands in the object file

This commit introduces a new metadata node called "SDK Version". It will be set
by the frontend to mark the platform SDK (macOS/iOS/etc) version which was used
during that particular compilation.
This node is used when machine code is emitted, by either saving the SDK version
into the appropriate macho load command (version min/build version), or by
emitting the assembly for these load commands with the SDK version specified as
well.
The assembly for both load commands is extended by allowing it to contain the
sdk_version X, Y [, Z] trailing directive to represent the SDK version
respectively.

rdar://45774000

Differential Revision: https://reviews.llvm.org/D55612

llvm-svn: 349119
2018-12-14 01:14:10 +00:00
Reid Kleckner
ef5fb71f38 Silence CMP0048 warning in the benchmark utility library
I'm testing this in LLVM before sending it upstream.

Part of PR38874

llvm-svn: 349097
2018-12-14 00:17:12 +00:00
Nico Weber
4635e976e8 [gn build] Add infrastructure to create symlinks and use it to create lld's symlinks
This is slightly involved, see the comments in the code.

The GN build now builds a functional lld!

Differential Revision: https://reviews.llvm.org/D55606

llvm-svn: 349096
2018-12-14 00:16:33 +00:00
Sanjay Patel
f44785a46f [DAGCombiner] clean up visitEXTRACT_VECTOR_ELT
This isn't quite NFC, but I don't know how to expose
any outward diffs from these changes. Mostly, this
was confusing because it used 'VT' to refer to the
operand type rather the usual type of the input node.

There's also a large block at the end that is dedicated 
solely to matching loads, but that wasn't obvious. This
could probably be split up into separate functions to
make it easier to see. 

It's still not clear to me when we make certain transforms 
because the legality and constant conditions are 
intertwined in a way that might be improved.

llvm-svn: 349095
2018-12-14 00:09:08 +00:00
Craig Topper
5cd99cd6e6 [X86] Demote EmitTest to a helper function of EmitCmp. Route all callers except EmitCmp through EmitCmp.
This requires the two callers to manifest a 0 to make EmitCmp call EmitTest.

I'm looking into changing how we combine TEST and flag setting instructions to not be part of lowering. And instead be part of DAG combine or isel. Which will mean EmitTest will probably become gutted and maybe disappear entirely.

llvm-svn: 349094
2018-12-13 23:55:30 +00:00
Evgeniy Stepanov
4765d46c23 Revert "[hwasan] Android: Switch from TLS_SLOT_TSAN(8) to TLS_SLOT_SANITIZER(6)"
Breaks sanitizer-android buildbot.

This reverts commit af8443a984c3b491c9ca2996b8d126ea31e5ecbe.

llvm-svn: 349092
2018-12-13 23:47:50 +00:00
Evandro Menezes
6b61a418d6 [AArch64] Fix Exynos predicates (NFC)
Fix the logic in the definition of the `ExynosShiftExPred` as a more
specific version of `ExynosShiftPred`.  But, since `ExynosShiftExPred` is
not used yet, this change has NFC.

llvm-svn: 349091
2018-12-13 23:19:46 +00:00
Wei Mi
a323ae1555 [SampleFDO] handle ProfileSampleAccurate when initializing function entry count
ProfileSampleAccurate is used to indicate the profile has exact match to the
code to be optimized.

Previously ProfileSampleAccurate is handled in ProfileSummaryInfo::isColdCallSite
and ProfileSummaryInfo::isColdBlock. A better solution is to initialize function
entry count to 0 when ProfileSampleAccurate is true, so we don't have to handle
ProfileSampleAccurate in multiple places.

Differential Revision: https://reviews.llvm.org/D55660

llvm-svn: 349088
2018-12-13 21:51:42 +00:00
Aakanksha Patil
ee2b4d8ed1 Revert r348971: [AMDGPU] Support for "uniform-work-group-size" attribute
This patch breaks RADV (and probably RadeonSI as well)

llvm-svn: 349084
2018-12-13 21:23:12 +00:00
Matt Arsenault
c25740dde7 AMDGPU/GlobalISel: Legalize/regbankselect block_addr
llvm-svn: 349081
2018-12-13 20:34:15 +00:00
Nikita Popov
c645cd0965 Reapply "[MemCpyOpt] memset->memcpy forwarding with undef tail"
Currently memcpyopt optimizes cases like

    memset(a, byte, N);
    memcpy(b, a, M);

to

    memset(a, byte, N);
    memset(b, byte, M);

if M <= N. Often this allows further simplifications down the line,
which drop the first memset entirely.

This patch extends this optimization for the case where M > N, but we
know that the bytes a[N..M] are undef due to alloca/lifetime.start.

This situation arises relatively often for Rust code, because Rust does
not initialize trailing structure padding and loves to insert redundant
memcpys. This also fixes https://bugs.llvm.org/show_bug.cgi?id=39844.

The previous version of this patch did not perform dependency checking
properly: While the dependency is checked at the position of the memset,
the used size must be that of the memcpy. Previously the size of the
memset was used, which missed modification in the region
MemSetSize..CopySize, resulting in miscompiles. The added tests cover
variations of this issue.

Differential Revision: https://reviews.llvm.org/D55120

llvm-svn: 349078
2018-12-13 20:04:27 +00:00
Easwaran Raman
8482e48d19 [ThinLTO] Compute synthetic function entry count
Summary:
This patch computes the synthetic function entry count on the whole
program callgraph (based on module summary) and writes the entry counts
to the summary. After function importing, this count gets attached to
the IR as metadata. Since it adds a new field to the summary, this bumps
up the version.

Reviewers: tejohnson

Subscribers: mehdi_amini, inglorion, llvm-commits

Differential Revision: https://reviews.llvm.org/D43521

llvm-svn: 349076
2018-12-13 19:54:27 +00:00
Mircea Trofin
8fb4b5dbb4 [llvm] Address base discriminator overflow in X86DiscriminateMemOps
Summary:
Macros are expanded on a single line. In case of large expansions,
with sufficiently many instructions with memory operands (and when
-fdebug-info-for-profiling is requested), we may be unable to generate
new base discriminator values - new values overflow (base
discriminators may not be larger than 2^12).

This CL warns instead of asserting in such a case. A subsequent CL
will add APIs to check for overflow before creating new debug info.

See https://bugs.llvm.org/show_bug.cgi?id=39890

Reviewers: davidxl, wmi, gbedwell

Reviewed By: davidxl

Subscribers: aprantl, llvm-commits

Differential Revision: https://reviews.llvm.org/D55643

llvm-svn: 349075
2018-12-13 19:40:59 +00:00
Jordan Rupprecht
b88c3ef139 [llvm-size][libobject] Add explicit "inTextSegment" methods similar to "isText" section methods to calculate size correctly.
Summary:
llvm-size uses "isText()" etc. which seem to indicate whether the section contains code-like things, not whether or not it will actually go in the text segment when in a fully linked executable.

The unit test added (elf-sizes.test) shows some types of sections that cause discrepencies versus the GNU size tool. llvm-size is not correctly reporting sizes of things mapping to text/data segments, at least for ELF files.

This fixes pr38723.

Reviewers: echristo, Bigcheese, MaskRay

Reviewed By: MaskRay

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D54369

llvm-svn: 349074
2018-12-13 19:40:12 +00:00
Craig Topper
fc983d8fa5 [CostModel][X86] Don't count 2 shuffles on the last level of a pairwise arithmetic or min/max reduction
This is split from D55452 with the correct patch this time.

Pairwise reductions require two shuffles on every level but the last. On the last level the two shuffles are <1, u, u, u...> and <0, u, u, u...>, but <0, u, u, u...> will be dropped by InstCombine/DAGCombine as being an identity shuffle.

Differential Revision: https://reviews.llvm.org/D55615

llvm-svn: 349072
2018-12-13 19:08:10 +00:00
Stefan Granitz
b659e7b4c4 [CMake] llvm_codesign workaround for Xcode double-signing errors
Summary:
When using Xcode to build LLVM with code signing, the post-build rule is executed even if the actual build-step was skipped. This causes double-signing errors. We can currently only avoid it by passing the `--force` flag.

Plus some polishing for my previous patch D54443.

Reviewers: beanz, kubamracek

Reviewed By: kubamracek

Subscribers: #lldb, mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D55116

llvm-svn: 349070
2018-12-13 18:51:19 +00:00
Davide Italiano
d8651da4d3 [LoopUtils] Use i32 instead of void.
The actual type of the first argument of the @dbg intrinsic
doesn't really matter as we're setting it to `undef`, but the
bitcode reader is picky about `void` types.

llvm-svn: 349069
2018-12-13 18:37:23 +00:00
Tom Stellard
6ece9abfcd Don't add unnecessary compiler flags to llvm-config output
Summary:
llvm-config --cxxflags --cflags, should only output the minimal flags
required to link against the llvm libraries.  They currently contain
all flags used to compile llvm including flags like -g, -pedantic,
-Wall, etc, which users may not always want.

This changes the llvm-config output to only include flags that have been
explictly added to the COMPILE_FLAGS property of the llvm-config target
by the llvm build system.

llvm.org/PR8220

Output from llvm-config when running cmake with:
cmake -G Ninja .. -DCMAKE_CXX_FLAGS=-funroll-loops

Before:

--cppflags: -I$HEADERS_DIR/llvm/include -I$HEADERS_DIR/llvm/build/include
            -D_GNU_SOURCE -D_DEBUG -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS
--cflags:   -I$HEADERS_DIR/llvm/include -I$HEADERS_DIR/llvm/build/include
            -fPIC -Werror=date-time -Wall -Wextra -Wno-unused-parameter -Wwrite-strings \
            -Wno-missing-field-initializers -pedantic -Wno-long-long -Wimplicit-fallthrough \
            -Wno-comment -fdiagnostics-color -g -D_GNU_SOURCE -D_DEBUG -D__STDC_CONSTANT_MACROS \
            -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS
--cxxflags: -I$HEADERS_DIR/llvm/include -I$HEADERS_DIR/llvm/build/include\
            -funroll-loops -fPIC -fvisibility-inlines-hidden -Werror=date-time -std=c++11 -Wall \
            -Wextra -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wno-missing-field-initializers \
            -pedantic -Wno-long-long -Wimplicit-fallthrough -Wno-maybe-uninitialized \
            -Wno-class-memaccess -Wno-noexcept-type -Wdelete-non-virtual-dtor -Wno-comment \
            -fdiagnostics-color -g  -fno-exceptions -fno-rtti -D_GNU_SOURCE -D_DEBUG \
            -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS"

After:

--cppflags: -I$HEADERS_DIR/llvm/include -I$HEADERS_DIR/llvm/build/include \
            -D_GNU_SOURCE -D_DEBUG -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS
--cflags:   -I$HEADERS_DIR/llvm/include -I$HEADERS_DIR/llvm/build/include \
            -D_GNU_SOURCE -D_DEBUG -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS
--cxxflags: -I$HEADERS_DIR/llvm/include -I$HEADERS_DIR/llvm/build/include \
             -std=c++11   -fno-exceptions -fno-rtti \
             -D_GNU_SOURCE -D_DEBUG -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS

Reviewers: sylvestre.ledru, infinity0, mgorny

Reviewed By: sylvestre.ledru, mgorny

Subscribers: mgorny, dmgreen, llvm-commits

Differential Revision: https://reviews.llvm.org/D55391

llvm-svn: 349068
2018-12-13 18:21:23 +00:00
Zachary Turner
5ec91b4438 Correctly handle skewed streams in drop_front() method.
When calling BinaryStreamArray::drop_front(), if the stream
is skewed it means we must never drop the first bytes of the
stream since offsets which occur in records assume the existence
of those bytes.  So if we want to skip the first record in a
stream, then what we really want to do is just set the begin
pointer to the next record.  But we shouldn't actually remove
those bytes from the underlying view of the data.

llvm-svn: 349066
2018-12-13 18:11:33 +00:00
Francis Visoiu Mistrih
a0043f81b2 [MachO][TLOF] Add support for local symbols in the indirect symbol table
On 32-bit archs, before, we would assume that an indirect symbol will
never have local linkage. This can lead to miscompiles where the
symbol's value would be 0 and the linker would use that value, because
the indirect symbol table would contain the value
`INDIRECT_SYMBOL_LOCAL` for that specific symbol.

Differential Revision: https://reviews.llvm.org/D55573

llvm-svn: 349060
2018-12-13 17:23:30 +00:00
Sanjay Patel
ab6a3a3093 [DAGCombiner] after simplifying demanded elements of vector operand of extract, revisit the extract; 2nd try
This is a retry of rL349051 (reverted at rL349056). I changed the check for dead-ness from
number of uses to an opcode test for DELETED_NODE based on existing similar code.

Differential Revision: https://reviews.llvm.org/D55655

llvm-svn: 349058
2018-12-13 17:05:01 +00:00
Simon Pilgrim
240f871115 [X86][SSE] Add SSE vector imm/var shift support to SimplifyDemandedVectorEltsForTargetNode
llvm-svn: 349057
2018-12-13 16:39:29 +00:00
Sanjay Patel
ca019ed7bd revert rL349051: [DAGCombiner] after simplifying demanded elements of vector operand of extract, revisit the extract
This causes an address sanitizer bot failure:
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/27187/steps/check-llvm%20asan/logs/stdio

llvm-svn: 349056
2018-12-13 16:32:44 +00:00
Daniel Sanders
28c46e8037 Recommit r349041: [tblgen][disasm] Separate encodings from instructions
Removed const from the ArrayRef<const EncodingAndInst> to avoid the
std::vector<const EncodingAndInst> that G++ saw

llvm-svn: 349055
2018-12-13 16:17:54 +00:00
Simon Pilgrim
e579f1bff3 [X86][SSE] Fix all remaining modulo vector rotation amounts (PR38243)
There's still a couple of minor SimplifyDemandedElts regressions in some of the shift amount splats that will be fixed in future patches.

llvm-svn: 349052
2018-12-13 15:50:31 +00:00
Sanjay Patel
ea2b479c28 [DAGCombiner] after simplifying demanded elements of vector operand of extract, revisit the extract
Differential Revision: https://reviews.llvm.org/D55655

llvm-svn: 349051
2018-12-13 15:44:26 +00:00
Daniel Cederman
e3cb6ccb12 [Sparc] Add membar assembler tags
Summary: The Sparc V9 membar instruction can enforce different types of
memory orderings depending on the value in its immediate field.  In the
architectural manual the type is selected by combining different assembler
tags into a mask. This patch adds support for these tags.

Reviewers: jyknight, venkatra, brad

Reviewed By: jyknight

Subscribers: fedor.sergeev, jrtc27, jfb, llvm-commits

Differential Revision: https://reviews.llvm.org/D53491

llvm-svn: 349048
2018-12-13 15:29:12 +00:00