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Commit Graph

172724 Commits

Author SHA1 Message Date
Sylvestre Ledru
a9dc6631f3 Update the list of platforms & archs
llvm-svn: 349302
2018-12-16 14:47:16 +00:00
Sylvestre Ledru
5f65a6f63e Use backquotes to avoid a sphinx unexpected error:
Unknown target name: "bootstrap".

llvm-svn: 349301
2018-12-16 14:19:39 +00:00
Sylvestre Ledru
59afa1fde5 Document the usage of BOOTSTRAP_XXX with stage2 builds
llvm-svn: 349299
2018-12-16 14:04:10 +00:00
Simon Pilgrim
a3996e5f78 [SelectionDAG] Add FSHL/FSHR support to computeKnownBits
Also exposes an issue in DAGCombiner::visitFunnelShift where we were assuming the shift amount had the result type (after legalization it'll have the targets shift amount type).

llvm-svn: 349298
2018-12-16 13:33:37 +00:00
Simon Pilgrim
3c38377cf1 [X86] Add computeKnownBits tests for funnel shift intrinsics
llvm-svn: 349297
2018-12-16 12:15:31 +00:00
Nico Weber
ab798a428a [gn build] Merge r349167
llvm-svn: 349291
2018-12-16 02:32:20 +00:00
Nico Weber
0b2496bfd0 [gn build] Add build files for obj2yaml, yaml2obj, and lib/ObjectYAML
The two executables are needed by check-lld.

Differential Revision: https://reviews.llvm.org/D55687

llvm-svn: 349290
2018-12-16 02:29:02 +00:00
Nico Weber
13f5841557 [gn build] Add build files for llvm-as, llvm-dis, llvm-dwarfdump, llvm-mc, FileCheck, count, not
These executables are needed by check-lld.

Differential Revision: https://reviews.llvm.org/D55688

llvm-svn: 349289
2018-12-16 02:27:10 +00:00
Craig Topper
c206b35246 [X86] Autogenerate complete checks. NFC
llvm-svn: 349287
2018-12-15 22:52:57 +00:00
Simon Pilgrim
c9387a674a [X86] Begin cleaning up combineOr -> SHLD/SHRD. NFCI.
In preparation for converting to funnel shifts.

llvm-svn: 349286
2018-12-15 21:11:49 +00:00
Simon Pilgrim
79a641d507 [X86] Lower to SHLD/SHRD on slow machines for optsize
Use consistent rules for when to lower to SHLD/SHRD for slow machines - fixes a weird issue where funnel shift gets expanded but then X86ISelLowering's combineOr sees the optsize and combines to SHLD/SHRD, but now with the modulo amount guard......

llvm-svn: 349285
2018-12-15 19:43:44 +00:00
Simon Pilgrim
4ab16cb47f [X86] Add optsize SHLD/SHRD tests
llvm-svn: 349284
2018-12-15 19:32:26 +00:00
Kamil Rytarowski
4f542b3de4 Add NetBSD support in needsRuntimeRegistrationOfSectionRange.
Use linker script magic to get data/cnts/name start/end.

llvm-svn: 349277
2018-12-15 16:51:35 +00:00
Kamil Rytarowski
151ce022c7 Register kASan shadow offset for NetBSD/amd64
The NetBSD x86_64 kernel uses the 0xdfff900000000000 shadow
offset.

llvm-svn: 349276
2018-12-15 16:32:41 +00:00
Dinar Temirbulatov
f0b82ae07a [CodeGen] Enhance machine PHIs optimization
Summary:
Make machine PHIs optimization to work for single value register taken from
several different copies. This is the first step to fix PR38917. This change
allows to get rid of redundant PHIs (see opt_phis2.mir test) to make
the subsequent optimizations (like CSE) possible and simpler.

For instance, before this patch the code like this:

%b = COPY %z
...
%a = PHI %bb1, %a; %bb2, %b
could be optimized to:

%a = %b
but the code like this:

%c = COPY %z
...
%b = COPY %z
...
%a = PHI %bb1, %a; %bb2, %b; %bb3, %c
would remain unchanged.
With this patch the latter case will be optimized:

%a = %z```.

Committed on behalf of: Anton Afanasyev anton.a.afanasyev@gmail.com

Reviewers: RKSimon, MatzeB

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D54839

llvm-svn: 349271
2018-12-15 14:37:01 +00:00
Simon Pilgrim
bbfa21a09f Regenerate neon copy tests. NFCI.
llvm-svn: 349270
2018-12-15 14:23:18 +00:00
Simon Pilgrim
1fe9c9ab75 Fix -Wunused-variable warning. NFCI.
llvm-svn: 349265
2018-12-15 12:25:22 +00:00
Simon Pilgrim
7a9fc8e31d [TargetLowering] Add ISD::OR + ISD::XOR handling to SimplifyDemandedVectorElts
Differential Revision: https://reviews.llvm.org/D55600

llvm-svn: 349264
2018-12-15 11:36:36 +00:00
Nikita Popov
a9e350eefd [InstSimplify] Add tests for saturating add/sub + icmp; NFC
If a saturating add/sub with a constant operand is compared to
another constant, we should be able to determine that the condition
is always true/false in some cases (but currently don't).

llvm-svn: 349261
2018-12-15 10:37:01 +00:00
Fangrui Song
e9e1319c86 [mips] Fix test typo in rL348914
RUN; -> RUN:

llvm-svn: 349258
2018-12-15 08:44:47 +00:00
Kewen Lin
12c4199c04 [Power9][NFC] add setb exploitation test case
Add an original test case for setb before the exploitation actually takes effect, later we can check the difference.

Differential Revision: https://reviews.llvm.org/D55696

llvm-svn: 349251
2018-12-15 04:39:37 +00:00
Florian Hahn
eebabb0665 [SILoadStoreOptimizer] Use std::abs to avoid truncation.
Using regular abs() causes the following warning

error: absolute value function 'abs' given an argument of type 'int64_t' (aka 'long') but has parameter of type 'int' which may cause truncation of value [-Werror,-Wabsolute-value]
        (uint32_t)abs(Dist) > MaxDist) {
                  ^
lib/Target/AMDGPU/SILoadStoreOptimizer.cpp:1369:19: note: use function 'std::abs' instead

which causes a bot to fail:
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux/builds/18284/steps/bootstrap%20clang/logs/stdio

llvm-svn: 349224
2018-12-15 01:32:58 +00:00
Craig Topper
08bdd31e0d [X86] Rename hasNoSignedComparisonUses to hasNoSignFlagUses. Add the instruction that only modify the O flag to the waiver list.
The only caller of this turns CMP with 0 into TEST. CMP with 0 and TEST both set OF to 0 so we should have no issues with instructions that only use OF.

Though I don't think there's any reason we would read just OF after a compare with 0 anyway. So this probably isn't an observable change.

llvm-svn: 349223
2018-12-15 01:07:19 +00:00
Craig Topper
f1d36485d5 [X86] Make hasNoCarryFlagUses/hasNoSignedComparisonUses take an SDValue that indicates which result is the flag result. NFCI
hasNoCarryFlagUses hardcoded that the flag result is 1 and used that to filter which uses were of interest. hasNoSignedComparisonUses just assumes the only result is flags and checks whether any user of the node is a CopyToReg instruction.

After this patch we now do a result number check in both and rely on the caller to provide the result number.

This shouldn't change behavior it was just an odd difference between the two functions that I noticed.

llvm-svn: 349222
2018-12-15 01:07:16 +00:00
Heejin Ahn
bd36255223 [WebAssembly] Check if the section order is correct
Summary:
This patch checks if the section order is correct when reading a wasm
object file in `WasmObjectFile` and converting YAML to wasm object in
yaml2wasm. (It is not possible to check when reading YAML because it is
handled exclusively by the YAML reader.)

This checks the ordering of all known sections (core sections + known
custom sections). This also adds section ID DataCount section that will
be scheduled to be added in near future.

Reviewers: sbc100

Subscribers: dschuff, mgorny, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D54924

llvm-svn: 349221
2018-12-15 00:58:12 +00:00
Florian Hahn
060c8da990 [NewGVN] Update use counts for SSA copies when replacing them by their operands.
The current code relies on LeaderUseCount to determine if we can remove
an SSA copy, but in that the LeaderUseCount does not refer to the SSA
copy. If a SSA copy is a dominating leader, we use the operand as dominating
leader instead. This means we removed a user of a ssa copy and we should
decrement its use count, so we can remove the ssa copy once it becomes dead.

Fixes PR38804.

Reviewers: efriedma, davide

Reviewed By: davide

Differential Revision: https://reviews.llvm.org/D51595

llvm-svn: 349217
2018-12-15 00:32:38 +00:00
Vedant Kumar
2153f9e846 [Util] Refer to [s|z]exts of args when converting dbg.declares (fix PR35400)
When converting dbg.declares, if the described value is a [s|z]ext,
refer to the ext directly instead of referring to its operand.

This fixes a narrowing bug (the debugger got the sign of a variable
wrong, see llvm.org/PR35400).

The main reason to refer to the ext's operand was that an optimization
may remove the ext itself, leading to a dropped variable. Now that
InstCombine has been taught to use replaceAllDbgUsesWith (r336451), this
is less of a concern. Other passes can/should adopt this API as needed
to fix dropped variable bugs.

Differential Revision: https://reviews.llvm.org/D51813

llvm-svn: 349214
2018-12-15 00:03:33 +00:00
Artem Belevich
51ebca085c [NVPTX] Lower instructions that expand into libcalls.
The change is an effort to split and refactor abandoned
D34708 into smaller parts.

Here the behaviour of unsupported instructions is changed
to match the behaviour of explicit intrinsics calls.
Currently LLVM crashes with:
> Assertion getInstruction() && "Not a call or invoke instruction!" failed.

With this patch LLVM produces a more sensible error message:
> Cannot select: ... i32 = ExternalSymbol'__foobar'

Author: Denys Zariaiev <denys.zariaiev@gmail.com>

Differential Revision: https://reviews.llvm.org/D55145

llvm-svn: 349213
2018-12-14 23:53:06 +00:00
David Blaikie
831e5b558b DebugInfo: Avoid using split DWARF when the split unit would be empty.
In ThinLTO many split CUs may be effectively empty because of the lack
of support for cross-unit references in split DWARF.

Using a split unit in those cases is just a waste/overhead - and turned
out to be one contributor to a significant symbolizer performance issue
when global variable debug info was being imported (see r348416 for the
primary fix) due to symbolizers seeing CUs with no ranges, assuming
there might still be addresses covered and walking into the split CU to
see if there are any ranges (when that split CU was in a DWP file, that
meant loading the DWP and its index, the index was extra large because
of all these fractured/empty CUs... and so was very expensive to load).

(the 3rd fix which will follow, is to assume that a CU with no ranges is
empty rather than merely missing its CU level range data - and to not
walk into its DIEs (split or otherwise) in search of address information
that is generally not present)

llvm-svn: 349207
2018-12-14 22:44:46 +00:00
Reid Kleckner
cc880fb6ed [codeview] Add begin/endSymbolRecord helpers, NFC
Previously beginning a symbol record was excessively verbose. Now it's a
bit simpler. This follows the same pattern as begin/endCVSubsection.

llvm-svn: 349205
2018-12-14 22:40:28 +00:00
David Blaikie
6264674d1f DebugInfo: Move addAddrBase from DwarfUnit to DwarfCompileUnit
Only CUs need an address table reference.

llvm-svn: 349203
2018-12-14 22:34:03 +00:00
Krzysztof Parzyszek
44a95960ae [Hexagon] Add patterns for shifts of v2i16
This fixes https://llvm.org/PR39983.

llvm-svn: 349202
2018-12-14 22:33:48 +00:00
Volkan Keles
981a26eae7 [GlobalISel] LegalizerHelper: Implement fewerElementsVector for G_LOAD/G_STORE
Reviewers: aemerson, dsanders, bogner, paquette, aditya_nandakumar

Reviewed By: dsanders

Subscribers: rovka, kristof.beyls, javed.absar, tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D53728

llvm-svn: 349200
2018-12-14 22:11:20 +00:00
Krzysztof Parzyszek
cf57538afc [Hexagon] Use IMPLICIT_DEF to any-extend 32-bit values to 64 bits
llvm-svn: 349199
2018-12-14 22:05:44 +00:00
Farhana Aleen
4721404602 [AMDGPU] Promote constant offset to the immediate by finding a new base with 13bit constant offset from the nearby instructions.
Summary: Promote constant offset to immediate by recomputing the relative 13bit offset from nearby instructions.
 E.g.
  s_movk_i32 s0, 0x1800
  v_add_co_u32_e32 v0, vcc, s0, v2
  v_addc_co_u32_e32 v1, vcc, 0, v6, vcc

  s_movk_i32 s0, 0x1000
  v_add_co_u32_e32 v5, vcc, s0, v2
  v_addc_co_u32_e32 v6, vcc, 0, v6, vcc
  global_load_dwordx2 v[5:6], v[5:6], off
  global_load_dwordx2 v[0:1], v[0:1], off
  =>
  s_movk_i32 s0, 0x1000
  v_add_co_u32_e32 v5, vcc, s0, v2
  v_addc_co_u32_e32 v6, vcc, 0, v6, vcc
  global_load_dwordx2 v[5:6], v[5:6], off
  global_load_dwordx2 v[0:1], v[5:6], off offset:2048

Author: FarhanaAleen

Reviewed By: arsenm, rampitec

Subscribers: llvm-commits, AMDGPU

Differential Revision: https://reviews.llvm.org/D55539

llvm-svn: 349196
2018-12-14 21:13:14 +00:00
Eric Fiselier
88b4a628ac Add missing includes and forward decls to unbreak build
llvm-svn: 349193
2018-12-14 21:04:00 +00:00
Krzysztof Parzyszek
52a4d61628 [SDAG] Ignore chain operand in REG_SEQUENCE when emitting instructions
llvm-svn: 349186
2018-12-14 20:14:12 +00:00
Evandro Menezes
6f096d4f5a [AArch64] Simplify the scheduling predicates (NFC)
The instruction encodings make it unnecessary to distinguish extended W-form
from X-form instructions.

llvm-svn: 349185
2018-12-14 20:04:58 +00:00
Michael Kruse
7937eed98d [TransformWarning] Do not warn missed transformations in optnone functions.
Optimization transformations are intentionally disabled by the 'optnone'
function attribute. Therefore do not warn if transformation metadata is
still present.

Using the legacy pass manager structure, the `skipFunction` method takes
care for the optnone attribute (already called before this patch). For
the new pass manager, there is no equivalent, so we check for the
'optnone' attribute manually.

Differential Revision: https://reviews.llvm.org/D55690

llvm-svn: 349184
2018-12-14 19:45:43 +00:00
Sanjay Patel
a1e7b62a74 [x86] add tests for extractelement of FP binops; NFC
llvm-svn: 349179
2018-12-14 19:15:54 +00:00
Sanjay Patel
1f3c55dbbc [ARM] make test immune to scalarization improvements; NFC
llvm-svn: 349177
2018-12-14 18:47:04 +00:00
Sanjay Patel
d66b418dcc [x86] make tests immune to scalarization improvements; NFC
llvm-svn: 349176
2018-12-14 18:44:16 +00:00
Daniel Sanders
6facda76a5 [globalisel][combiner] Fix r349167 for release mode bots
This test relies on -debug-only which is unavailable in non-asserts builds.

llvm-svn: 349174
2018-12-14 18:25:05 +00:00
Zachary Turner
6370c21596 [ADT] Fix bugs in SmallBitVector.
Fixes:
  * find_last/find_last_unset - off-by-one error
  * Compound assignment ops and operator== when mixing big/small modes

Patch by Brad Moody
Differential Revision: https://reviews.llvm.org/D54933

llvm-svn: 349173
2018-12-14 18:21:20 +00:00
Zachary Turner
702f834abb Fix Visual Studio PointerIntPair visualizer
Patch by: Trass3r

Differential Revision: https://reviews.llvm.org/D55252

llvm-svn: 349172
2018-12-14 18:20:21 +00:00
Michael Kruse
c18f383859 [Transforms] Preserve metadata when converting invoke to call.
The `changeToCall` function did not preserve the invoke's metadata.
Currently, there is probably no metadata that depends on being applied
on a CallInst or InvokeInst. Therefore we can replace the instruction's
metadata.

This fixes http://llvm.org/PR39994

Suggested-by: Moritz Kreutzer <moritz.kreutzer@siemens.com>

Differential Revision: https://reviews.llvm.org/D55666

llvm-svn: 349170
2018-12-14 18:15:11 +00:00
Zachary Turner
0a0be9b76e [MS Demangler] Fail gracefully on invalid pointer types.
Once we detect a 'P', we know we a pointer type is upcoming, so
we make some assumptions about the output that follows.  If those
assumptions didn't hold, we would assert.  Instead, we should
fail gracefully and propagate the error up.

llvm-svn: 349169
2018-12-14 18:10:13 +00:00
Zachary Turner
6d3b7f4c22 [MS Demangler] Add a regression test for an invalid mangled name.
llvm-svn: 349168
2018-12-14 17:59:27 +00:00
Daniel Sanders
f380a26222 [globalisel][combiner] Make the CombinerChangeObserver a MachineFunction::Delegate
Summary:
This allows us to register it with the MachineFunction delegate and be
notified automatically about erasure and creation of instructions. However,
we still need explicit notification for modifications such as those caused
by setReg() or replaceRegWith().

There is a catch with this though. The notification for creation is
delivered before any operands can be added. While appropriate for
scheduling combiner work. This is unfortunate for debug output since an
opcode by itself doesn't provide sufficient information on what happened.
As a result, the work list remembers the instructions (when debug output is
requested) and emits a more complete dump later.

Another nit is that the MachineFunction::Delegate provides const pointers
which is inconvenient since we want to use it to schedule future
modification. To resolve this GISelWorkList now has an optional pointer to
the MachineFunction which describes the scope of the work it is permitted
to schedule. If a given MachineInstr* is in this function then it is
permitted to schedule work to be performed on the MachineInstr's. An
alternative to this would be to remove the const from the
MachineFunction::Delegate interface, however delegates are not permitted
to modify the MachineInstr's they receive.

In addition to this, the observer has three interface changes.
* erasedInstr() is now erasingInstr() to indicate it is about to be erased
  but still exists at the moment.
* changingInstr() and changedInstr() have been added to report changes
  before and after they are made. This allows us to trace the changes
  in the debug output.
* As a convenience changingAllUsesOfReg() and
  finishedChangingAllUsesOfReg() will report changingInstr() and
  changedInstr() for each use of a given register. This is primarily useful
  for changes caused by MachineRegisterInfo::replaceRegWith()

With this in place, both combine rules have been updated to report their
changes to the observer.

Finally, make some cosmetic changes to the debug output and make Combiner
and CombinerHelp

Reviewers: aditya_nandakumar, bogner, volkan, rtereshin, javed.absar

Reviewed By: aditya_nandakumar

Subscribers: mgorny, rovka, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D52947

llvm-svn: 349167
2018-12-14 17:50:14 +00:00
Sanjay Patel
89e6221461 [AArch64] make test immune to scalarization improvements; NFC
This is explicitly implementing what the comment says rather
than relying on the implicit zext of a costant operand.

llvm-svn: 349166
2018-12-14 17:44:07 +00:00