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Commit Graph

91631 Commits

Author SHA1 Message Date
Akira Hatanaka
ab6ee99fe0 [mips] Handle reading, writing or copying of ccond field of DSP control
register.

- Define pseudo instructions which store or load ccond field of the DSP
  control register.
- Emit the pseudos in MipsSEInstrInfo::storeRegToStack and loadRegFromStack.
- Expand the pseudos before callee-scan save.
- Emit instructions RDDSP or WRDSP to copy between ccond field and GPRs. 

llvm-svn: 180969
2013-05-02 23:07:05 +00:00
Bill Wendling
c5ebf68224 Remove redundant flag.
llvm-svn: 180967
2013-05-02 22:52:47 +00:00
Jyotsna Verma
08d387d6f8 reverting r180953
llvm-svn: 180964
2013-05-02 22:10:59 +00:00
Vincent Lejeune
5d7b2a4aea R600: Signed literals are 64bits wide
llvm-svn: 180960
2013-05-02 21:53:03 +00:00
Vincent Lejeune
3ff31b75b3 R600: If previous bundle is dot4, PV valid chan is always X
llvm-svn: 180959
2013-05-02 21:52:55 +00:00
Vincent Lejeune
97fb65a788 R600: Add a test to check that use_kill is emitted
llvm-svn: 180958
2013-05-02 21:52:46 +00:00
Vincent Lejeune
33415b0699 R600: Improve asmPrint of ALU clause
llvm-svn: 180957
2013-05-02 21:52:40 +00:00
Vincent Lejeune
62da1453e1 R600: Prettier asmPrint of Alu
llvm-svn: 180956
2013-05-02 21:52:30 +00:00
Jyotsna Verma
cd4db6de1c Hexagon: Add multiclass/encoding bits for the New-Value Jump instructions.
llvm-svn: 180953
2013-05-02 21:21:57 +00:00
Shuxin Yang
df9f738a35 [GV] Remove dead code which is really difficult to decipher.
Actually it took me couple of hours trying to make sense of them and
only to find they are dead code.  I guess the original author used
"allSingleSucc" to indicate if there are any critial edge emanating
from some blocks, and tried to perform code motion (actually speculation)
in the presence of these critical edges; but later on he/she changed mind
and decided to perform edge-splitting first.

llvm-svn: 180951
2013-05-02 21:14:31 +00:00
Bill Wendling
ce4120484a We don't want FP elimination when doing an Apple-style build.
llvm-svn: 180949
2013-05-02 21:09:03 +00:00
Aaron Ballman
db11d84e26 Replaced usages of size_type with size_t to be more consistent.
llvm-svn: 180947
2013-05-02 20:30:27 +00:00
Pranav Bhandarkar
520d26e773 Hexagon - Add peephole optimizations for zero extends.
* lib/Target/Hexagon/HexagonInstrInfo.td: Add patterns to combine a
	sequence of a pair of i32->i64 extensions followed by a "bitwise or"
	into COMBINE_rr.
	* lib/Target/Hexagon/HexagonPeephole.cpp: Copy propagate Rx in the
	instruction Rp = COMBINE_Ir_V4(0, Rx) to the uses of Rp:subreg_loreg.
	* test/CodeGen/Hexagon/union-1.ll: New test.
	* test/CodeGen/Hexagon/combine_ir.ll: Fix test.

llvm-svn: 180946
2013-05-02 20:22:51 +00:00
Richard Sandiford
be8189863a [mips] Fix the head Mips16RegisterInfo.cpp comment
...aka a test commit.

llvm-svn: 180936
2013-05-02 18:28:03 +00:00
Manman Ren
0e2c14381d TBAA: remove !tbaa from testing cases if not used.
This will make it easier to turn on struct-path aware TBAA since the metadata
format will change.

llvm-svn: 180935
2013-05-02 18:11:35 +00:00
Adrian Prantl
9d3bc41173 Provide an API to temporarily suppress DebugLocations from being attached
to emitted instructions.  Use this if you want an instruction to be
counted towards the prologue or if there is no useful source location.

rdar://problem/13442648

llvm-svn: 180929
2013-05-02 17:27:49 +00:00
Jyotsna Verma
c909ae62a5 Hexagon: Honor __builtin_expect by using branch probabilities.
* lib/Target/Hexagon/HexagonInstrInfo.cpp (GetDotNewPredOp):
  Given a jump opcode return the right pred.new jump opcode with
  a taken vs not-taken hint based on branch probabilities provided
  by the target independent module.
  * lib/Target/Hexagon/HexagonVLIWPacketizer.cpp: Use the above function.
  * lib/Target/Hexagon/HexagonNewValueJump.cpp(getNewvalueJumpOpcode):
  Enhance existing function use branch probabilities like
  HexagonInstrInfo::GetDotNewPredOp but for New Value (GPR) Jumps.

llvm-svn: 180923
2013-05-02 15:39:30 +00:00
Tom Stellard
6f9f86852b R600: Use new tablegen syntax for patterns
All but two patterns have been converted to the new syntax.  The
remaining two patterns will require COPY_TO_REGCLASS instructions, which
the VLIW DAG Scheduler cannot handle.

llvm-svn: 180922
2013-05-02 15:30:12 +00:00
Tom Stellard
ccaeffd7d5 R600/SI: remove nonsense select pattern
Fortunately this pattern never matched, otherwise
we would have generated incorrect code.

Signed-off-by: Christian K??nig <christian.koenig@amd.com>
llvm-svn: 180921
2013-05-02 15:30:07 +00:00
Tobias Grosser
923a6bc6e9 Added table of contents declaration in CommandLine Library documentation.
Contributed-by:  Dan Liew <daniel.liew@imperial.ac.uk>
llvm-svn: 180919
2013-05-02 14:59:52 +00:00
Michael Liao
11eb7f45ef 80-col fixup.
llvm-svn: 180915
2013-05-02 09:22:04 +00:00
Michael Liao
7a427b3c8f Avoid duplicating logic on frame register selecting when lowering eh_return
No functionality change

llvm-svn: 180914
2013-05-02 09:18:38 +00:00
Michael Liao
c1eaac67f3 Avoid duplicating logic on frame register selecting when lowering frameaddr
No functionality change

llvm-svn: 180912
2013-05-02 08:21:56 +00:00
Michael Liao
ca62375d96 Rewrite X86 codegen regression test with FileCheck
llvm-svn: 180910
2013-05-02 06:20:42 +00:00
David Majnemer
7f5357e6c4 Add a test for the foldSelectICmpAndOr fix committed in r180779.
This tests a case where C1 and C2 were the same but X and Y were different
widths.

llvm-svn: 180907
2013-05-02 02:44:23 +00:00
Evan Cheng
9996950256 TiedTo flag can now be placed on implicit operands. isTwoAddrUse() should look
at all of the operands. Previously it was skipping over implicit operands which
cause infinite looping when the two-address pass try to reschedule a
two-address instruction below the kill of tied operand.

I'm unable to come up with a reasonably sized test case.
rdar://13747577

llvm-svn: 180906
2013-05-02 02:07:32 +00:00
Akira Hatanaka
469200a1fe [mips] Rename class and functions. Simplify code.
No functionality changes.

llvm-svn: 180897
2013-05-01 23:41:31 +00:00
Filip Pizlo
9f6e32ea72 This exposes more MCJIT options via the C API:
CodeModel: It's now possible to create an MCJIT instance with any CodeModel you like.  Previously it was only possible to 
create an MCJIT that used CodeModel::JITDefault.

EnableFastISel: It's now possible to turn on the fast instruction selector.

The CodeModel option required some trickery.  The problem is that previously, we were ensuring future binary compatibility in 
the MCJITCompilerOptions by mandating that the user bzero's the options struct and passes the sizeof() that he saw; the 
bindings then bzero the remaining bits.  This works great but assumes that the bitwise zero equivalent of any field is a 
sensible default value.

But this is not the case for LLVMCodeModel, or its internal equivalent, llvm::CodeModel::Model.  In both of those, the default 
for a JIT is CodeModel::JITDefault (or LLVMCodeModelJITDefault), which is not bitwise zero.

Hence this change introduces LLVMInitializeMCJITCompilerOptions(), which will initialize the user's options struct with
defaults. The user will use this in the same way that they would have previously used memset() or bzero(). MCJITCAPITest.cpp
illustrates the change, as does the comment in ExecutionEngine.h.

llvm-svn: 180893
2013-05-01 22:58:00 +00:00
Michael Liao
ec28235c2a Avoid generating tempfile(s) never used
As DejaGNU is deprecated, it seems pipe-jam issue doesn't exist any more.

llvm-svn: 180892
2013-05-01 22:46:50 +00:00
Filip Pizlo
1efac2eee6 Rename 'struct LLVMTargetMachine' to 'struct LLVMOpaqueTargetMachine'.
This avoids namespace collisions with llvm::LLVMTargetMachine.

llvm-svn: 180891
2013-05-01 22:41:26 +00:00
Bill Wendling
218b457a2f Revert r180737. The companion patch was reverted, and this is not relevant right now.
llvm-svn: 180889
2013-05-01 22:32:08 +00:00
Jyotsna Verma
a3587dd6bb Hexagon: Use multiclass for Jump instructions.
llvm-svn: 180885
2013-05-01 21:37:34 +00:00
Jyotsna Verma
d290020e45 Hexagon: Clear isKill flag on the predicate register in
PredicateInstruction function.

llvm-svn: 180884
2013-05-01 21:27:30 +00:00
Rafael Espindola
c8f540342b Add support for other typeinfo encodings in the ExceptionDemo.
The old jit always uses DW_EH_PE_absptr, but MCJIT can use other encodings.
This is in preparation for adding EH support to MCJIT, but not directly
related, so I am committing it first.

llvm-svn: 180883
2013-05-01 21:05:05 +00:00
Filip Pizlo
d0a0415548 Fix file header comment.
llvm-svn: 180882
2013-05-01 21:01:06 +00:00
Filip Pizlo
dd62846c56 This patch breaks up Wrap.h so that it does not have to include all of
the things, and renames it to CBindingWrapping.h.  I also moved 
CBindingWrapping.h into Support/.

This new file just contains the macros for defining different wrap/unwrap 
methods.

The calls to those macros, as well as any custom wrap/unwrap definitions 
(like for array of Values for example), are put into corresponding C++ 
headers.

Doing this required some #include surgery, since some .cpp files relied 
on the fact that including Wrap.h implicitly caused the inclusion of a 
bunch of other things.

This also now means that the C++ headers will include their corresponding 
C API headers; for example Value.h must include llvm-c/Core.h.  I think 
this is harmless, since the C API headers contain just external function 
declarations and some C types, so I don't believe there should be any 
nasty dependency issues here.

llvm-svn: 180881
2013-05-01 20:59:00 +00:00
Nadav Rotem
c0309431a1 SROA: Generate selects instead of shuffles when blending values because this is the cannonical form.
Shuffles are more difficult to lower and we usually don't touch them, while we do optimize selects more often.

llvm-svn: 180875
2013-05-01 19:53:30 +00:00
Chad Rosier
98c20ef29d [inline asm] Return an undef SDValue of the expected value type, rather than
report a fatal error.  This allows us to continue processing the translation
unit.  Test case to come on the clang side because we need an inline asm
diagnostics handler in place.
rdar://13446483

llvm-svn: 180873
2013-05-01 19:49:26 +00:00
Nadav Rotem
d62966b79d Optimize away nop CONCAT_VECTOR nodes.
Optimize CONCAT_VECTOR nodes that merge EXTRACT_SUBVECTOR values that extract from the same vector.

rdar://13402653
PR15866

llvm-svn: 180871
2013-05-01 19:18:51 +00:00
Aaron Ballman
dcda36337e Updating the getting started guide for Visual Studio users. Specifically, pointing out that you have to pass additional parameters to llvm-lit and explicitly specify python on the command line.
llvm-svn: 180869
2013-05-01 19:13:50 +00:00
Peng Cheng
376ff965a1 get rid of windows warning:
warning C4946: reinterpret_cast used between related classes

llvm-svn: 180852
2013-05-01 15:04:18 +00:00
Peng Cheng
4111249364 get rid of windows warning:
warning C4800: forcing value to bool 'true' or 'false' (performance warning)

llvm-svn: 180851
2013-05-01 15:00:07 +00:00
Peng Cheng
341bcbef57 replace reinterpret_cast by cast or remove reinterpret_cast to get rid of windows warning: warning C4946: reinterpret_cast used between related classes.
llvm-svn: 180850
2013-05-01 14:54:01 +00:00
Peng Cheng
569be5d6d2 fix windows warning.
warning C4244: 'argument' : conversion from 'uint64_t' to 'const unsigned int', possible loss of data

llvm-svn: 180847
2013-05-01 14:18:06 +00:00
Peng Cheng
b880965b90 use static_cast to get rid of windows warning.
warning C4244: 'argument' : conversion from 'uint64_t' to 'const unsigned int', possible loss of data

llvm-svn: 180846
2013-05-01 14:07:02 +00:00
Rafael Espindola
0a4792bcbe Now that the underlying issue is fixed, revert r180750 and r180722.
The cause of the windows failures was fixed by r180791. Revert to the state
after Sabre's original revert.

Original message:

revert r179735, it has no testcases, and doesn't really make sense.

llvm-svn: 180844
2013-05-01 13:07:03 +00:00
Nikola Smiljanic
6bed8fd9cc Fix spelling
llvm-svn: 180843
2013-05-01 13:05:43 +00:00
Rafael Espindola
056abc9e26 Put VMOVPQIto64rr in the VRPDI class.
Patch by Joshua Magee.

llvm-svn: 180842
2013-05-01 13:00:16 +00:00
Duncan Sands
bc453888ba Correct comment: there is no numTys parameter any more now that this is using
ArrayRef.

llvm-svn: 180840
2013-05-01 07:54:55 +00:00
Filip Pizlo
a32d795d04 Wrap some lines to bring MCJITCAPITest into conformance with the 80 column limit.
llvm-svn: 180839
2013-05-01 06:46:59 +00:00