llvm-diff.cpp has the following include chain:
llvm/IR/Module.h
llvm/IR/Function.h
llvm/IR/Argument.h
llvm/IR/Attributes.h
llvm/IR/Attributes.gen
This means llvm-diff needs to depend on intrinsics_gen.
llvm-svn: 287427
llvm-stress.cpp has the following include chain:
llvm/Analysis/CallGraphSCCPass.h
llvm/Analysis/CallGraph.h
llvm/IR/CallSite.h
llvm/IR/Attributes.h
llvm/IR/Attributes.gen
This means llvm-stress needs to depend on intrinsics_gen.
llvm-svn: 287426
TestPasses.cpp has the following include chain:
llvm/IR/InstVisitor.h
llvm/IR/CallSite.h
llvm/IR/Attributes.h
llvm/IR/Attributes.gen
This means bugpoint-passes needs to depend on intrinsics_gen.
llvm-svn: 287425
llvm-bcanalyzer.cpp has the following include chain:
llvm/Bitcode/BitcodeReader.h
llvm/IR/ModuleSummaryIndex.h
llvm/IR/Module.h
llvm/IR/Function.h
llvm/IR/Argument.h
llvm/IR/Attributes.h
llvm/IR/Attributes.gen
This means llvm-bcanalyzer needs to depend on intrinsics_gen.
llvm-svn: 287424
llvm-as.cpp has the following include chain:
llvm/Bitcode/BitcodeWriter.h
llvm/IR/ModuleSummaryIndex.h
llvm/IR/Module.h
llvm/IR/Function.h
llvm/IR/Argument.h
llvm/IR/Attributes.h
llvm/IR/Attributes.gen
This means llvm-as needs to depend on intrinsics_gen.
llvm-svn: 287423
llc.cpp has the following include chain:
llvm/Analysis/TargetLibraryInfo.h
llvm/IR/Function.h
llvm/IR/Argument.h
llvm/IR/Attributes.h
llvm/IR/Attributes.gen
This means llc needs to depend on intrinsics_gen.
llvm-svn: 287422
ChildTarget.cpp has the following include chain:
llvm/ExecutionEngine/Orc/OrcABISupport.h
llvm/ExecutionEngine/Orc/IndirectionUtils.h
llvm/IR/IRBuilder.h
llvm/IR/ConstantFolder.h
llvm/IR/InstrTypes.h
llvm/IR/Attributes.h
llvm/IR/Attributes.gen
This means lli needs to depend on intrinsics_gen.
llvm-svn: 287420
DwarfLinker.cpp has the following include chain:
llvm/CodeGen/AsmPrinter.h
llvm/CodeGen/MachineFunctionPass.h
llvm/CodeGen/MachineFunction.h
llvm/CodeGen/MachineBasicBlock.h
llvm/CodeGen/MachineInstr.h
llvm/Analysis/AliasAnalysis.h
llvm/IR/CallSite.h
llvm/IR/Attributes.h
llvm/IR/Attributes.gen
This means llvm-dsymutil needs to depend on intrinsics_gen.
llvm-svn: 287419
When LLVM_DEPENDENCY_DEBUGGING=On we should apply the sandbox only on the target, not the directory. This is important for directories that create more than one target, or for nested directories.
llvm-svn: 287415
verify-uselistorder.cpp has the following include chain:
llvm/Bitcode/BitcodeReader.h
llvm/IR/ModuleSummaryIndex.h
llvm/IR/Module.h
llvm/IR/Function.h
llvm/IR/Argument.h
llvm/IR/Attributes.h
llvm/IR/Attributes.gen
This means verify-uselistorder needs to depend on intrinsics_gen.
llvm-svn: 287405
sanstats.cpp has the following include chain:
llvm/Transforms/Utils/SanitizerStats.h
llvm/IR/IRBuilder.h
llvm/IR/ConstantFolder.h
llvm/IR/InstrTypes.h
llvm/IR/Attributes.h
llvm/IR/Attributes.gen
This means sanstats needs to depend on intrinsics_gen.
llvm-svn: 287404
CrashDebugger.cpp has the following include chain:
llvm/Analysis/TargetTransformInfo.h
llvm/IR/IntrinsicInst.h
llvm/IR/Function.h
llvm/IR/Argument.h
llvm/IR/Attributes.h
llvm/IR/Attributes.gen
This means bugpoint needs to depend on intrinsics_gen.
llvm-svn: 287402
This is a prerequisite patch for D26556:
https://reviews.llvm.org/D26556
...because there was no direct coverage for these folds (which in some cases are adding instructions).
llvm-svn: 287400
llvm-split.cpp has the following include chain:
llvm/Bitcode/BitcodeWriter.h
llvm/IR/ModuleSummaryIndex.h
llvm/IR/Module.h
llvm/IR/Function.h
llvm/IR/Argument.h
llvm/IR/Attributes.h
llvm/IR/Attributes.gen
This means llvm-split needs to depend on intrinsics_gen.
llvm-svn: 287399
llvm-lto.cpp has the following include chain:
llvm/Bitcode/BitcodeReader.h
llvm/IR/ModuleSummaryIndex.h
llvm/IR/Module.h
llvm/IR/Function.h
llvm/IR/Argument.h
llvm/IR/Attributes.h
llvm/IR/Attributes.gen
This means llvm-lto needs to depend on intrinsics_gen.
llvm-svn: 287398
llvm-ar.cpp has the following include chain:
llvm/IR/Module.h
llvm/IR/Function.h
llvm/IR/Argument.h
llvm/IR/Attributes.h
llvm/IR/Attributes.gen
This means llvm-ar needs to depend on intrinsics_gen.
llvm-svn: 287395
llvm-profdata.cpp has the following include chain:
llvm/ProfileData/SampleProfReader.h
llvm/IR/Function.h
llvm/IR/Argument.h
llvm/IR/Attributes.h
llvm/IR/Attributes.gen
This means llvm-profdata needs to depend on intrinsics_gen.
llvm-svn: 287394
lto.cpp has the following include chain:
llvm/Bitcode/BitcodeReader.h
llvm/IR/ModuleSummaryIndex.h
llvm/IR/Module.h
llvm/IR/Function.h
llvm/IR/Argument.h
llvm/IR/Attributes.h
llvm/IR/Attributes.gen
This means LTO needs to depend on intrinsics_gen.
llvm-svn: 287393
The previously used "names" are rather descriptions (they use multiple
words and contain spaces), use short programming language identifier
like strings for the "names" which should be used when exporting to
machine parseable formats.
Also removed a unused TimerGroup from Hexxagon.
Differential Revision: https://reviews.llvm.org/D25583
llvm-svn: 287369
It is used to drive this from the clang driver via -mllvm.
Same option name is used as in opt.
Differential Revision: https://reviews.llvm.org/D26832
llvm-svn: 287356
During Module linking, it's possible for SrcM->getIdentifiedStructTypes();
to return types that are actually defined in the destination module
(DstM). Depending on how the bitcode file was read,
getIdentifiedStructTypes() might do a walk over all values, including
metadata nodes, looking for types. In my case, a debug info metadata
node was shared between the two modules, and it referred to a type
defined in the destination module (see test case).
Differential Revision: https://reviews.llvm.org/D26212
llvm-svn: 287353
Summary:
LLVM will define a symbol, either EnableABIBreakingChecks or
DisableABIBreakingChecks depending on the configuration setting for
LLVM_ABI_BREAKING_CHECKS.
The llvm-config.h header will add weak references to these symbols in
every clients that includes this header. This should ensure that
a mismatch triggers a link failure (or a load time failure for DSO).
On MSVC, the pragma "detect_mismatch" is used instead.
Reviewers: rnk, jroelofs
Subscribers: llvm-commits, mgorny
Differential Revision: https://reviews.llvm.org/D26841
llvm-svn: 287352
The MIPS MSA ASE provides instructions to convert to and from half precision
floating point. This patch teaches the MIPS backend to treat f16 as a legal
type and how to promote such values to f32 for the usual set of operations.
As a result of this, the fexup[lr].w intrinsics no longer crash LLVM during
type legalization.
Reviewers: zoran.jovanvoic, vkalintiris
Differential Revision: https://reviews.llvm.org/D26398
llvm-svn: 287349
Summary:
The 32-bit instructions don't zero the high 16-bits like the 16-bit
instructions do.
Reviewers: arsenm
Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, llvm-commits, tony-tye
Differential Revision: https://reviews.llvm.org/D26828
llvm-svn: 287342
insertUniqueBackedgeBlock in lib/Transforms/Utils/LoopSimplify.cpp now
propagates existing llvm.loop metadata to newly the added backedge.
llvm::TryToSimplifyUncondBranchFromEmptyBlock in lib/Transforms/Utils/Local.cpp
now propagates existing llvm.loop metadata to the branch instructions in the
predecessor blocks of the empty block that is removed.
Differential Revision: https://reviews.llvm.org/D26495
llvm-svn: 287341
Summary:
The addr64-based legalization is incorrect for MUBUF instructions with idxen
set as well as for BUFFER_LOAD/STORE_FORMAT_* instructions. This affects
e.g. shaders that access buffer textures.
Since we never actually need the addr64-legalization in shaders, this patch
takes the easy route and keys off the calling convention. If this ever
affects (non-OpenGL) compute, the type of legalization needs to be chosen
based on some TSFlag.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98664
Reviewers: arsenm, tstellarAMD
Subscribers: kzhuravl, wdng, yaxunl, tony-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D26747
llvm-svn: 287339
