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Commit Graph

84972 Commits

Author SHA1 Message Date
NAKAMURA Takumi
ac2900c5f9 llvm/test/DebugInfo: Move two tests, 2010-04-13-PubType.ll and linkage-name.ll to X86.
llvm-svn: 164129
2012-09-18 14:57:11 +00:00
Benjamin Kramer
789d8fe701 XFAIL SROA test until Chandler can get to it.
llvm-svn: 164128
2012-09-18 14:27:53 +00:00
Dmitri Gribenko
ddd1dbb78c Coding standards: fix typo: '= deleted' -> '= delete'.
llvm-svn: 164126
2012-09-18 14:00:58 +00:00
Tom Stellard
7839a3cf23 Make MachinePostDominatorTree::DT private
llvm-svn: 164125
2012-09-18 13:49:54 +00:00
Benjamin Kramer
675cba8535 LNT builders have picked up new SROA, disable it to get the remaining builders green again.
llvm-svn: 164124
2012-09-18 13:43:00 +00:00
Chandler Carruth
5e6491119e Fix a warning in release builds and a test case I forgot to update with
a fix to getCommonType in the previous patch.

llvm-svn: 164120
2012-09-18 13:02:06 +00:00
Chandler Carruth
1fe8678a5d Add a major missing piece to the new SROA pass: aggressive splitting of
FCAs. This is essential in order to promote allocas that are used in
struct returns by frontends like Clang. The FCA load would block the
rest of the pass from firing, resulting is significant regressions with
the bullet benchmark in the nightly test suite.

Thanks to Duncan for repeated discussions about how best to do this, and
to both him and Benjamin for review.

This appears to have blocked many places where the pass tries to fire,
and so I'm expect somewhat different results with this fix added.

As with the last big patch, I'm including a change to enable the SROA by
default *temporarily*. Ben is going to remove this as soon as the LNT
bots pick up the patch. I'm just trying to get a round of LNT numbers
from the stable machines in the lab.

NOTE: Four clang tests are expected to fail in the brief window where
this is enabled. Sorry for the noise!

llvm-svn: 164119
2012-09-18 12:57:43 +00:00
Richard Osborne
552f578018 Fix instcombine to obey requested alignment when merging allocas.
llvm-svn: 164117
2012-09-18 09:31:44 +00:00
James Molloy
4cb3751b3e More domain conversion; convert VFP VMOVS to NEON instructions in more cases - when we may clobber the other S-lane by converting an S to a D instruction, make an effort to work out if the S lane is clobberable or not.
llvm-svn: 164114
2012-09-18 08:31:15 +00:00
Craig Topper
2c492a1861 Make custom operand parsing mnemonic indices use the same mnemonic table as the match table. Reorder fields in OperandMatchEntry to provide the least amount of padding for in tree targets.
llvm-svn: 164109
2012-09-18 07:02:21 +00:00
Craig Topper
c4107aa8c2 Use variable type for index into mnemonic table. Shrinks size of index field on in tree targets. Saving static data space.
llvm-svn: 164108
2012-09-18 06:10:45 +00:00
Andrew Trick
6cba50cbb4 Replaced ReInitMCSubtargetInfo with InitMCProcessor.
Now where we used to call ReInitMCSubtargetInfo, we actually recompute
the same information as InitMCSubtargetInfo instead of only setting
the feature bits.

llvm-svn: 164105
2012-09-18 05:33:15 +00:00
Craig Topper
4662d8cd85 Add LLVM_DELETED_FUNCTION to coding standards.
llvm-svn: 164101
2012-09-18 04:43:40 +00:00
Craig Topper
04a52acb1d Fix a typo. No functional change.
llvm-svn: 164100
2012-09-18 04:43:05 +00:00
Andrew Trick
1a1e7664ae Let NULL slip through again.
llvm-svn: 164099
2012-09-18 04:18:39 +00:00
Andrew Trick
e3e6fae309 TargetSchedModel API. Implement latency lookup, disabled.
llvm-svn: 164098
2012-09-18 04:03:34 +00:00
Andrew Trick
73e100e6f5 comment typo
llvm-svn: 164097
2012-09-18 04:03:30 +00:00
Andrew Trick
418db6184f TableGen subtarget emitter. Use getSchedClassIdx.
llvm-svn: 164096
2012-09-18 03:55:55 +00:00
Andrew Trick
b7b658d440 TableGen subtarget emitter. Generate resolveSchedClass generated hook for resolving instruction variants.
llvm-svn: 164095
2012-09-18 03:41:43 +00:00
Andrew Trick
c2ee4420fd TableGen subtarget emitter. Remove unnecessary header dependence.
llvm-svn: 164094
2012-09-18 03:32:57 +00:00
Craig Topper
06c859569e Mark unimplemented operator new as LLVM_DELETED_FUNCTION.
llvm-svn: 164093
2012-09-18 03:25:49 +00:00
Andrew Trick
65c7aae93f TableGen subtarget emitter. Initialize MCSubtargetInfo with the new machine model.
llvm-svn: 164092
2012-09-18 03:18:56 +00:00
Craig Topper
e65078e3c3 Mark constructors, destructors, and operator new commented as 'do not implement' with LLVM_DELETED_FUNCTION instead.
llvm-svn: 164091
2012-09-18 02:05:45 +00:00
Craig Topper
5a3d1cefa5 Mark unimplemented copy constructors and copy assignment operators as LLVM_DELETED_FUNCTION.
llvm-svn: 164090
2012-09-18 02:01:41 +00:00
Evan Cheng
82c85585f9 Use vld1 / vst2 for unaligned v2f64 load / store. e.g. Use vld1.16 for 2-byte
aligned address. Based on patch by David Peixotto.

Also use vld1.64 / vst1.64 with 128-bit alignment to take advantage of alignment
hints. rdar://12090772, rdar://12238782

llvm-svn: 164089
2012-09-18 01:42:45 +00:00
Craig Topper
24762462b0 Mark asm matcher conversion table as const.
llvm-svn: 164088
2012-09-18 01:41:49 +00:00
Evan Cheng
83f8b20257 Fix some funky indentation.
llvm-svn: 164087
2012-09-18 01:34:40 +00:00
Craig Topper
5f44668251 Fix typo in comment. No functional change.
llvm-svn: 164086
2012-09-18 01:13:36 +00:00
Manman Ren
e628d655cf PGO: preserve branch-weight metadata when simplifying Switch to a sub, an icmp
and a conditional branch; also when removing dead cases from a switch.

llvm-svn: 164084
2012-09-18 00:47:33 +00:00
Andrew Trick
2b04a12c0c Backout the wrong subtarget emitter fix
llvm-svn: 164078
2012-09-17 23:14:15 +00:00
Manman Ren
77511d5a11 PGO: preserve branch-weight metadata when simplifying Switch
Hanlde the case when we split the default edge if the default target has "icmp"
and unconditinal branch.

llvm-svn: 164076
2012-09-17 23:07:43 +00:00
Andrew Trick
1956ad7efe Fix release build after reverting
llvm-svn: 164075
2012-09-17 23:05:04 +00:00
Jakob Stoklund Olesen
b761721812 Merge into undefined lanes under -new-coalescer.
Add LIS::pruneValue() and extendToIndices(). These two functions are
used by the register coalescer when merging two live ranges requires
more than a trivial value mapping as supported by LiveInterval::join().

The pruneValue() function can remove the part of a value number that is
going to conflict in join(). Afterwards, extendToIndices can restore the
live range, using any new dominating value numbers and updating the SSA
form.

Use this complex value mapping to support merging a register into a
vector lane that has a conflicting value, but the clobbered lane is
undef.

llvm-svn: 164074
2012-09-17 23:03:25 +00:00
Jakob Stoklund Olesen
b004b398e9 Stop adding <imp-def> operands when expanding REG_SEQUENCE.
These extra operands are not needed by register allocators using
VirtRegRewriter, and RAFast don't need them any longer.

By omitting the <imp-def> operands, it becomes possible for the new
register coalescer to track which lanes are valid and which are undef.

llvm-svn: 164073
2012-09-17 23:03:21 +00:00
Andrew Trick
150c97940b Revert r164061-r164067. Most of the new subtarget emitter.
I have to work out the Target/CodeGen header dependencies
before putting this back.

llvm-svn: 164072
2012-09-17 23:00:42 +00:00
Richard Smith
f96c884c89 Remove redundant semicolons to fix -pedantic-errors build break with older Clangs.
llvm-svn: 164071
2012-09-17 22:52:05 +00:00
NAKAMURA Takumi
71a6ab5ec1 llvm/Target/TargetSubtargetInfo.h: Fix case in #include, s#llvm/Codegen/#llvm/CodeGen#.
llvm-svn: 164070
2012-09-17 22:34:56 +00:00
Manman Ren
5cee74c6a1 PGO: preserve branch-weight metadata when simplifying SwitchOnSelect.
llvm-svn: 164068
2012-09-17 22:28:55 +00:00
Andrew Trick
cc6a5dbc2b Don't use NULL as a fake keyword
llvm-svn: 164067
2012-09-17 22:26:34 +00:00
Andrew Trick
9400ee3c79 InitMCProcessor
llvm-svn: 164066
2012-09-17 22:19:12 +00:00
Andrew Trick
3d3f796f3f TargetSchedModel API. Implement latency lookup, disabled.
llvm-svn: 164065
2012-09-17 22:19:08 +00:00
Andrew Trick
81e5a058f2 comment typo
llvm-svn: 164064
2012-09-17 22:19:04 +00:00
Andrew Trick
22072f5bf2 TableGen subtarget emitter. Use getSchedClassIdx.
llvm-svn: 164063
2012-09-17 22:19:01 +00:00
Andrew Trick
7403ff5282 TableGen subtarget emitter. Generate resolveSchedClass generated hook for resolving instruction variants.
llvm-svn: 164062
2012-09-17 22:18:58 +00:00
Andrew Trick
8a499d1f62 TableGen subtarget emitter. Initialize MCSubtargetInfo with the new machine model.
llvm-svn: 164061
2012-09-17 22:18:55 +00:00
Andrew Trick
f5182127b1 TableGen subtarget emitter. Format and emit data tables for the new machine model.
llvm-svn: 164060
2012-09-17 22:18:50 +00:00
Andrew Trick
ef09f46517 TableGen subtarget emitter. Generate data tables for the new machine model.
Map the CodeGenSchedule object model onto data tables. The structure
of the data tables is defined in MC, so for convenience we include
MCSchedule.h. The alternative is maintaining a redundant copy of the
table structure definitions. Mapping the object model onto data tables
is sufficiently complicated that it should not be interleaved with
emitting source code. This avoids major problem with the backend for
itinerary generation.

llvm-svn: 164059
2012-09-17 22:18:48 +00:00
Andrew Trick
cf41195b6a TableGen subtarget emitter. Emit processor resources for the new machine model.
llvm-svn: 164058
2012-09-17 22:18:45 +00:00
Andrew Trick
d15e58e200 TableGen subtarget parser: Add getProcResourcesIdx().
llvm-svn: 164057
2012-09-17 22:18:43 +00:00
Jan Wen Voung
bd8575d1d7 Add some cases to x86 OptimizeCompare to handle DEC and INC, too.
While we are setting the earlier def to true, also make it live.

llvm-svn: 164056
2012-09-17 22:04:23 +00:00