Evan Cheng
ffa8cbd22b
Make sure epilogue esp adjustment is placed before any terminator and pop instructions.
...
llvm-svn: 40538
2007-07-26 17:45:41 +00:00
Anton Korobeynikov
e8170a07f8
Heal EH handling stuff by emitting correct offsets to callee-saved registers.
...
Pretty hackish, but code itself is dirty mess, so we won't make anything worse. :)
llvm-svn: 40472
2007-07-24 21:07:39 +00:00
Evan Cheng
8312ed6f77
Change instruction description to split OperandList into OutOperandList and
...
InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
"add{l} {$src2, $dst|$dst, $src2}",
[(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
"add{l} {$src2, $dst|$dst, $src2}",
[(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
llvm-svn: 40033
2007-07-19 01:14:50 +00:00
Evan Cheng
30e121adf6
Only adjust esp around calls in presence of alloca.
...
llvm-svn: 40028
2007-07-19 00:42:05 +00:00
Evan Cheng
6a4fb5d62b
Use MOV instead of LEA to restore ESP if callee-saved frame size is 0; if previous instruction updates esp, fold it in.
...
llvm-svn: 40018
2007-07-18 21:26:06 +00:00
Evan Cheng
cf0fdbc249
Fold prologue esp update when possible.
...
llvm-svn: 39984
2007-07-17 21:26:42 +00:00
Evan Cheng
26f6d71d26
Make sure not to break eh_return.
...
llvm-svn: 39978
2007-07-17 18:40:47 +00:00
Evan Cheng
46a48c5c3e
Missed the case where alloca is used but the stack size (not including callee-saved portion) is zero. Thanks Dan.
...
llvm-svn: 39974
2007-07-17 18:03:34 +00:00
Evan Cheng
532b73311e
Use push / pop for prologues and epilogues.
...
llvm-svn: 39967
2007-07-17 07:59:08 +00:00
Anton Korobeynikov
5635277c36
Long live the exception handling!
...
This patch fills the last necessary bits to enable exceptions
handling in LLVM. Currently only on x86-32/linux.
In fact, this patch adds necessary intrinsics (and their lowering) which
represent really weird target-specific gcc builtins used inside unwinder.
After corresponding llvm-gcc patch will land (easy) exceptions should be
more or less workable. However, exceptions handling support should not be
thought as 'finished': I expect many small and not so small glitches
everywhere.
llvm-svn: 39855
2007-07-14 14:06:15 +00:00
Dan Gohman
928144b051
Define non-intrinsic instructions for vector min, max, sqrt, rsqrt, and rcp,
...
in addition to the intrinsic forms. Add spill-folding entries for these new
instructions, and for the scalar min and max instrinsic instructions which
were missing. And add some preliminary ISelLowering code for using the new
non-intrinsic vector sqrt instruction, and fneg and fabs.
llvm-svn: 38478
2007-07-10 00:05:58 +00:00
Dale Johannesen
9072b65b0b
Refactor X87 instructions. As a side effect, all
...
their names are changed.
llvm-svn: 37876
2007-07-04 21:07:47 +00:00
Dale Johannesen
7af19491d3
Fix for PR 1505 (and 1489). Rewrite X87 register
...
model to include f32 variants. Some factoring
improvments forthcoming.
llvm-svn: 37847
2007-07-03 00:53:03 +00:00
Anton Korobeynikov
7daaf71b29
More DWARF-related things cleanup:
...
1. Fix PR1380
2. Apply Duncan's patch from PR1410
3. Insert workaround for "one personality function per module" as noted in PR1414
4. Emit correct debug frames for x86/linux. This partly fixes DebugInfo/2006-11-06-StackTrace.cpp: stack trace is
shown correctly, but arguments for function on top of stack are displayed incorrectly.
llvm-svn: 37015
2007-05-12 22:36:25 +00:00
Anton Korobeynikov
44aa4c588b
Emit correct register move information in eh frames for X86. This allows Shootout-C++/except to pass on x86/linux
...
with non-llvm-compiled (e.g. "native") unwind runtime.
llvm-svn: 36647
2007-05-02 19:53:33 +00:00
Anton Korobeynikov
d1bf4af988
Emit correct DWARF reg # for RA (return address) register
...
llvm-svn: 36646
2007-05-02 08:46:03 +00:00
Evan Cheng
e47ec4d104
eliminateFrameIndex() change.
...
llvm-svn: 36626
2007-05-01 09:13:03 +00:00
Evan Cheng
c6fa6cb4c5
Fix for PR1348. If stack inc / dec amount is > 32-bits, issue a series of add / sub instructions.
...
llvm-svn: 36456
2007-04-26 01:09:28 +00:00
Chris Lattner
fd730d86e3
do the multiplication as signed, so that 2*-2 == -4 instead of 4294967292
...
when promoted to 64-bits
llvm-svn: 36442
2007-04-25 17:23:53 +00:00
Chris Lattner
ca7480e8cb
support for >4G stack frames
...
llvm-svn: 36425
2007-04-25 04:30:24 +00:00
Chris Lattner
452294cb99
support >4G stack frames
...
llvm-svn: 36423
2007-04-25 04:25:10 +00:00
Bill Wendling
54134a37e0
Add the PADDQ to the list.
...
llvm-svn: 36406
2007-04-24 21:19:14 +00:00
Chris Lattner
c7109ece27
rename X86FunctionInfo to X86MachineFunctionInfo to match the header file
...
it is defined in.
llvm-svn: 36196
2007-04-17 17:21:52 +00:00
Anton Korobeynikov
9bc4b792bf
Implemented correct stack probing on mingw/cygwin for dynamic alloca's.
...
Also, fixed static case in presence of eax livin. This fixes PR331
PS: Why don't we still have push/pop instructions? :)
llvm-svn: 36195
2007-04-17 09:20:00 +00:00
Bill Wendling
a2eabd50c0
Changed to new MMX_ recipes.
...
llvm-svn: 35617
2007-04-03 06:18:31 +00:00
Evan Cheng
41f4f032ee
Added MRegisterInfo hook to re-materialize an instruction.
...
llvm-svn: 35205
2007-03-20 08:09:38 +00:00
Bill Wendling
5fef3fd7e7
Added "padd*" support for MMX. Added MMX move stuff to X86InstrInfo so that
...
moves, loads, etc. are recognized.
llvm-svn: 35031
2007-03-08 22:09:11 +00:00
Evan Cheng
116f97f2c7
PEI now passes a RegScavenger ptr to eliminateFrameIndex.
...
llvm-svn: 34707
2007-02-28 00:21:17 +00:00
Evan Cheng
da51cf986a
By default, spills kills the register being stored.
...
llvm-svn: 34515
2007-02-23 01:10:04 +00:00
Jim Laskey
6a937ad320
Support to provide exception and selector registers.
...
llvm-svn: 34482
2007-02-21 22:54:50 +00:00
Evan Cheng
e4ab9c032b
Re-apply my liveintervalanalysis changes. Now with PR1207 fixes.
...
llvm-svn: 34428
2007-02-19 21:49:54 +00:00
Reid Spencer
b27fcf3482
For PR1207:
...
Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.
llvm-svn: 34399
2007-02-19 03:20:00 +00:00
Evan Cheng
8c2508f1ac
Added getReservedRegs().
...
llvm-svn: 34376
2007-02-17 11:06:00 +00:00
Jim Laskey
6f5d7d292f
Only gather frame info if debug or eh.
...
llvm-svn: 33639
2007-01-29 23:20:22 +00:00
Jim Laskey
eba0cf04e5
Landing pad-less eh for PPC.
...
llvm-svn: 33622
2007-01-29 18:51:14 +00:00
Jim Laskey
64f4242072
Change the MachineDebugInfo to MachineModuleInfo to better reflect usage
...
for debugging and exception handling.
llvm-svn: 33550
2007-01-26 21:22:28 +00:00
Jim Laskey
23ed7d2625
Make LABEL a builtin opcode.
...
llvm-svn: 33537
2007-01-26 14:34:52 +00:00
Jim Laskey
ba1dc7a8c7
Call frames for intel.
...
llvm-svn: 33490
2007-01-24 19:15:24 +00:00
Jim Laskey
ebaec45158
80 columns
...
llvm-svn: 33489
2007-01-24 18:50:57 +00:00
Evan Cheng
b6a4a7f72a
PEI is now responsible for adding MaxCallFrameSize to frame size and align the stack. Each target can further adjust the frame size if necessary.
...
llvm-svn: 33460
2007-01-23 09:38:11 +00:00
Evan Cheng
d9d93832b0
hasFP() is now a virtual method of MRegisterInfo.
...
llvm-svn: 33455
2007-01-23 00:57:47 +00:00
Evan Cheng
174826c1b9
One more try...
...
llvm-svn: 33400
2007-01-20 10:17:53 +00:00
Evan Cheng
672910d722
Last check-in was bogus. There is no need to align the stack if the function is a leaf function (and without alloca).
...
llvm-svn: 33399
2007-01-20 10:11:56 +00:00
Evan Cheng
5807fbc934
Backend is reponsible for aligning the stack.
...
llvm-svn: 33388
2007-01-20 02:08:16 +00:00
Anton Korobeynikov
548b9af9c2
* PIC codegen for X86/Linux has been implemented
...
* PIC-aware internal structures in X86 Codegen have been refactored
* Visibility (default/weak) has been added
* Docs fixes (external weak linkage, visibility, formatting)
llvm-svn: 33136
2007-01-12 19:20:47 +00:00
Anton Korobeynikov
2b39939053
Really big cleanup.
...
- New target type "mingw" was introduced
- Same things for both mingw & cygwin are marked as "cygming" (as in
gcc)
- .lcomm is supported here, so allow LLVM to use it
- Correctly use underscored versions of setjmp & _longjmp for both mingw
& cygwin
llvm-svn: 32833
2007-01-03 11:43:14 +00:00
Evan Cheng
bd6a333b52
Fix naming inconsistency.
...
llvm-svn: 32823
2007-01-02 21:33:40 +00:00
Evan Cheng
5effab79f3
f64 <-> i64 bit_convert using movq in 64-bit mode.
...
llvm-svn: 32587
2006-12-14 21:55:39 +00:00
Evan Cheng
9918e7780a
Added MOVSS2DIrr and MOVDI2SSrr to foldMemeoryOperand().
...
llvm-svn: 32583
2006-12-14 19:44:45 +00:00
Bill Wendling
f13d78d3b8
What should be the last unnecessary <iostream>s in the library.
...
llvm-svn: 32333
2006-12-07 22:21:48 +00:00
Evan Cheng
f4788fe306
MI keeps a ptr of TargetInstrDescriptor, use it.
...
llvm-svn: 32296
2006-12-07 01:21:59 +00:00
Evan Cheng
bf13611e84
Match TargetInstrInfo changes.
...
llvm-svn: 32098
2006-12-01 21:52:58 +00:00
Evan Cheng
98fa7ab4d7
Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
...
of opcode and number of operands.
llvm-svn: 31947
2006-11-27 23:37:22 +00:00
Jim Laskey
bc27bd0c6e
Hopefully a good crack at making debugging work on intel -disable-fp-elim.
...
llvm-svn: 31830
2006-11-17 21:19:15 +00:00
Evan Cheng
fc1b3d8bc8
Correct instructions for moving data between GR64 and SSE registers; also correct load i64 / store i64 from v2i64.
...
llvm-svn: 31795
2006-11-16 23:33:25 +00:00
Evan Cheng
2a92afa25d
Properly transfer kill / dead info.
...
llvm-svn: 31765
2006-11-15 20:58:11 +00:00
Evan Cheng
0e82270ff2
Matches MachineInstr changes.
...
llvm-svn: 31712
2006-11-13 23:36:35 +00:00
Evan Cheng
de7ff3fa3d
Fix a potential bug.
...
llvm-svn: 31634
2006-11-10 09:13:37 +00:00
Evan Cheng
013597778d
Add implicit def / use operands to MachineInstr.
...
llvm-svn: 31633
2006-11-10 08:43:01 +00:00
Evan Cheng
6f0095807e
Use TargetInstrInfo::getNumOperands() instead of MachineInstr::getNumOperands(). In preparation for implicit reg def/use changes.
...
llvm-svn: 31616
2006-11-10 01:28:43 +00:00
Evan Cheng
8743c67826
Remove M_2_ADDR_FLAG.
...
llvm-svn: 31583
2006-11-09 02:22:54 +00:00
Evan Cheng
54c4be233e
Dead code.
...
llvm-svn: 31405
2006-11-03 02:08:41 +00:00
Evan Cheng
02e193e2ff
Delete dead code; fix 80 col violations.
...
llvm-svn: 30583
2006-09-22 21:43:59 +00:00
Anton Korobeynikov
7c2118575c
Added some eye-candy for Subtarget type checking
...
Added X86 StdCall & FastCall calling conventions. Codegen will follow.
llvm-svn: 30446
2006-09-17 20:25:45 +00:00
Evan Cheng
59e25ca829
Fixed a FuseTwoAddrInst() bug: consider GlobalAddress and JumpTableIndex
...
in addition to immediate operands.
llvm-svn: 30205
2006-09-08 21:08:13 +00:00
Evan Cheng
15dd42884e
Committing X86-64 support.
...
llvm-svn: 30177
2006-09-08 06:48:29 +00:00
Chris Lattner
a96d4ad830
Some notes on better load folding we could do
...
llvm-svn: 30155
2006-09-07 20:32:01 +00:00
Evan Cheng
24ce2a3b27
Fix a few dejagnu failures. e.g. fast-cc-merge-stack-adj.ll
...
llvm-svn: 30113
2006-09-05 08:32:49 +00:00
Chris Lattner
9cd4e3429e
Completely eliminate def&use operands. Now a register operand is EITHER a
...
def operand or a use operand.
llvm-svn: 30109
2006-09-05 02:31:13 +00:00
Chris Lattner
59a4d8dfcd
Fix a long-standing wart in the code generator: two-address instruction lowering
...
actually *removes* one of the operands, instead of just assigning both operands
the same register. This make reasoning about instructions unnecessarily complex,
because you need to know if you are before or after register allocation to match
up operand #'s with the target description file.
Changing this also gets rid of a bunch of hacky code in various places.
This patch also includes changes to fold loads into cmp/test instructions in
the X86 backend, along with a significant simplification to the X86 spill
folding code.
llvm-svn: 30108
2006-09-05 02:12:02 +00:00
Chris Lattner
db290f7479
Constify some methods. Patch provided by Anton Vayvod, thanks!
...
llvm-svn: 29756
2006-08-17 22:00:08 +00:00
Evan Cheng
a634c2b838
Missing a space.
...
llvm-svn: 29233
2006-07-20 22:52:28 +00:00
Jim Laskey
88d7595eb3
Tidy up a few things.
...
llvm-svn: 29213
2006-07-19 19:32:06 +00:00
Jim Laskey
d31b3778d8
Reduce size of routine. Shrinks .o by 37%.
...
llvm-svn: 29210
2006-07-19 17:53:32 +00:00
Evan Cheng
1d5fa40da3
Add shift and rotate by 1 instructions / patterns.
...
llvm-svn: 28980
2006-06-29 00:36:51 +00:00
Evan Cheng
2a0f3b2e79
Cygwin support: use _alloca to allocate stack if > 4k. Patch by Anton Korobeynikov.
...
llvm-svn: 28764
2006-06-13 05:14:44 +00:00
Evan Cheng
2da9d803a4
Added X86FunctionInfo subclass of MachineFunction to record whether the
...
function that is being lowered is forced to use FP. Currently this is only
true for main() / Cygwin.
llvm-svn: 28703
2006-06-06 23:30:24 +00:00
Evan Cheng
696779cea0
Cygwin support. Patch by Anton Korobeynikov!
...
llvm-svn: 28672
2006-06-02 22:38:37 +00:00
Evan Cheng
889544823a
Rename instructions for consistency sake.
...
llvm-svn: 28594
2006-05-31 19:00:07 +00:00
Evan Cheng
667b133ab9
getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd.
...
llvm-svn: 28378
2006-05-18 00:12:58 +00:00
Evan Cheng
dc9b5f5fc0
X86 integer register classes naming changes. Make them consistent with FP, vector classes.
...
llvm-svn: 28324
2006-05-16 07:21:53 +00:00
Chris Lattner
dbbbabb17b
More coverity fixes
...
llvm-svn: 28266
2006-05-12 21:14:20 +00:00
Evan Cheng
0fb3fc3626
Fixing truncate. Previously we were emitting truncate from r16 to r8 as
...
movw. That is we promote the destination operand to r16. So
%CH = TRUNC_R16_R8 %BP
is emitted as
movw %bp, %cx.
This is incorrect. If %cl is live, it would be clobbered.
Ideally we want to do the opposite, that is emitted it as
movb ??, %ch
But this is not possible since %bp does not have a r8 sub-register.
We are now defining a new register class R16_ which is a subclass of R16
containing only those 16-bit registers that have r8 sub-registers (i.e.
AX - DX). We isel the truncate to two instructions, a MOV16to16_ to copy the
value to the R16_ class, followed by a TRUNC_R16_R8.
Due to bug 770, the register colaescer is not going to coalesce between R16 and
R16_. That will be fixed later so we can eliminate the MOV16to16_. Right now, it
can only be eliminated if we are lucky that source and destination registers are
the same.
llvm-svn: 28164
2006-05-08 08:01:26 +00:00
Evan Cheng
84612a59c2
Better implementation of truncate. ISel matches it to a pseudo instruction
...
that gets emitted as movl (for r32 to i16, i8) or a movw (for r16 to i8). And
if the destination gets allocated a subregister of the source operand, then
the instruction will not be emitted at all.
llvm-svn: 28119
2006-05-05 05:40:20 +00:00
Chris Lattner
075404adaa
Remove and simplify some more machineinstr/machineoperand stuff.
...
llvm-svn: 28105
2006-05-04 18:16:01 +00:00
Chris Lattner
685568510a
Move some methods out of MachineInstr into MachineOperand
...
llvm-svn: 28102
2006-05-04 17:52:23 +00:00
Chris Lattner
97f1af2f14
There shalt be only one "immediate" operand type!
...
llvm-svn: 28099
2006-05-04 17:21:20 +00:00
Chris Lattner
c779fca289
Remove a bunch more SparcV9 specific stuff
...
llvm-svn: 28093
2006-05-04 01:15:02 +00:00
Evan Cheng
37af498015
Use movaps instead of movapd for spill / restore.
...
llvm-svn: 28005
2006-04-28 02:23:35 +00:00
Evan Cheng
70237fcb5d
MakeMIInst() should handle jump table index operands.
...
llvm-svn: 27955
2006-04-24 05:37:35 +00:00
Evan Cheng
7364ee1c92
- PEXTRW cannot take a memory location as its first source operand.
...
- PINSRWrmi encoding bug.
llvm-svn: 27818
2006-04-18 21:59:43 +00:00
Evan Cheng
d6fa185be2
SHUFP{S|D}, PSHUF* encoding bugs. Left out the mask immediate operand.
...
llvm-svn: 27817
2006-04-18 21:56:36 +00:00
Evan Cheng
82d7cacbbc
Encoding bug: CMPPSrmi, CMPPDrmi dropped operand 2 (condtion immediate).
...
llvm-svn: 27815
2006-04-18 21:31:08 +00:00
Evan Cheng
5728f30f7c
Incorrect foldMemoryOperand entries
...
llvm-svn: 27763
2006-04-17 18:06:12 +00:00
Evan Cheng
b2e3339cb2
Can't fold loads into alias vector SSE ops used for scalar operation. The load
...
address has to be 16-byte aligned but the values aren't spilled to 128-bit
locations.
llvm-svn: 27732
2006-04-16 06:58:19 +00:00
Evan Cheng
300456c7f2
Added SSE (and other) entries to foldMemoryOperand().
...
llvm-svn: 27716
2006-04-14 23:33:27 +00:00
Evan Cheng
4831ed56e4
We were not adjusting the frame size to ensure proper alignment when alloca /
...
vla are present in the function. This causes a crash when a leaf function
allocates space on the stack used to store / load with 128-bit SSE
instructions.
llvm-svn: 27698
2006-04-14 07:26:43 +00:00
Evan Cheng
4f357911ad
Use movaps to do VR128 reg-to-reg copies for now. It's shorter and available for SSE1.
...
llvm-svn: 27554
2006-04-10 07:21:31 +00:00
Jim Laskey
b93bc75add
Foundation for call frame information.
...
llvm-svn: 27491
2006-04-07 16:34:46 +00:00
Evan Cheng
22dd2900e6
Minor fixes + naming changes.
...
llvm-svn: 27410
2006-04-04 19:12:30 +00:00