Jim Grosbach
ade39d38e1
Clean up formatting a bit.
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llvm-svn: 137393
2011-08-11 23:57:17 +00:00
Jim Grosbach
d17df06881
ARM vector compare to zero instruction assembly parsing support.
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llvm-svn: 137389
2011-08-11 23:51:13 +00:00
Eli Friedman
15fda085c1
Fix mismatched tag.
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llvm-svn: 137388
2011-08-11 23:48:52 +00:00
Eli Friedman
7f6e958efc
Revision to Atomics guide, per Chris's comments.
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llvm-svn: 137386
2011-08-11 23:44:25 +00:00
Andrew Trick
d251d23191
A slew of unit tests for the recent LoopInfo::updateUnloop feature
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checked in at r137276 and r137341.
llvm-svn: 137385
2011-08-11 23:38:09 +00:00
Andrew Trick
5a5a5ebe68
Allow loop unrolling to get known trip counts from ScalarEvolution.
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SCEV unrolling can unroll loops with arbitrary induction variables. It
is a prerequisite for -disable-iv-rewrite performance. It is also
easily handles loops of arbitrary structure including multiple exits
and is generally more robust.
This is under a temporary option to avoid affecting default
behavior for the next couple of weeks. It is needed so that I can
checkin unit tests for updateUnloop.
llvm-svn: 137384
2011-08-11 23:36:16 +00:00
Jakob Stoklund Olesen
911b7966fe
Remove the InterferenceResult class.
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llvm-svn: 137381
2011-08-11 22:46:06 +00:00
Jakob Stoklund Olesen
159343e267
Eliminate the last use of InterferenceResult.
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The Query class now holds two iterators instead of an InterferenceResult
instance. The iterators are used as bookmarks for repeated
collectInterferingVRegs calls.
llvm-svn: 137380
2011-08-11 22:46:04 +00:00
Akira Hatanaka
b787f8a8a5
Enclose directive .cprestore with .set macro and nomacro to silence assembler
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warning.
llvm-svn: 137378
2011-08-11 22:42:31 +00:00
Jim Grosbach
41ef68eb17
Fix tests per now-correct encoding as of r137371.
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llvm-svn: 137376
2011-08-11 22:31:48 +00:00
Jim Grosbach
c0560c4013
Remove no-longer-true comments. These are for the assembler, also.
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llvm-svn: 137375
2011-08-11 22:30:30 +00:00
Jim Grosbach
edefbb31c3
ARM STRT assembly parsing and encoding.
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llvm-svn: 137372
2011-08-11 22:18:00 +00:00
Owen Anderson
634422d756
Make the USAT16 operand decoder auto-generate-able.
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llvm-svn: 137371
2011-08-11 22:10:11 +00:00
Owen Anderson
8a55a4d7be
Add another accidentally omitted predicate operand.
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llvm-svn: 137370
2011-08-11 22:08:38 +00:00
Owen Anderson
253a691ae5
Add missing predicate operand on SMLA and friends.
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llvm-svn: 137368
2011-08-11 22:05:38 +00:00
Jim Grosbach
ed8a320007
ARM load shifted register pre-index fix shift value asm parser encoding.
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llvm-svn: 137367
2011-08-11 22:05:09 +00:00
NAKAMURA Takumi
df74220667
DataTypes.h.cmake: Tweak INT32_MIN for MSVC. MSC treats -2147483648 as -(2147483648U).
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It caused an unexpected behavior since r137254.
llvm-svn: 137365
2011-08-11 21:59:55 +00:00
Owen Anderson
42056f92f5
Handle new register classes in Thumb2 mode. Should fix the ARM buildbots.
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llvm-svn: 137364
2011-08-11 21:52:38 +00:00
Owen Anderson
3e98fed9bc
Making SEL decodings auto-generate-able.
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llvm-svn: 137363
2011-08-11 21:50:56 +00:00
Bruno Cardoso Lopes
328a6a980b
Add a dag combine to xform 256-bit shuffles into simple vector
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inserts and extracts. This simple combine makes us generate only 1
instruction instead of 11 in the v8 case.
llvm-svn: 137362
2011-08-11 21:50:44 +00:00
Bruno Cardoso Lopes
884d8b9cb5
Fix the test added by Nadav in r137308. Make it more strict:
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1) check for the "v" version of movaps
2) add a couple of CHECK-NOT to guarantee the behavior
3) move to a more appropriate test file
llvm-svn: 137361
2011-08-11 21:50:35 +00:00
Jim Grosbach
0eb731957b
Tidy up comment.
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llvm-svn: 137359
2011-08-11 21:41:59 +00:00
Jim Grosbach
609316e481
ARM STRHT assembly parsing and encoding.
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llvm-svn: 137358
2011-08-11 21:39:41 +00:00
Owen Anderson
64c500c7dd
Fix decoding support for STREXD and LDREXD.
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llvm-svn: 137356
2011-08-11 21:34:58 +00:00
Jakob Stoklund Olesen
be84676224
Remove more dead code.
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collectInterferingVRegs will be the primary function for interference
checks.
llvm-svn: 137354
2011-08-11 21:18:34 +00:00
Jim Grosbach
5c12d41c95
ARM STRH assembly parsing and encoding.
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llvm-svn: 137353
2011-08-11 21:17:22 +00:00
Dan Gohman
93efd104ca
Fix typos in comments, and delete an unused function.
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llvm-svn: 137352
2011-08-11 21:06:32 +00:00
Akira Hatanaka
e8e203f116
Add isIndirectBranch flag.
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llvm-svn: 137351
2011-08-11 21:05:37 +00:00
Jakob Stoklund Olesen
c5ce5edb07
Privatize an unused part of the LiveIntervalUnion::Query interface.
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No clients are iterating over interference overlaps.
llvm-svn: 137350
2011-08-11 21:00:42 +00:00
Owen Anderson
4618d77bcd
Fix decoding for indexed STRB and LDRB. Fixes <rdar://problem/9926161>.
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llvm-svn: 137347
2011-08-11 20:47:56 +00:00
Jakob Stoklund Olesen
2fd36775a3
Remove some dead code.
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The InterferenceResult iterator turned out to be less important than we
thought it would be. LiveIntervalUnion clients want higher level
information, like the list of interfering virtual registers.
llvm-svn: 137346
2011-08-11 20:41:41 +00:00
Jim Grosbach
15351f4f22
Tidy up. Remove unused template parameter.
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llvm-svn: 137345
2011-08-11 20:41:13 +00:00
Owen Anderson
1ec4fcb5d3
Improve operand validation for Thumb2 addressing modes.
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llvm-svn: 137344
2011-08-11 20:40:40 +00:00
Jim Grosbach
81b2835f83
ARM STRD assembly parsing and encoding.
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llvm-svn: 137342
2011-08-11 20:28:23 +00:00
Andrew Trick
b31724d9ff
Fix for LoopInfo::updateUnloop. Remove subloop blocks from former
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ancestor loops.
I have a unit test that depends on scev-unroll, which unfortunately
isn't checked in. But I will check it in when I can.
llvm-svn: 137341
2011-08-11 20:27:32 +00:00
Owen Anderson
73e7d34732
Continue to tighten decoding by performing more operand validation.
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llvm-svn: 137340
2011-08-11 20:21:46 +00:00
Jim Grosbach
92a220276d
Tidy up.
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llvm-svn: 137339
2011-08-11 20:13:35 +00:00
Jim Grosbach
bfc85134c2
ARM STRBT assembly parsing and encoding.
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llvm-svn: 137337
2011-08-11 20:04:56 +00:00
Jim Grosbach
87f0f921b5
Add FIXME.
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llvm-svn: 137336
2011-08-11 19:43:42 +00:00
Jim Grosbach
a6572a1201
ARM STRB assembly parsing and encoding tests.
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llvm-svn: 137335
2011-08-11 19:42:58 +00:00
Jim Grosbach
9673dc9e01
Fix a copy/paste error so that LDRB(register) actually gets tested.
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llvm-svn: 137333
2011-08-11 19:34:23 +00:00
Jim Grosbach
986a3eb0b2
ARM STR(register) assembly parsing and encoding tests.
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llvm-svn: 137332
2011-08-11 19:26:17 +00:00
Jim Grosbach
e6bd3a1ab8
ARM STR(immediate) assembly parsing and encoding.
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llvm-svn: 137331
2011-08-11 19:22:40 +00:00
Owen Anderson
63ccfdccd1
Tighten decoding of addrmode2 instructions to reject more UNPREDICTABLE cases.
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llvm-svn: 137325
2011-08-11 19:00:18 +00:00
Bruno Cardoso Lopes
38d4afa02f
Fix PR10492 by teaching MOVHLPS and MOVLPS mask matching to be more strict.
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llvm-svn: 137324
2011-08-11 18:59:13 +00:00
Owen Anderson
decc5fcced
Tighten operand decoding of addrmode2 instruction. The offset register cannot be PC.
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llvm-svn: 137323
2011-08-11 18:55:42 +00:00
Owen Anderson
707fcaca0e
Correct immediate range for shifter operands. Patch by James Molloy, with additional encoding fixes added by me.
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llvm-svn: 137322
2011-08-11 18:41:59 +00:00
Benjamin Kramer
de2c60be28
Plug a memory leak.
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llvm-svn: 137321
2011-08-11 18:39:28 +00:00
Owen Anderson
8d6b9f063f
Improve error checking in the new ARM disassembler. Patch by James Molloy.
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llvm-svn: 137320
2011-08-11 18:24:51 +00:00
Jim Grosbach
9717a9c0d3
ARM push of a single register encodes as pre-indexed STR.
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Per the ARM ARM, a 'push' of a single register encodes as an STR,
not an STM.
llvm-svn: 137318
2011-08-11 18:07:11 +00:00