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Commit Graph

8443 Commits

Author SHA1 Message Date
Bruno Cardoso Lopes
b0cb678a47 Added support for FP Registers
llvm-svn: 52079
2008-06-07 21:32:41 +00:00
Evan Cheng
6b5b097805 Revert r52046. It broke cbe on x86 / Mac OS X.
llvm-svn: 52071
2008-06-07 07:50:29 +00:00
Evan Cheng
b19baf81ba Typo.
llvm-svn: 52062
2008-06-06 21:00:10 +00:00
Evan Cheng
3ac5c6575a PPC preferred loop alignment is 16.
llvm-svn: 52056
2008-06-06 19:50:46 +00:00
Anton Korobeynikov
8c40a176f7 Handle assembler identifiers specially in CBE. This fixes PR2418.
llvm-svn: 52046
2008-06-06 16:08:26 +00:00
Duncan Sands
d634afe3aa Wrap MVT::ValueType in a struct to get type safety
and better control the abstraction.  Rename the type
to MVT.  To update out-of-tree patches, the main
thing to do is to rename MVT::ValueType to MVT, and
rewrite expressions like MVT::getSizeInBits(VT) in
the form VT.getSizeInBits().  Use VT.getSimpleVT()
to extract a MVT::SimpleValueType for use in switch
statements (you will get an assert failure if VT is
an extended value type - these shouldn't exist after
type legalization).
This results in a small speedup of codegen and no
new testsuite failures (x86-64 linux).

llvm-svn: 52044
2008-06-06 12:08:01 +00:00
Bruno Cardoso Lopes
23e9cfc581 Added custom isel for MUL, SDIVREM, UDIVREM, SMUL_LOHI and UMUL_LOHI nodes
MUL is not anymore directly matched because its a pseudoinstruction.
LogicI class fixed to zero-extend immediates. 

llvm-svn: 52036
2008-06-06 06:37:31 +00:00
Bruno Cardoso Lopes
7b58f690cb Added custom SELECT_CC lowering
Added special isel for ADDE,SUBE and new patterns to match SUBC,ADDC

llvm-svn: 52031
2008-06-06 00:58:26 +00:00
Evan Cheng
badbe3e3fa Don't break strict aliasing.
llvm-svn: 52026
2008-06-05 22:59:21 +00:00
Chris Lattner
7e3db1af97 Rewrite a bunch of the CBE's inline asm code, giving it the
ability to handle indirect input operands.  This fixes PR2407.

llvm-svn: 51952
2008-06-04 18:03:28 +00:00
Duncan Sands
5a6c6a92c1 Change packed struct layout so that field sizes
are the same as in unpacked structs, only field
positions differ.  This only matters for structs
containing x86 long double or an apint; it may
cause backwards compatibility problems if someone
has bitcode containing a packed struct with a
field of one of those types.
The issue is that only 10 bytes are needed to
hold an x86 long double: the store size is 10
bytes, but the ABI size is 12 or 16 bytes (linux/
darwin) which comes from rounding the store size
up by the alignment.  Because it seemed silly not
to pack an x86 long double into 10 bytes in a
packed struct, this is what was done.  I now
think this was a mistake.  Reserving the ABI size
for an x86 long double field even in a packed
struct makes things more uniform: the ABI size is
now always used when reserving space for a type.
This means that developers are less likely to
make mistakes.  It also makes life easier for the
CBE which otherwise could not represent all LLVM
packed structs (PR2402).
Front-end people might need to adjust the way
they create LLVM structs - see following change
to llvm-gcc.

llvm-svn: 51928
2008-06-04 08:21:45 +00:00
Bruno Cardoso Lopes
5a4d1d0fd3 Some Mips minor fixes
Added support for mips little endian arch => mipsel

llvm-svn: 51923
2008-06-04 01:45:25 +00:00
Dale Johannesen
c0cd6cd4d4 Add StringConstantPrefix to control what the
assembler names of string constants look like.

llvm-svn: 51909
2008-06-03 18:09:06 +00:00
Scott Michel
5323d58281 Add necessary 64-bit support so that gcc frontend compiles (mostly). Current
issue is operand promotion for setcc/select... but looks like the fundamental
stuff is implemented for CellSPU.

llvm-svn: 51884
2008-06-02 22:18:03 +00:00
Dan Gohman
5a9c2a3434 Implement CBE support for first-class structs and array values,
and insertvalue and extractvalue instructions.

First-class array values are not trivial because C doesn't
support them. The approach I took here is to wrap all arrays
in structs. Feedback is welcome.

The 2007-01-15-NamedArrayType.ll test needed to be modified
because it has a "not grep" for a string that now exists,
because array types now have associated struct types, and
those struct types have names.

llvm-svn: 51881
2008-06-02 21:30:49 +00:00
Rafael Espindola
feec40a71f Don't use the GOT for symbols that are not externally visible.
llvm-svn: 51865
2008-06-02 07:52:43 +00:00
Bruno Cardoso Lopes
e5b4a0d794 Fixed flag issue that was generating infinite loop while in list scheduling.
llvm-svn: 51833
2008-06-01 03:49:39 +00:00
Nick Lewycky
1bcd80adf7 Peer through sext/zext when looking for not(cmp).
llvm-svn: 51819
2008-05-31 19:01:33 +00:00
Nick Lewycky
566baa2c72 Yay us! Every one of these examples turns into icmp/zext/ret.
llvm-svn: 51818
2008-05-31 18:20:26 +00:00
Chris Lattner
43a47ddd89 Fix the CBE's handling of instructions whose result is an i1. Previously,
we did not truncate the value down to i1 with (x&1).  This caused a problem
when the computation of x was nontrivial, for example, "add i1 1, 1" would 
return 2 instead of 0.

This makes the testcase compile into:

...
  llvm_cbe_t = (((llvm_cbe_r == 0u) + (llvm_cbe_r == 0u))&1);
  llvm_cbe_u = (((unsigned int )(bool )llvm_cbe_t));
...

instead of:

...
  llvm_cbe_t = ((llvm_cbe_r == 0u) + (llvm_cbe_r == 0u));
  llvm_cbe_u = (((unsigned int )(bool )llvm_cbe_t));
...

This fixes a miscompilation of mediabench/adpcm/rawdaudio/rawdaudio and
403.gcc with the CBE, regressions from LLVM 2.2. Tanya, please pull 
this into the release branch.

llvm-svn: 51813
2008-05-31 09:23:55 +00:00
Dan Gohman
00823cb0d4 Teach the DAGISelEmitter to not compute the variable_ops operand
index for the input pattern in terms of the output pattern. Instead
keep track of how many fixed operands the input pattern actually
has, and have the input matching code pass the output-emitting
function that index value. This simplifies the code, disentangles
variables_ops from the support for predication operations, and
makes variable_ops more robust.

llvm-svn: 51808
2008-05-31 02:11:25 +00:00
Evan Cheng
f1fb1d7abf Fix indentation.
llvm-svn: 51792
2008-05-30 22:39:18 +00:00
Bill Wendling
244b4db58d Add the "AsCheapAsAMove" flag to some 64-bit xor instructions.
llvm-svn: 51761
2008-05-30 06:47:04 +00:00
Dan Gohman
aa8fcd5657 Add patterns for CALL32m and CALL64m. They aren't matched in most
cases due to an isel deficiency already noted in
lib/Target/X86/README.txt, but they can be matched in this fold-call.ll
testcase, for example.

This is interesting mainly because it exposes a tricky tblgen bug;
tblgen was incorrectly computing the starting index for variable_ops
in the case of a complex pattern.

llvm-svn: 51706
2008-05-29 21:50:34 +00:00
Bill Wendling
2ba98ca60f Remove more iostream header includes. Needed to implement a "FlushStream"
function to flush a specified std::ostream.

llvm-svn: 51705
2008-05-29 21:46:33 +00:00
Dan Gohman
4e87d82476 Fix a tblgen problem handling variable_ops in tblgen instruction
definitions. This adds a new construct, "discard", for indicating
that a named node in the input matching pattern is to be discarded,
instead of corresponding to a node in the output pattern. This
allows tblgen to know where the arguments for the varaible_ops are
supposed to begin.

This fixes "rdar://5791600", whatever that is ;-).

llvm-svn: 51699
2008-05-29 19:57:41 +00:00
Dan Gohman
e256337a1a Expand small memmovs using inline code. Set the X86 threshold for expanding
memmove to a more plausible value, now that it's actually being used.

llvm-svn: 51696
2008-05-29 19:42:22 +00:00
Evan Cheng
04c0915a2f Implement vector shift up / down and insert zero with ps{rl}lq / ps{rl}ldq.
llvm-svn: 51667
2008-05-29 08:22:04 +00:00
Bill Wendling
81199f0cc8 XOR?RI instructions aren't as cheap as moves.
llvm-svn: 51664
2008-05-29 03:46:36 +00:00
Bill Wendling
edb38e9410 Implement "AsCheapAsAMove" for some obviously cheap instructions: xor and the
like.

llvm-svn: 51662
2008-05-29 01:02:09 +00:00
Bill Wendling
b56bc61cf4 Add a flag to indicate that an instruction is as cheap (or cheaper) than a move
instruction to execute. This can be used for transformations (like two-address
conversion) to remat an instruction instead of generating a "move"
instruction. The idea is to decrease the live ranges and register pressure and
all that jazz.

llvm-svn: 51660
2008-05-28 22:54:52 +00:00
Nate Begeman
e0d283668e Update some comments noticed in a recent checkin
llvm-svn: 51644
2008-05-28 16:31:36 +00:00
Chris Lattner
857e1e9cab Add chain inputs for loads.
llvm-svn: 51635
2008-05-28 04:25:57 +00:00
Chris Lattner
93047192f3 Fix CodeGen/Generic/2005-10-21-longlonggtu.ll on ia64.
llvm-svn: 51634
2008-05-28 04:14:30 +00:00
Chris Lattner
294b436abf loads should get chains. THis helps but does not solve CodeGen/Generic/2003-05-27-phifcmpd.ll
on ia64.

llvm-svn: 51633
2008-05-28 04:06:52 +00:00
Chris Lattner
d33dececf3 Fix 2006-04-28-Sign-extend-bool.ll for ia64.
llvm-svn: 51632
2008-05-28 04:00:06 +00:00
Chris Lattner
569e867c01 reindent.
llvm-svn: 51631
2008-05-28 03:59:32 +00:00
Dan Gohman
a5549a2f9c Fix the encoding for two more "rm" instructions that were using MRMSrcReg.
llvm-svn: 51630
2008-05-28 01:50:19 +00:00
Mon P Wang
8e37b2d13e Fixed X86 encoding error CVTPS2PD and CVTPD2PS when the source operand
is a memory location

llvm-svn: 51626
2008-05-28 00:42:27 +00:00
Nate Begeman
23dd264da6 Don't attempt to create VZEXT_LOAD out of an extload. This an issue where the
code generator would do something like this:

f64 = load f32 <anyext>, f32mem
v2f64 = insertelt undef, %0, 0
v2f64 = insertelt %1, 0.0, 1

into 

v2f64 = vzext_load f32mem

which on x86 is movsd, when you really wanted a cvtss2sd/movsd pair.

llvm-svn: 51624
2008-05-28 00:24:25 +00:00
Duncan Sands
4757a8dd76 Fix some constructs that gcc-4.4 warns about.
llvm-svn: 51591
2008-05-27 11:50:51 +00:00
Chris Lattner
a9c89da681 Add FreeBSD/PPC support, patch by Marcel Moolenaar!
llvm-svn: 51538
2008-05-24 04:58:48 +00:00
Evan Cheng
e5e0b4660d Eliminate x86.sse2.punpckh.qdq and x86.sse2.punpckl.qdq.
llvm-svn: 51533
2008-05-24 02:56:30 +00:00
Evan Cheng
564238c841 Eliminate x86.sse2.movs.d, x86.sse2.shuf.pd, x86.sse2.unpckh.pd, and x86.sse2.unpckl.pd intrinsics. These will be lowered into shuffles.
llvm-svn: 51531
2008-05-24 02:14:05 +00:00
Duncan Sands
69bebf19a7 Tweak how ConstantFP80Ty constants are output
so that gcc doesn't warn about them.

llvm-svn: 51529
2008-05-24 01:00:52 +00:00
Dale Johannesen
2704d9e1bc Put initialized const weak objects into correct
sections on ppc32 darwin.  g++.dg/abi/key2.C

llvm-svn: 51527
2008-05-24 00:10:20 +00:00
Evan Cheng
d312ced1cf This is done.
llvm-svn: 51526
2008-05-24 00:10:13 +00:00
Evan Cheng
98a292a302 Remove x86.sse2.loadh.pd and x86.sse2.loadl.pd. These will be lowered into load and shuffle instructions.
llvm-svn: 51522
2008-05-24 00:07:29 +00:00
Dale Johannesen
0c2dcb3cb0 Add a missed CommonLinkage check.
llvm-svn: 51503
2008-05-23 21:33:27 +00:00
Evan Cheng
4f660778f0 Use movlps / movhps to modify low / high half of 16-byet memory location.
llvm-svn: 51501
2008-05-23 21:23:16 +00:00