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Commit Graph

181831 Commits

Author SHA1 Message Date
Serguei Katkov
b0fdbb02d2 [LoopInfo] Introduce getUniqueNonLatchExitBlocks utility function
Extract the code from LoopUnrollRuntime into utility function to
re-use it in D63923.

Reviewers: reames, mkuper
Reviewed By: reames
Subscribers: fhahn, hiraditya, zzheng, dmgreen, llvm-commits
Differential Revision: https://reviews.llvm.org/D64548

llvm-svn: 366040
2019-07-15 05:51:10 +00:00
Fangrui Song
0bdc388713 [PowerPC] Support fp128 libcalls
On PowerPC, IEEE 754 quadruple-precision libcall names use "kf" instead of "tf".

In libgcc, libgcc/config/rs6000/float128-sed converts TF names to KF
names. This patch implements its 24 substitution rules.

Reviewed By: hfinkel

Differential Revision: https://reviews.llvm.org/D64282

llvm-svn: 366039
2019-07-15 05:02:32 +00:00
Yonghong Song
7ce6119bf4 [BPF] add unit tests for preserve_{array,union,struct}_access_index intrinsics
This is a followup patch for https://reviews.llvm.org/D61810/new/,
which adds new intrinsics preserve_{array,union,struct}_access_index.

Currently, only BPF backend utilizes preserve_{array,union,struct}_access_index
intrinsics, so all tests are compiled with BPF target.

https://reviews.llvm.org/D61524 already added some tests for these
intrinsics, but some of them pretty complex.
This patch added a few unit test cases focusing on individual intrinsic
functions.

Also made a few clarification on language reference for these intrinsics.

Differential Revision: https://reviews.llvm.org/D64606

llvm-svn: 366038
2019-07-15 04:51:34 +00:00
Kang Zhang
9732944946 [NFC][PowerPC] Add the test block-placement.mir
llvm-svn: 366037
2019-07-15 03:55:10 +00:00
Johannes Doerfert
3200affaf6 [ValueTracking] Look through constant Int2Ptr/Ptr2Int expressions
Summary:
This is analogous to the int2ptr/ptr2int instruction handling introduced
in D54956.

Reviewers: fhahn, efriedma, spatel, nlopes, sanjoy, lebedev.ri

Subscribers: hiraditya, bollu, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64708

llvm-svn: 366036
2019-07-15 03:24:35 +00:00
Craig Topper
d08e56b62d [X86] Separate the memory size of vzext_load/vextract_store from the element size of the result type. Use them improve the codegen of v2f32 loads/stores with sse1 only.
Summary:
SSE1 only supports v4f32. But does have instructions like movlps/movhps that load/store 64-bits of memory.

This patch breaks the connection between the node VT of the vzext_load/vextract_store patterns and the memory VT. Enabling a v4f32 node with a 64-bit memory VT. I've used i64 as the memory VT here. I've written the PatFrag predicate to just check the store size not the specific VT. I think the VT will only matter for CSE purposes. We could use v2f32, but if we want to start using these operations in more places a simple integer type might make the most sense.

I'd like to maybe use this same thing for SSE2 and later as well, but that will need more work to be supported by EltsFromConsecutiveLoads to avoid regressing lit tests. I'd maybe also like to combine bitcasts with these load/stores nodes now that the types are disconnected. And I'd also like to consider canonicalizing (scalar_to_vector + load) to vzext_load.

If you want I can split the mechanical tablegen stuff where I added the 32/64 off from the sse1 change.

Reviewers: spatel, RKSimon

Reviewed By: RKSimon

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64528

llvm-svn: 366034
2019-07-15 02:02:31 +00:00
Alexandros Lamprineas
f5ffd2a90c [TargetParser][ARM] Account dependencies when processing target features
Teaches ARM::appendArchExtFeatures to account dependencies when processing
target features: i.e. when you say -march=armv8.1-m.main+mve.fp+nofp it
means mve.fp should get discarded too. (Split from D63936)

Differential Revision: https://reviews.llvm.org/D64048

llvm-svn: 366031
2019-07-14 20:31:15 +00:00
Florian Hahn
9d60e178aa [LV] Exclude loop-invariant inputs from scalar cost computation.
Loop invariant operands do not need to be scalarized, as we are using
the values outside the loop. We should ignore them when computing the
scalarization overhead.

Fixes PR41294

Reviewers: hsaito, rengolin, dcaballe, Ayal

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D59995

llvm-svn: 366030
2019-07-14 20:12:36 +00:00
Alexandros Lamprineas
5ef786848a [clang][Driver][ARM] Favor -mfpu over default CPU features
When processing the command line options march, mcpu and mfpu, we store
the implied target features on a vector. The change D62998 introduced a
temporary vector, where the processed features get accumulated. When
calling DecodeARMFeaturesFromCPU, which sets the default features for
the specified CPU, we certainly don't want to override the features
that have been explicitly specified on the command line. Therefore, the
default features should appear first in the final vector. This problem
became evident once I added the missing (unhandled) target features in
ARM::getExtensionFeatures.

Differential Revision: https://reviews.llvm.org/D63936

llvm-svn: 366027
2019-07-14 18:32:42 +00:00
Johannes Doerfert
79a64738c8 [GitSVN][NFC] Mark dry-run commits as such in the log output
Summary: This helps to avoid worries about the "dry run flag" while testing.

Reviewers: jyknight, rnk, mehdi_amini

Subscribers: bollu, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64697

llvm-svn: 366023
2019-07-14 18:24:19 +00:00
Nikita Popov
b4e13b1810 [InstCombine] Add assume context test; NFC
Baseline test for D37215.

llvm-svn: 366021
2019-07-14 15:55:32 +00:00
Simon Pilgrim
f135b9c58b [Hashing] hash_1to3_bytes - avoid trunc(v + zext(x)) NFCI.
MSVC complains about the extension to uint64_t for an addition followed by truncation back to uint32_t - add an explicit uint32_t cast to avoid this.

llvm-svn: 366020
2019-07-14 15:05:05 +00:00
Sanjay Patel
cf01f986a7 [x86] add test for sub-with-flags opportunity (PR40483); NFC
llvm-svn: 366019
2019-07-14 14:08:39 +00:00
Florian Hahn
7b8c708ca3 Recommit "[BitcodeReader] Validate OpNum, before accessing Record array."
This recommits r365750 (git commit 8b222ecf2769ee133691f208f6166ce118c4a164)

Original message:

   Currently invalid bitcode files can cause a crash, when OpNum exceeds
   the number of elements in Record, like in the attached bitcode file.

   The test case was generated by clusterfuzz: https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=15698

   Reviewers: t.p.northover, thegameg, jfb

   Reviewed By: jfb

   Differential Revision: https://reviews.llvm.org/D64507

   llvm-svn: 365750jkkkk

llvm-svn: 366018
2019-07-14 14:06:25 +00:00
Florian Hahn
ebe035a973 [BitcodeReader] Use tighter upper bound to validate forward references.
At the moment, bitcode files with invalid forward reference can easily
cause the bitcode reader to run out of memory, by creating a forward
reference with a very high index.

We can use the size of the bitcode file as an upper bound, because a
valid bitcode file can never contain more records. This should be
sufficient to fail early in most cases. The only exception is large
files with invalid forward references close to the file size.

There are a couple of clusterfuzz runs that fail with out-of-memory
because of very high forward references and they should be fixed by this
patch.

A concrete example for this is D64507, which causes out-of-memory on
systems with low memory, like the hexagon upstream bots.

Reviewers: t.p.northover, thegameg, jfb, efriedma, hfinkel

Reviewed By: jfb

Differential Revision: https://reviews.llvm.org/D64577

llvm-svn: 366017
2019-07-14 12:35:50 +00:00
Simon Pilgrim
cf5606da1f VirtRegMap - add missing initializers. NFCI.
llvm-svn: 366016
2019-07-14 11:47:36 +00:00
Simon Pilgrim
9326af3f25 SlotIndexes - add missing initializer. NFCI.
llvm-svn: 366015
2019-07-14 11:41:52 +00:00
Simon Pilgrim
b43d2c10ca [MachineOutliner] Add missing initializers for OutlinedFunction. NFCI.
Appeases MSVC/cppcheck.

llvm-svn: 366014
2019-07-14 11:10:04 +00:00
Craig Topper
dce19387ed [X86] Remove offset of 8 from the call to FuseInst for UNPCKLPDrr folding added in r365287.
This was copy/pasted from above and I forgot to change it. We just
need the default offset of 0 here.

Fixes PR42616.

llvm-svn: 366011
2019-07-14 04:13:33 +00:00
Johannes Doerfert
2473e62ac0 [Attributor][Fix] Never override given argument numbers
llvm-svn: 366009
2019-07-13 17:01:00 +00:00
David Green
275ede00a2 [ARM] Add sign and zero extend patterns for MVE
The vmovlb instructions can be uses to sign or zero extend vector registers
between types. This adds some patterns for them and relevant testing. The
VBICIMM generation is also put behind a hasNEON check (as is already done for
VORRIMM).

Code originally by David Sherwood.

Differential Revision: https://reviews.llvm.org/D64069

llvm-svn: 366008
2019-07-13 15:43:00 +00:00
David Green
d09125d3da [ARM] MVE VNEG instruction patterns
This selects integer VNEG instructions, which can be especially useful with shifts.

Differential Revision: https://reviews.llvm.org/D64204

llvm-svn: 366006
2019-07-13 15:26:51 +00:00
David Green
4e5a1f5d21 [ARM] MVE integer abs
Similar to floating point abs, we also have instructions for integers.

Differential Revision: https://reviews.llvm.org/D64027

llvm-svn: 366005
2019-07-13 14:58:32 +00:00
David Green
e1aeabd1d8 [ARM] MVE integer min and max
This simply makes the MVE integer min and max instructions legal and adds the
relevant patterns for them.

Differential Revision: https://reviews.llvm.org/D64026

llvm-svn: 366004
2019-07-13 14:48:54 +00:00
David Green
d548563c8f [ARM] MVE VRINT support
This adds support for the floor/ceil/trunc/... series of instructions,
converting to various forms of VRINT. They use the same suffixes as their
floating point counterparts. There is not VTINTR, so nearbyint is expanded.

Also added a copysign test, to show it is expanded.

Differential Revision: https://reviews.llvm.org/D63985

llvm-svn: 366003
2019-07-13 14:38:53 +00:00
David Green
33ed732806 [ARM] MVE minnm and maxnm instructions
This adds the patterns for minnm and maxnm from the fminnum and fmaxnum nodes,
similar to scalar types.

Original patch by Simon Tatham

Differential Revision: https://reviews.llvm.org/D63870

llvm-svn: 366002
2019-07-13 14:29:02 +00:00
Thomas Preud'homme
04e17bdb7c FileCheck [7/12]: Arbitrary long numeric expressions
Summary:
This patch is part of a patch series to add support for FileCheck
numeric expressions. This specific patch extend numeric expression to
support an arbitrary number of operands, either variable or literals.

Copyright:
    - Linaro (changes up to diff 183612 of revision D55940)
    - GraphCore (changes in later versions of revision D55940 and
                 in new revision created off D55940)

Reviewers: jhenderson, chandlerc, jdenny, probinson, grimar, arichardson, rnk

Subscribers: hiraditya, llvm-commits, probinson, dblaikie, grimar, arichardson, tra, rnk, kristina, hfinkel, rogfer01, JonChesterfield

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60387

llvm-svn: 366001
2019-07-13 13:24:30 +00:00
Sanjay Patel
04a7ee7970 Revert "[InstCombine] add tests for umin/umax via usub.sat; NFC"
This reverts commit rL365999 / 0f6148df23edcd3081f5e761de19edd4f823f16d.
The tests already exist in this file, and the hoped-for transform
(mentioned in D62871) is invalid because of undef as discussed in
D63060.

llvm-svn: 366000
2019-07-13 13:16:46 +00:00
Sanjay Patel
fe7c6172e8 [InstCombine] add tests for umin/umax via usub.sat; NFC
llvm-svn: 365999
2019-07-13 12:54:48 +00:00
Sanjay Patel
d9b989ce66 [x86] simplify cmov with same true/false operands
llvm-svn: 365998
2019-07-13 12:04:52 +00:00
Fangrui Song
096e6c6d94 [Object] isNotObjectErrorInvalidFileType: simplify
llvm-svn: 365997
2019-07-13 09:28:33 +00:00
Fangrui Song
12629a9a6d [Object] isNotObjectErrorInvalidFileType: fix use-after-move
llvm-svn: 365996
2019-07-13 09:23:35 +00:00
Johannes Doerfert
fc429f73d6 [Attributor][NFC] Run clang-format on the attributor files (.h/.cpp)
The Attributor files are kept formatted with clang-format, we should try
to keep this state.

llvm-svn: 365984
2019-07-13 01:09:27 +00:00
Johannes Doerfert
c70caafbd6 [Attributor] Only return attributes with a valid state
Attributor::getAAFor will now only return AbstractAttributes with a
valid AbstractState. This simplifies call sites as they only need to
check if the returned pointer is non-null. It also reduces the potential
for accidental misuse.

llvm-svn: 365983
2019-07-13 01:09:21 +00:00
Evgeniy Stepanov
85c790896c Extend function attributes bitset size from 64 to 96.
Summary: We are going to add a function attribute number 64.

Reviewers: pcc, jdoerfert, lebedev.ri

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64663

llvm-svn: 365980
2019-07-13 00:29:03 +00:00
Johannes Doerfert
1edf4f3db1 [Attributor][FIX] Lookup of (call site) argument attributes
llvm-svn: 365977
2019-07-13 00:09:27 +00:00
Nico Weber
70b8986c96 PDB HashTable: Move TraitsT from class parameter to the methods that need it
The traits object is only used by a few methods. Deserializing a hash
table and walking it is possible without the traits object, so it
shouldn't be required to build a dummy object for that use case.

The TraitsT object used to be a function template parameter before
r327647, this restores it to that state.

This makes it clear that the traits object isn't needed at all in 1 of
the current 3 uses of HashTable (and I am going to add another use that
doesn't need it), and that the default PdbHashTraits isn't used outside
of tests.

While here, also re-enable 3 checks in the test that were commented out
(which requires making HashTableInternals templated and giving FooBar
an operator==).

No intended behavior change.

Differential Revision: https://reviews.llvm.org/D64640

llvm-svn: 365974
2019-07-12 23:30:55 +00:00
Stanislav Mekhanoshin
de1357af49 [AMDGPU] use v32f32 for 3 mfma intrinsics
These should really use v32f32, but were defined as v32i32
due to the lack of the v32f32 type.

Differential Revision: https://reviews.llvm.org/D64667

llvm-svn: 365972
2019-07-12 22:42:01 +00:00
Vitaly Buka
efa8f57b0d isBytewiseValue checks ConstantVector element by element
Summary: Vector of the same value with few undefs will sill be considered "Bytewise"

Reviewers: eugenis, pcc, jfb

Reviewed By: jfb

Subscribers: dexonsmith, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64031

llvm-svn: 365971
2019-07-12 22:37:55 +00:00
Alina Sbirlea
2b74d7bbd0 [MemorySSA] Use SetVector to avoid nondeterminism.
Summary:
Use a SetVector for DeadBlockSet.
Resolves PR42574.

Reviewers: george.burgess.iv, uabelho, dblaikie

Subscribers: jlebar, Prazek, mgrang, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64601

llvm-svn: 365970
2019-07-12 22:30:30 +00:00
Wouter van Oortmerssen
a3b1095a5b [WebAssembly] refactored utilities to not depend on MachineInstr
Summary:
Most of these functions can work for MachineInstr and MCInst
equally now.

Reviewers: dschuff

Subscribers: MatzeB, sbc100, jgravelle-google, aheejin, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64643

llvm-svn: 365965
2019-07-12 22:08:25 +00:00
Alex Lorenz
63721a457e [macCatalyst] Use macCatalyst pretty name in .build_version darwin
assembly command

'macCatalyst' is more readable than 'maccatalyst'. I renamed the objdump output,
but the assembly should match it as well.

llvm-svn: 365964
2019-07-12 22:06:08 +00:00
Douglas Yung
d706f2be63 [test][AArch64] Relax the opcode tests for FP min/max instructions.
llvm-svn: 365961
2019-07-12 21:39:45 +00:00
David Bolvansky
26f1215ef9 [InstCombine] Disable fold from D64285 for non-integer types
llvm-svn: 365959
2019-07-12 21:14:21 +00:00
Evgeniy Stepanov
d38d077cb1 Factor out resolveFrameOffsetReference (NFC).
Split AArch64FrameLowering::resolveFrameIndexReference in two parts
* Finding frame offset for the index.
* Finding base register and offset to that register.

The second part will be used to implement a virtual frame pointer in
armv8.5 MTE stack instrumentation lowering.

Reviewers: pcc, vitalybuka, hctim, ostannard

Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64171

llvm-svn: 365958
2019-07-12 21:13:55 +00:00
Matt Arsenault
cccd12337a AMDGPU: Drop remnants of byval support for shaders
Before 2018, mesa used to use byval interchangably with inreg, which
didn't really make sense. Fix tests still using it to avoid breaking
in a future commit.

llvm-svn: 365953
2019-07-12 20:12:17 +00:00
David Tenty
c0757a2f72 Fix missing use of defined() in include guard
Subscribers: arsenm, jvesely, nhaehnle, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64657

llvm-svn: 365952
2019-07-12 20:12:15 +00:00
Nikita Popov
882c74ee42 [SystemZ] Fix addcarry of addcarry of const carry (PR42606)
This fixes https://bugs.llvm.org/show_bug.cgi?id=42606 by extending
D64213. Instead of only checking if the carry comes from a matching
operation, we now check the full chain of carries. Otherwise we might
custom lower the outermost addcarry, but then generically legalize
an inner addcarry.

Differential Revision: https://reviews.llvm.org/D64658

llvm-svn: 365949
2019-07-12 20:03:34 +00:00
Craig Topper
238fa1a861 [X86] Use MachineInstr::findRegisterDefOperand to simplify some code in optimizeCompareInstr. NFCI
llvm-svn: 365946
2019-07-12 19:26:35 +00:00
Jonas Devlieghere
007f6b3016 [DebugInfo] Add column info for inline sites
The column field is missing for all inline sites, currently it's always
zero. This changes populates DW_AT_call_column field for inline sites.
Test case modified to cover this change.

Patch by: Wenlei He

Differential revision: https://reviews.llvm.org/D64033

llvm-svn: 365945
2019-07-12 19:25:45 +00:00