Jim Grosbach
b1b1ff4271
Use the correct fixup type for ARM VLDR*
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llvm-svn: 120604
2010-12-01 21:09:40 +00:00
Jim Grosbach
b2a12afa5f
Refactor LEApcrelJT as a pseudo-instructionlowered to a cannonical ADR
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instruction at MC lowering. Add binary encoding information for the ADR,
including fixup data for the label operand.
llvm-svn: 120594
2010-12-01 19:47:31 +00:00
Owen Anderson
8802c68592
Add correct encodings for STRD and LDRD, including fixup support. Additionally, update these to unified syntax.
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llvm-svn: 120589
2010-12-01 19:18:46 +00:00
Jason W Kim
d468d24fc9
kill trailing space
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llvm-svn: 120586
2010-12-01 19:07:22 +00:00
Jim Grosbach
25b2b536f3
10 bits, not 12.
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llvm-svn: 120584
2010-12-01 18:51:32 +00:00
Devang Patel
e68cb5a5cf
Disable debug info for x86-darwin9 and earlier until PR 8715 and radar 8709290 are fixed.
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llvm-svn: 120580
2010-12-01 16:59:34 +00:00
Duncan Sands
cd4f56b8e2
I don't think it makes any sense to assert that the target supports SSE3 here.
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The user (i.e. whoever generated a call to the intrinsic in the first place) is
essentially asking for a particular instruction to be placed in the assembler.
If that instruction won't execute on the target machine, that's their problem
not ours. Two buildbots with processors that don't support SSE3 were barfing
on the apm.ll test in CodeGen/X86 because of this assertion.
llvm-svn: 120574
2010-12-01 12:58:13 +00:00
Che-Liang Chiou
c61d8fa0e3
ptx: bug fix: use after free
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llvm-svn: 120571
2010-12-01 11:45:53 +00:00
Jim Grosbach
a3e6ffffe5
Elaborate on FIXME.
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llvm-svn: 120552
2010-12-01 04:01:17 +00:00
Jim Grosbach
b2044fcba1
Move the ARMAsmPrinter class defintiion into a header file.
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llvm-svn: 120551
2010-12-01 03:45:07 +00:00
Evan Cheng
84162760b7
Speculatively disable x86 portion of r120501 to appease the x86_64 buildbot.
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llvm-svn: 120549
2010-12-01 03:27:20 +00:00
Bill Wendling
e62557dc3c
Remove "comparison of integers of different signs" warning by making the
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variable unsigned.
llvm-svn: 120541
2010-12-01 02:49:04 +00:00
Bill Wendling
4fc1c4ee84
General cleanups of comments.
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llvm-svn: 120536
2010-12-01 02:42:55 +00:00
Jason W Kim
4d960e071c
ARM/MC/ELF relocation "hello world" for movw/movt.
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Lifted adjustFixupValue() from Darwin for sharing w ELF.
Test added
TODO:
refactor ELFObjectWriter::RecordRelocation more.
Possibly share more code with Darwin?
Lots more relocations...
llvm-svn: 120534
2010-12-01 02:40:06 +00:00
Bill Wendling
b7635b1ed3
Formatting. It's all the rage!
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llvm-svn: 120533
2010-12-01 02:36:55 +00:00
Bill Wendling
8861fb7484
More refactoring. This time the T1pI pattern.
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llvm-svn: 120532
2010-12-01 02:28:08 +00:00
Eric Christopher
5f7eeae6ba
Refactor load/store handling again. Simplify and make some room for
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reg+reg handling.
llvm-svn: 120526
2010-12-01 01:40:24 +00:00
Jan Wen Voung
c34fbc5bb1
Initialize an ARMConstantPoolValue field.
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llvm-svn: 120525
2010-12-01 01:38:58 +00:00
Bill Wendling
ccfea264ff
s/T1pIEncode/T1pILdStEncode/g
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s/T1pIEncodeImm/T1pILdStEncodeImm/g
llvm-svn: 120524
2010-12-01 01:38:08 +00:00
Bill Wendling
517dd72f06
Renaming variables to coincide with documentation. No functionality change.
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llvm-svn: 120522
2010-12-01 01:32:02 +00:00
Bill Wendling
8ebed2442e
Refactor T1sI and T1sIt encodings into helper classes.
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llvm-svn: 120518
2010-12-01 01:20:15 +00:00
Bill Wendling
60d0e1a06c
Refactor the T1sIt encodings into a parent class to get rid of all of the "let"
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statements.
llvm-svn: 120512
2010-12-01 00:48:44 +00:00
Owen Anderson
2299afbb49
Use by-name rather than by-order matching for NEON operands.
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llvm-svn: 120507
2010-12-01 00:28:25 +00:00
Evan Cheng
f7e586d749
Enable sibling call optimization of libcalls which are expanded during
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legalization time. Since at legalization time there is no mapping from
SDNode back to the corresponding LLVM instruction and the return
SDNode is target specific, this requires a target hook to check for
eligibility. Only x86 and ARM support this form of sibcall optimization
right now.
rdar://8707777
llvm-svn: 120501
2010-11-30 23:55:39 +00:00
Bill Wendling
6a48b15c80
Rename operands to match ARM documentation. No functionality change.
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llvm-svn: 120500
2010-11-30 23:54:45 +00:00
Jim Grosbach
c8c81941f6
Fix typo.
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llvm-svn: 120499
2010-11-30 23:51:41 +00:00
Jim Grosbach
ce4e8350aa
Trailing whitespace.
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llvm-svn: 120497
2010-11-30 23:29:24 +00:00
Jason W Kim
725321c3c7
Thanks to JimG for catching this!
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llvm-svn: 120494
2010-11-30 23:27:18 +00:00
Bill Wendling
745e2de9dc
Inline classes that were used in only one place.
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llvm-svn: 120488
2010-11-30 23:16:25 +00:00
Bill Wendling
e85934f8a5
* Add support for encoding t_addrmode_s2 and t_addrmode_s1. They are the same as
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t_addrmode_s4, but with a different scaling factor.
* Encode the Thumb1 load and store instructions. This involved a bit of
refactoring (hi, Chris! :-). Some of the patterns became dead afterwards and
were removed.
llvm-svn: 120482
2010-11-30 22:57:21 +00:00
Owen Anderson
5aff471eb8
Simplify the encoding of reg+/-imm12 values that allow PC-relative encoding. This allows the
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Thumb2 encoding to share code with the ARM encoding, which gets use fixup support for free.
It also allows us to fold away at least one codegen-only pattern.
llvm-svn: 120481
2010-11-30 22:45:47 +00:00
Jim Grosbach
09095b4dd9
Fix handling of ARM negative pc-relative fixups for loads and stores.
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llvm-svn: 120480
2010-11-30 22:40:36 +00:00
Eric Christopher
3a1c712e47
Move X86InstrFPStack.td over to PseudoI as well.
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llvm-svn: 120470
2010-11-30 21:57:32 +00:00
Eric Christopher
b15c993a73
Migrate X86InstrControl.td to use PseudoI and fix a couple of 80-col violations
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while I'm in there.
llvm-svn: 120466
2010-11-30 21:37:36 +00:00
Owen Anderson
20a6f2bd2e
Provide Thumb2 encodings for a few miscellaneous instructions.
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llvm-svn: 120455
2010-11-30 20:00:01 +00:00
Jim Grosbach
532d63789b
Add FIXME
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llvm-svn: 120451
2010-11-30 19:25:56 +00:00
Owen Anderson
5f7b3e919b
Add encoding support for Thumb2 PLD and PLI instructions.
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llvm-svn: 120449
2010-11-30 19:19:31 +00:00
Eric Christopher
95f0d1fe65
Noticed this on inspection, fix and update some comments.
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llvm-svn: 120447
2010-11-30 19:14:07 +00:00
Jim Grosbach
aa96c057be
Pseudo-ize ARM MOVPCRX
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llvm-svn: 120442
2010-11-30 18:56:36 +00:00
Owen Anderson
6581027075
Provide encodings for a few more load/store variants.
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llvm-svn: 120439
2010-11-30 18:38:28 +00:00
Jim Grosbach
cb8193b99e
Pseudo-ize BX_CALL and friends. Remove dead instruction format classes.
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rdar://8685712
llvm-svn: 120438
2010-11-30 18:30:19 +00:00
Che-Liang Chiou
f594fe5fc5
ptx: add command-line options for gpu target and ptx version
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llvm-svn: 120423
2010-11-30 10:14:14 +00:00
Eric Christopher
1a99e7ebdb
Fix some grammar in comments I noticed.
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llvm-svn: 120416
2010-11-30 09:11:54 +00:00
Eric Christopher
d8e045d29e
This defaults to GenericDomain.
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llvm-svn: 120415
2010-11-30 09:11:07 +00:00
Eric Christopher
6a21ceab5c
Implement a PseudoI class and transfer the sse instructions over to use
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it.
llvm-svn: 120412
2010-11-30 08:57:23 +00:00
Eric Christopher
73365ae8b6
Fix insertion point in pcmp expander.
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While I'm there, clean up too many \n even for me.
llvm-svn: 120411
2010-11-30 08:20:21 +00:00
Eric Christopher
2170738538
Fix some cleanups from my last patch.
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llvm-svn: 120410
2010-11-30 08:10:28 +00:00
Bill Wendling
ae920bcc50
Add parsing for the Thumb t_addrmode_s4 addressing mode. This can almost
...
certainly be made more generic. But it does allow us to parse something like:
ldr r3, [r2, r4]
correctly in Thumb mode.
llvm-svn: 120408
2010-11-30 07:44:32 +00:00
Che-Liang Chiou
df20cec4fb
ptx: add ld instruction
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support register and register-immediate addressing mode
todo: immediate and register-register addressing mode
llvm-svn: 120407
2010-11-30 07:34:44 +00:00
Eric Christopher
f27f0b5234
Rewrite mwait and monitor support and custom lower arguments.
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Fixes PR8573.
llvm-svn: 120404
2010-11-30 07:20:12 +00:00