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5535 Commits

Author SHA1 Message Date
Reid Spencer
2a23af68c8 Document a missing parameter. 
llvm-svn: 40852
 2007-08-05 19:36:39 +00:00
Chris Lattner
ab61b6f01e Fix a bug in DenseMap::clear, where we never reset a tombstone 
to EmptyKey.

llvm-svn: 40839
 2007-08-05 08:43:36 +00:00
Chris Lattner
10db9656ba When clearing a SmallPtrSet, if the set had a huge capacity, but the 
contents of the set were small, deallocate and shrink the set.  This
avoids having us to memset as much data, significantly speeding up
some pathological cases.  For example, this speeds up the verifier
from 0.3899s to 0.0763 (5.1x) on the testcase from PR1432 in a 
release build.

llvm-svn: 40837
 2007-08-05 07:32:14 +00:00
Chris Lattner
a5a692b9bb Switch the internal "Info" map from an std::map to a DenseMap. This 
speeds up idom by about 45% and postidom by about 33%.

Some extra precautions must be taken not to invalidate densemap iterators.

llvm-svn: 40827
 2007-08-05 00:02:00 +00:00
Chris Lattner
5912537997 switch the DomTreeNodes and IDoms maps in idom/postidom to a 
DenseMap instead of an std::map.  This speeds up postdomtree
by about 25% and domtree by about 23%.  It also speeds up clients,
for example, domfrontier by 11%, mem2reg by 4% and ADCE by 6%.

llvm-svn: 40826
 2007-08-04 23:48:07 +00:00
Chandler Carruth
00e56b0e81 This is the patch to provide clean intrinsic function overloading support in LLVM. It cleans up the intrinsic definitions and generally smooths the process for more complicated intrinsic writing. It will be used by the upcoming atomic intrinsics as well as vector and float intrinsics in the future. 
This also changes the syntax for llvm.bswap, llvm.part.set, llvm.part.select, and llvm.ct* intrinsics. They are automatically upgraded by both the LLVM ASM reader and the bitcode reader. The test cases have been updated, with special tests added to ensure the automatic upgrading is supported.

llvm-svn: 40807
 2007-08-04 01:51:18 +00:00
Dale Johannesen
976a1cf6cf long double patch 3 of N. Add to MVT. 
llvm-svn: 40793
 2007-08-03 20:51:37 +00:00
Dale Johannesen
dda00eb44d Long double, part 1 of N. Support in IR. 
llvm-svn: 40774
 2007-08-03 01:03:46 +00:00
Anders Carlsson
122059b2e9 Fix bug spotted by Chris. 
llvm-svn: 40725
 2007-08-02 06:05:19 +00:00
Anders Carlsson
89ea07e724 Add extend and extOrTrunc methods that do sign or zero extension depending on whether the integer is signed or not 
llvm-svn: 40724
 2007-08-02 06:00:13 +00:00
Evan Cheng
a06b9cf09f Do not emit copies for physical register output if it's not used. 
llvm-svn: 40722
 2007-08-02 05:29:38 +00:00
Evan Cheng
14bd520741 Instead of adding copyfromreg's to handle physical definitions. Now isel can 
simply specify them as results and let scheduledag handle them. That
is, instead of
SDOperand Flag = DAG.getTargetNode(Opc, MVT::i32, MVT::Flag, ...)
SDOperand Result = DAG.getCopyFromReg(Chain, X86::EAX, MVT::i32, Flag)

Just write:
SDOperand Result = DAG.getTargetNode(Opc, MVT::i32, MVT::i32, ...)

And let scheduledag emit the move from X86::EAX to a virtual register.

llvm-svn: 40710
 2007-08-02 00:28:15 +00:00
Evan Cheng
8f126e59f5 Added TargetInstrDescriptor::numDefs - num of results. 
llvm-svn: 40709
 2007-08-02 00:20:17 +00:00
Owen Anderson
7028dfaf9d Make non-local memdep not be recursive, and fix a bug on 403.gcc that this exposed. 
llvm-svn: 40692
 2007-08-01 22:01:54 +00:00
Dan Gohman
7dd04fb91c More explicit keywords. 
llvm-svn: 40673
 2007-08-01 15:32:29 +00:00
Dan Gohman
53bb686577 Make ImmutablePass::runOnModule non-virtual, since it is not 
intended to be overridden.

llvm-svn: 40671
 2007-08-01 14:28:20 +00:00
Owen Anderson
58e64df595 Rename FastDSE to just DSE. 
llvm-svn: 40668
 2007-08-01 06:36:51 +00:00
David Greene
f06a395bb9 New CallInst interface to address GLIBCXX_DEBUG errors caused by 
indexing an empty std::vector.

Updates to all clients.

llvm-svn: 40660
 2007-08-01 03:43:44 +00:00
David Greene
4251f42689 Fix GLIBCXX_DEBUG error owing to dereference of end iterator. There's 
no guarantee that an instruction returned by getDependency exists in
the maps.

llvm-svn: 40647
 2007-07-31 20:01:27 +00:00
Devang Patel
6dd3a5f747 Introduce Simple Analysis interface for loop passes. 
Right now, this interface provides hooks for only to operations, 1) clone basic block 2) delete value.

llvm-svn: 40625
 2007-07-31 08:00:57 +00:00
Anton Korobeynikov
13fd2f7128 Add detection of __dso_handle presence during configure. Use this information in the 
JITer (short path is added for darwin). This is needed to properly JIT llvm-gcc-4.2-built
binaries, since cxa_atexit is enabled by default on much more targets.

llvm-svn: 40600
 2007-07-30 20:02:02 +00:00
Dan Gohman
51e7be7b8f Fix the comments for the 'fast' parameter in addPassesToEmitFile. 
llvm-svn: 40592
 2007-07-30 15:04:59 +00:00
Dan Gohman
23f9a3ad3b Fix the comment for getClosestTargetForJIT to reflect the fact that 
it does not have a Module parameter.

llvm-svn: 40590
 2007-07-30 14:58:59 +00:00
Dan Gohman
75473b49ea More explicit keywords. 
llvm-svn: 40589
 2007-07-30 14:51:59 +00:00
Dan Gohman
b757cdd2e6 Fix pastos in comments for doFinalization functions. 
llvm-svn: 40588
 2007-07-30 14:51:13 +00:00
Devang Patel
780ecf20d1 Add facility to dump pass manager structure 
to make it easier to understand failure.

llvm-svn: 40567
 2007-07-27 20:06:09 +00:00
Devang Patel
a03e82d7ee Use SmallPtrSet. 
llvm-svn: 40560
 2007-07-27 18:34:27 +00:00
Owen Anderson
997b15d967 Allow SmallPtrSet to hold pointers to const data. 
llvm-svn: 40556
 2007-07-27 18:07:02 +00:00
Duncan Sands
e8bb2c6d32 Support for trampolines, except for X86 codegen which is 
still under discussion.

llvm-svn: 40549
 2007-07-27 12:58:54 +00:00
Christopher Lamb
258dab5389 Add a MachineFunction pass, which runs post register allocation, that turns subreg insert/extract instruction into register copies. This ensures correct code gen if the coalescer isn't able to remove all subreg instructions. 
llvm-svn: 40521
 2007-07-26 08:18:32 +00:00
Christopher Lamb
08bcd5c0f8 Teach DAG scheduling how to properly emit subreg insert/extract machine instructions. PR1350 
llvm-svn: 40520
 2007-07-26 08:12:07 +00:00
Christopher Lamb
7bef240f69 Have register info provide the inverse mapping of register->superregisters. PR1350 
llvm-svn: 40519
 2007-07-26 08:01:58 +00:00
Christopher Lamb
9a0d88efde Add target independent MachineInstr's to represent subreg insert/extract in MBB's. PR1350 
llvm-svn: 40518
 2007-07-26 07:48:21 +00:00
Christopher Lamb
73c3cd47cc Add selection DAG nodes for subreg insert/extract. PR1350 
llvm-svn: 40516
 2007-07-26 07:34:40 +00:00
Christopher Lamb
2d47a6faec Fix 80 col violation. 
llvm-svn: 40515
 2007-07-26 07:03:08 +00:00
Christopher Lamb
cb63a77a51 Remove subreg index from MachineInstr's and also keep vregs as unsigned when adding operands. 
llvm-svn: 40514
 2007-07-26 07:00:46 +00:00
Christopher Lamb
fb7a157ebc Fix comments for new types. 
llvm-svn: 40507
 2007-07-26 01:48:57 +00:00
Christopher Lamb
f3881994a7 Add support for 3 element 32-bit vector ValueTypes. 
llvm-svn: 40506
 2007-07-26 01:46:52 +00:00
Evan Cheng
4b747bb6a0 EmitAlignment() also emits optional fill value. 
llvm-svn: 40500
 2007-07-25 23:35:07 +00:00
Owen Anderson
906d9d4a10 Forgot to include this file in my last commit. 
llvm-svn: 40496
 2007-07-25 21:30:15 +00:00
Owen Anderson
6a1a8d05b8 Add basic support for performing whole-function RLE. 
Note: This has not yet been thoroughly tested.  Use at your own risk.

llvm-svn: 40489
 2007-07-25 19:57:03 +00:00
Devang Patel
d7b401bafd Add BasicInliner interface. 
This interface allows clients to inline bunch of functions with module
level call graph information.:wq

llvm-svn: 40486
 2007-07-25 18:00:25 +00:00
Dan Gohman
1444c5840b Add const to CanBeFoldedBy, CheckAndMask, and CheckOrMask. 
llvm-svn: 40480
 2007-07-24 23:00:27 +00:00
Owen Anderson
b9ad251288 Add initial support for non-local memory dependence analysis. 
NOTE: This has only been cursorily tested.  Expected improvements soon.

llvm-svn: 40476
 2007-07-24 21:52:37 +00:00
Owen Anderson
eb9f1b612c Add a GVN pass, using the value numbering code I developed for GVNPRE and the 
load elimination code from RedundantLoadElimination.

llvm-svn: 40469
 2007-07-24 17:55:58 +00:00
Owen Anderson
5969a3cb91 Rename a lot of things to change FastDLE to RedundantLoadElimination. 
llvm-svn: 40457
 2007-07-24 00:17:04 +00:00
Owen Anderson
8523f2d7c4 Forgot to commit this file. 
llvm-svn: 40447
 2007-07-23 22:00:03 +00:00
Owen Anderson
0448fc9e66 Fix a comment. 
llvm-svn: 40446
 2007-07-23 21:51:37 +00:00
Owen Anderson
bd3360e856 Add FastDLE, the load-elimination counterpart of FastDSE. 
llvm-svn: 40445
 2007-07-23 21:48:08 +00:00
Bill Wendling
97342a9b0c Add missing SSE builtins: 
__builtin_ia32_cvtss2si64
    __builtin_ia32_cvttss2si64
    __builtin_ia32_cvtsi642ss
    __builtin_ia32_cvtsd2si64
    __builtin_ia32_cvttsd2si64
    __builtin_ia32_cvtsi642sd

llvm-svn: 40411
 2007-07-23 03:07:27 +00:00