RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-26 22:42:46 +02:00
Code Issues Projects Releases Wiki Activity
31,346 Commits 4 Branches 5 Tags 704 MiB
b4ef9c8be3
Commit Graph

44 Commits

Author SHA1 Message Date
Nicolas Geoffray
5897c064a6 The PPC64 ELF ABI is "intended to use the same structure layout and calling convention rules 
as the 64-bit PowerOpen ABI" (Reference http://www.linux-foundation.org/spec/ELF/ppc64/).
Change all ELF tests to ELF32.

llvm-svn: 35624
 2007-04-03 12:35:28 +00:00
Nicolas Geoffray
b7c0895529 The ELF ABI specifies F1-F8 registers as argument registers for double, not 
F1-F10. This affects only ELF, not MachO.

llvm-svn: 35622
 2007-04-03 10:27:07 +00:00
Chris Lattner
31c6763051 Fix CodeGen/PowerPC/2007-03-24-cntlzd.ll 
llvm-svn: 35329
 2007-03-25 04:44:03 +00:00
Nicolas Geoffray
a562e5c1c5 Differentiate between the MachO and the ELF ABI the CALL instruction. 
llvm-svn: 34667
 2007-02-27 13:01:19 +00:00
Chris Lattner
b5ce97a83a one important bugfix: PPC32 didn't have both elf and macho support for 
external symbols and global addresses.  Add the missing ones.

one important workaround: PPCISD::CALL is matched by both PPCcall_ELF
and PPCcall_Macho, disable the _ELF patterns for now.

llvm-svn: 34601
 2007-02-25 19:20:53 +00:00
Chris Lattner
041fb5bc67 implement support for the linux/ppc function call ABI. Patch by 
Nicolas Geoffray!

llvm-svn: 34574
 2007-02-25 05:34:32 +00:00
Jim Laskey
1507a869b2 Patterns no longer needed due to fix in the DAG combiner. 
llvm-svn: 32612
 2006-12-15 21:39:31 +00:00
Jim Laskey
e1216497dc Not all test cases are created equal. This fix is needed. 
llvm-svn: 32605
 2006-12-15 18:51:01 +00:00
Jim Laskey
0641795154 Not needed. Misinterpreted error message from other bug (Missing load/store 
relocations.)

llvm-svn: 32604
 2006-12-15 18:45:32 +00:00
Jim Laskey
d00589fefd Provide 64-bit support for i64 sextload<i8>. 
llvm-svn: 32600
 2006-12-15 14:34:11 +00:00
Jim Laskey
18b1edb10d Reduce number of instructions to load 64-bit constants. 
llvm-svn: 32481
 2006-12-12 13:23:43 +00:00
Chris Lattner
5adcc9ae58 implement sextinreg i8->i64 and i16->i64 
llvm-svn: 32293
 2006-12-06 21:46:13 +00:00
Jim Laskey
8aac7dc0ee This is a general clean up of the PowerPC ABI. Address several problems and 
bugs including making sure that the TOS links back to the previous frame,
that the maximum call frame size is not included twice when using frame
pointers, no longer growing the frame on calls, double storing of SP and
a cleaner/faster dynamic alloca.

llvm-svn: 31792
 2006-11-16 22:43:37 +00:00
Chris Lattner
5dcf43138d fix a regression that I introduced. stdu should scale the offset by 4 
before printing it.

llvm-svn: 31791
 2006-11-16 21:45:30 +00:00
Chris Lattner
99d9dd8d07 add ppc64 r+i stores with update. 
llvm-svn: 31776
 2006-11-16 00:57:19 +00:00
Chris Lattner
bd95b9d4ae Stop using isTwoAddress, switching to operand constraints instead. 
Tell the codegen emitter that specific operands are not to be encoded, fixing
JIT regressions w.r.t. pre-inc loads and stores (e.g. lwzu, which we generate
even when general preinc loads are not enabled).

llvm-svn: 31770
 2006-11-15 23:24:18 +00:00
Chris Lattner
9bc55a6c38 fix ldu/stu jit encoding. Swith 64-bit preinc load instrs to use memri 
addrmodes.

llvm-svn: 31757
 2006-11-15 19:55:13 +00:00
Chris Lattner
2f520b36ba Fix the PPC regressions last night 
llvm-svn: 31752
 2006-11-15 17:40:51 +00:00
Chris Lattner
dc48b6a77c Rework PPC64 calls. Now we have a LR8/CTR8 register which the PPC64 calls 
clobber.  This allows LR8 to be save/restored correctly as a 64-bit quantity,
instead of handling it as a 32-bit quantity.  This unbreaks ppc64 codegen when
the code is actually located above the 4G boundary.

llvm-svn: 31734
 2006-11-14 18:44:47 +00:00
Chris Lattner
b5aefe29ae implement proper PPC64 prolog/epilog codegen. 
llvm-svn: 31684
 2006-11-11 19:05:28 +00:00
Chris Lattner
3d48461071 Mark operands as symbol lo instead of imm32 so that they print lo(x) around 
globals.

llvm-svn: 31672
 2006-11-11 04:51:36 +00:00
Chris Lattner
1aaa5f904c implement preinc support for r+i loads on ppc64 
llvm-svn: 31654
 2006-11-10 23:58:45 +00:00
Evan Cheng
fe5bb5dbe6 Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode. 
llvm-svn: 30945
 2006-10-13 21:14:26 +00:00
Evan Cheng
d22f3dd3ed Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes. 
llvm-svn: 30844
 2006-10-09 20:57:25 +00:00
Chris Lattner
c1adb2f1d3 Shift amounts are always 32-bits, even in 64-bit mode. This fixes 
CodeGen/PowerPC/2006-09-28-shift_64.ll

llvm-svn: 30652
 2006-09-28 20:48:45 +00:00
Chris Lattner
5985b77fae Make the implicit def instructions look like other instrs. 
llvm-svn: 29174
 2006-07-18 16:33:26 +00:00
Chris Lattner
ff8ee5486f Add missing PPC64 extload/truncstores 
llvm-svn: 29140
 2006-07-14 04:42:02 +00:00
Chris Lattner
852423b469 Don't match 64-bit bitfield inserts into rlwimi's. todo add rldimi. :) 
llvm-svn: 28944
 2006-06-27 21:08:52 +00:00
Chris Lattner
86c7ca4fd4 Add a pattern for i64 sra. Print 8-byte units with a space between the .quad 
and the data

llvm-svn: 28934
 2006-06-27 20:07:26 +00:00
Chris Lattner
da08df5d8a Add 64-bit MTCTR so that indirect calls work. 
llvm-svn: 28931
 2006-06-27 18:36:44 +00:00
Chris Lattner
20959f59cd Fix an incorrect store pattern. This fixes em3d. 
llvm-svn: 28930
 2006-06-27 18:22:50 +00:00
Chris Lattner
26f2bd4d4b Implement 64-bit undef, sub, shl/shr, srem/urem 
llvm-svn: 28929
 2006-06-27 18:18:41 +00:00
Chris Lattner
01182783c4 Add zextload from i32 -> i64, with this, perimeter works. 
llvm-svn: 28926
 2006-06-27 17:30:08 +00:00
Chris Lattner
c8a47e0bb0 Rearrange compares, add ADDI8, add sext from 32-to-64 bit register 
llvm-svn: 28920
 2006-06-26 23:53:10 +00:00
Chris Lattner
75e6449a0f Rename OR4 -> OR. Move some PPC64-specific stuff to the 64-bit file 
llvm-svn: 28889
 2006-06-20 23:18:58 +00:00
Chris Lattner
c74ef80a95 add some logical ops 
llvm-svn: 28887
 2006-06-20 23:11:59 +00:00
Chris Lattner
40a0a6c400 Add some more immediate patterns. This allows us to compile: 
void test6() {
  Y = 0xABCD0123BCDE4567;
}

into:

_test6:
        lis r2, -21555
        lis r3, ha16(_Y)
        ori r2, r2, 291
        rldicr r2, r2, 32, 31
        oris r2, r2, 48350
        ori r2, r2, 17767
        std r2, lo16(_Y)(r3)
        blr

llvm-svn: 28885
 2006-06-20 23:03:01 +00:00
Chris Lattner
690b03fb44 Instead of li/xoris use li/oris. Note that this doesn't work if bit 15 is 
set, so disable the pattern in that case.

llvm-svn: 28884
 2006-06-20 22:38:59 +00:00
Chris Lattner
eede1e2c00 Add some 64-bit logical ops. 
Split imm16Shifted into a sext/zext form for 64-bit support.
Add some patterns for immediate formation.  For example, we now compile this:

static unsigned long long Y;
void test3() {
  Y = 0xF0F00F00;
}

into:

_test3:
        li r2, 3840
        lis r3, ha16(_Y)
        xoris r2, r2, 61680
        std r2, lo16(_Y)(r3)
        blr

GCC produces:

_test3:
        li r0,0
        lis r2,ha16(_Y)
        ori r0,r0,61680
        sldi r0,r0,16
        ori r0,r0,3840
        std r0,lo16(_Y)(r2)
        blr

llvm-svn: 28883
 2006-06-20 22:34:10 +00:00
Chris Lattner
c97820b17c Add some patterns for globals, so we can now compile this: 
static unsigned long long X, Y;
void test1() {
  X = Y;
}

into:

_test1:
        lis r2, ha16(_Y)
        lis r3, ha16(_X)
        ld r2, lo16(_Y)(r2)
        std r2, lo16(_X)(r3)
        blr

llvm-svn: 28879
 2006-06-20 21:23:06 +00:00
Chris Lattner
19339e7a96 Add some patterns for ppc64 
llvm-svn: 28866
 2006-06-20 00:38:36 +00:00
Chris Lattner
89a0d10812 Upgrade some load/store instructions to use the proper addressing mode stuff. 
llvm-svn: 28841
 2006-06-16 21:29:41 +00:00
Chris Lattner
81845946ff fix some assumptions that pointers can only be 32-bits. With this, we can 
now compile:

static unsigned long X;
void test1() {
  X = 0;
}

into:

_test1:
        lis r2, ha16(_X)
        li r3, 0
        stw r3, lo16(_X)(r2)
        blr

Totally amazing :)

llvm-svn: 28839
 2006-06-16 21:01:35 +00:00
Chris Lattner
cb294464e7 Split 64-bit instructions out into a separate .td file 
llvm-svn: 28838
 2006-06-16 20:22:01 +00:00