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Author SHA1 Message Date
Nate Begeman
a3a0a0340f Don't expand sdiv by power of two before legalize, since it will likely 
generate illegal nodes.

llvm-svn: 26261
 2006-02-17 07:26:20 +00:00
Chris Lattner
3a899dbbc8 unbreak the build 
llvm-svn: 26260
 2006-02-17 07:09:27 +00:00
Evan Cheng
330fd348ff Unbreak x86 be 
llvm-svn: 26259
 2006-02-17 07:01:52 +00:00
Chris Lattner
d5a4da466a Fix loops where the header has an exit, fixing a loop-unswitch crash on crafty 
llvm-svn: 26258
 2006-02-17 06:39:56 +00:00
Nate Begeman
fe88578402 Fix a comment sabre noticed :) 
llvm-svn: 26257
 2006-02-17 06:24:31 +00:00
Nate Begeman
c030319b43 A couple new regression tests to make sure we always pattern match the new 
opcodes on ppc.

llvm-svn: 26256
 2006-02-17 06:16:56 +00:00
Nate Begeman
9c0ab71f4a kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBC 
and SUBE nodes that actually expose what's going on and allow for
significant simplifications in the targets.

llvm-svn: 26255
 2006-02-17 05:43:56 +00:00
Chris Lattner
6632b8ab04 Fix another miscompilation exposed by lencode, where we lowered i64->f32 
conversions to __floatdidf instead of __floatdisf on targets that support
f32 but not i64 (e.g. sparc).

llvm-svn: 26254
 2006-02-17 04:32:33 +00:00
Chris Lattner
13dd179299 add note about div by power of 2 
llvm-svn: 26253
 2006-02-17 04:20:13 +00:00
Jeff Cohen
04caf92624 Fix bug noticed by VC++. 
llvm-svn: 26252
 2006-02-17 02:12:18 +00:00
Jeff Cohen
c6693dcdab Inform Visual Studio of deleted file. 
llvm-svn: 26251
 2006-02-17 02:11:34 +00:00
Nate Begeman
224405b002 Whoops, didn't mean to check this in yet. 
llvm-svn: 26250
 2006-02-17 00:56:19 +00:00
Nate Begeman
7269afbf38 Add a missing and useful pat frag 
llvm-svn: 26249
 2006-02-17 00:51:06 +00:00
Chris Lattner
e2286db8d8 start of some new simplification code, not thoroughly tested, use at your own 
risk :)

llvm-svn: 26248
 2006-02-17 00:31:07 +00:00
Evan Cheng
c7b32ddecc Remind ourselves to revisit the "pxor vs. xorps/xorpd to clear XMM registers" 
issue. Need to do more experiments.

llvm-svn: 26247
 2006-02-17 00:04:28 +00:00
Nate Begeman
b0ec087c0f Kill the x86 pattern isel. boom. 
llvm-svn: 26246
 2006-02-17 00:03:04 +00:00
Evan Cheng
3d0135afdc Remove the entry about using movapd for SSE reg-reg moves. 
llvm-svn: 26245
 2006-02-17 00:00:58 +00:00
Evan Cheng
9de0ad321a pxor (for FLD0SS) encoding was missing the OpSize prefix. 
llvm-svn: 26244
 2006-02-16 23:59:30 +00:00
Chris Lattner
585198f5a8 Remove the skeleton target, it doesn't produce useful code and there are 
other small targets that do that can be learned from.  They also have
the added advantage of being tested :)

llvm-svn: 26243
 2006-02-16 23:14:50 +00:00
Evan Cheng
a2433f32b4 Dumb bug. Code sees a memcpy from X+c so it increments src offset. But it 
turns out not to point to a constant string but it forgot change the offset
back.

llvm-svn: 26242
 2006-02-16 23:11:42 +00:00
Evan Cheng
bf4008c701 1. Use pxor instead of xoraps / xorapd to clear FR32 / FR64 registers. This 
proves to be worth 20% on Ptrdist/ks. Might be related to dependency
   breaking support.
2. Added FsMOVAPSrr and FsMOVAPDrr as aliases to MOVAPSrr and MOVAPDrr. These
   are used for FR32 / FR64 reg-to-reg copies.
3. Tell reg-allocator to generate MOVSSrm / MOVSDrm and MOVSSmr / MOVSDmr to
   spill / restore FsMOVAPSrr and FsMOVAPDrr.

llvm-svn: 26241
 2006-02-16 22:45:17 +00:00
Evan Cheng
447c171afd Use movaps / movapd to spill / restore V4F4 / V2F8 registers. 
llvm-svn: 26240
 2006-02-16 21:20:26 +00:00
Chris Lattner
70d21494ed remove skeleton target 
llvm-svn: 26239
 2006-02-16 21:12:54 +00:00
Nate Begeman
0bc71999b9 Rework the SelectionDAG-based implementations of SimplifyDemandedBits 
and ComputeMaskedBits to match the new improved versions in instcombine.
Tested against all of multisource/benchmarks on ppc.

llvm-svn: 26238
 2006-02-16 21:11:51 +00:00
Chris Lattner
f45c17e51d don't build the skeleton target 
llvm-svn: 26237
 2006-02-16 21:11:49 +00:00
Chris Lattner
a13bad3d53 remove support for the skeleton target 
llvm-svn: 26236
 2006-02-16 21:10:57 +00:00
Chris Lattner
847c7ca438 Change SplitBlock to increment a BasicBlock::iterator, not an Instruction*. Apparently they do different things :) 
This fixes a testcase that nate reduced from spass.

Also included are a couple minor code changes that don't affect the generated
code at all.

llvm-svn: 26235
 2006-02-16 19:36:22 +00:00
Evan Cheng
af9730a217 MOVAPSrr and MOVAPDrr instruction format should be MRMSrcReg. 
llvm-svn: 26234
 2006-02-16 19:34:41 +00:00
Duraid Madina
3fcb00a53f distinguish between objects and register names, now we can have stuff 
with names like "f84", "in6" etc etc.

this should fix one or two tests

llvm-svn: 26232
 2006-02-16 13:12:57 +00:00
Evan Cheng
131901cbb8 If the false case is the current basic block, then this is a self loop. 
We do not want to emit "Loop: ... brcond Out; br Loop", as it adds an extra
instruction in the loop.  Instead, invert the condition and emit
"Loop: ... br!cond Loop; br Out.

Generalize the fix by moving it from PPCDAGToDAGISel to SelectionDAGLowering.

llvm-svn: 26231
 2006-02-16 08:27:56 +00:00
Chris Lattner
6f407a54c1 Lowering of sdiv X, pow2 was broken, this fixes it. This patch is written 
by Nate, I'm just committing it for him.

llvm-svn: 26230
 2006-02-16 08:02:36 +00:00
Chris Lattner
cf5110a6a6 Fix a minor makefile bug with lex/yacc handling that nate noticed. We don't 
want to copy the files when the .cpp file changes, we want to copy them
to the .cvs versions when the .l/.y file change (like the comments even say).
This avoids having bogus changes show up in diffs.

llvm-svn: 26229
 2006-02-16 05:10:48 +00:00
Jeff Cohen
381e19a745 Fix VC++ warning. 
llvm-svn: 26228
 2006-02-16 04:07:37 +00:00
Jeff Cohen
a57cef0ed9 Visual Studio enters the future of bisoning. 
llvm-svn: 26227
 2006-02-16 04:07:03 +00:00
Evan Cheng
74228303ad Use movaps / movapd (instead of movss / movsd) to do FR32 / FR64 reg to reg 
transfer.

According to the Intel P4 Optimization Manual:

Moves that write a portion of a register can introduce unwanted
dependences. The movsd reg, reg instruction writes only the bottom
64 bits of a register, not to all 128 bits. This introduces a dependence on
the preceding instruction that produces the upper 64 bits (even if those
bits are not longer wanted). The dependence inhibits register renaming,
and thereby reduces parallelism.

Not to mention movaps is shorter than movss.

llvm-svn: 26226
 2006-02-16 01:50:02 +00:00
Chris Lattner
57142c7e12 fix a bug where we unswitched the wrong way 
llvm-svn: 26225
 2006-02-16 01:24:41 +00:00
Evan Cheng
2f3056286a A bit more memset / memcpy optimization. 
Turns them into calls to memset / memcpy if 1) buffer(s) are not DWORD aligned,
2) size is not known to be greater or equal to some minimum value (currently 128).

llvm-svn: 26224
 2006-02-16 00:21:07 +00:00
Chris Lattner
0a6283e1c2 Implement trivial unswitching for switch stmts. This allows us to trivial 
unswitch this loop on 2 before sweating to unswitch on 1/3.

void test4(int N, int i, int C, int*P, int*Q) {
  int j;
  for (j = 0; j < N; ++j) {
    switch (C) {                // general unswitching.
    default: P[i+j] = 0; break;
    case 1: Q[i+j] = 0; break;
    case 3: P[i+j] = Q[i+j]; break;
    case 2: break;              //  TRIVIAL UNSWITCH on C==2
    }
  }
}

llvm-svn: 26223
 2006-02-15 22:52:05 +00:00
Evan Cheng
93b4f4fa67 Remove an entry. 
llvm-svn: 26222
 2006-02-15 22:14:34 +00:00
Evan Cheng
07063456aa Remove an unused function parameter. 
llvm-svn: 26221
 2006-02-15 22:12:35 +00:00
Chris Lattner
4b996ebd5e make "trivial" unswitching significantly more general. It can now handle 
this for example:

  for (j = 0; j < N; ++j) {     // trivial unswitch
    if (C)
      P[i+j] = 0;
  }

turning it into the obvious code without bothering to duplicate an empty loop.

llvm-svn: 26220
 2006-02-15 22:03:36 +00:00
Evan Cheng
5c2ecfd29b Turn a memcpy from string constant into a series of stores of constant values. 
llvm-svn: 26219
 2006-02-15 21:59:04 +00:00
Andrew Lenharth
f66fde7b14 fix a bunch of alpha regressions. see bug 709 
llvm-svn: 26218
 2006-02-15 21:13:37 +00:00
Chris Lattner
d720ec9449 new test 
llvm-svn: 26217
 2006-02-15 19:52:06 +00:00
Jim Laskey
e51152ac31 Should not combine ISD::LOCATIONs until we have scheme to remove from 
MachineDebugInfo tables.

llvm-svn: 26216
 2006-02-15 19:34:44 +00:00
Chris Lattner
9268890212 Checking the wrong value. This caused us to emit silly code like 
Y = seteq bool X, true
instead of just using X :)

llvm-svn: 26215
 2006-02-15 19:05:52 +00:00
Jim Laskey
517f94f3b0 Code sufficiently protected against this test. 
llvm-svn: 26213
 2006-02-15 17:20:59 +00:00
Duraid Madina
b510fdd272 reverting previous change, will add support for other compilers later 
llvm-svn: 26211
 2006-02-15 07:57:42 +00:00
Chris Lattner
0ebae20ee1 Convert over to the new way of handling lex/bison checked into cvs 
llvm-svn: 26209
 2006-02-15 07:26:07 +00:00
Chris Lattner
0974ebab7b Check the new form for bison output into CVS 
llvm-svn: 26208
 2006-02-15 07:24:01 +00:00