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Commit Graph

14862 Commits

Author SHA1 Message Date
Evan Cheng
b6b08dfca1 Explicitly initialize SlowFPBrcc and Pref32BitThumb to false.
llvm-svn: 110587
2010-08-09 19:19:36 +00:00
Evan Cheng
15d23d4966 Change -prefer-32bit-thumb to attribute -mattr=+32bit instead to disable more 32-bit to 16-bit optimizations.
llvm-svn: 110584
2010-08-09 18:35:19 +00:00
Bruno Cardoso Lopes
6a92e01d05 Memory version of vcvtdq2pd intrinsic
llvm-svn: 110582
2010-08-09 18:20:14 +00:00
Bruno Cardoso Lopes
0794b8ab3f Patterns to match vinsert, vbroadcast, vmovmask and vcvtdq2pd AVX intrinsics
llvm-svn: 110580
2010-08-09 18:03:43 +00:00
Evan Cheng
a04ba7588a Add an option to disable 32 -> 16-bit Thumb2 size reduction pass for experimentation.
llvm-svn: 110579
2010-08-09 17:16:10 +00:00
Kalle Raiskila
e2c0e66ff1 Have SPU handle halfvec stores aligned by 8 bytes.
llvm-svn: 110576
2010-08-09 16:33:00 +00:00
Nick Lewycky
3a15ba4d5e Add optimization to Target/README.txt.
llvm-svn: 110543
2010-08-08 07:04:25 +00:00
Bill Wendling
39c49e3e17 Use the "isCompare" machine instruction attribute instead of calling the
relatively expensive comparison analyzer on each instruction. Also rename the
comparison analyzer method to something more in line with what it actually does.

This pass is will eventually be folded into the Machine CSE pass.

llvm-svn: 110539
2010-08-08 05:04:59 +00:00
Dale Johannesen
23f9086dd3 Use sdmem and sse_load_f64 (etc.) for the vector
form of CMPSD (etc.)  Matching a 128-bit memory
operand is wrong, the instruction uses only 64 bits
(same as ADDSD etc.)  8193553.

llvm-svn: 110491
2010-08-07 00:33:42 +00:00
Bruno Cardoso Lopes
5b602f8822 Patterns to match AVX 256-bit vzero intrinsics
llvm-svn: 110480
2010-08-06 22:10:01 +00:00
Bruno Cardoso Lopes
821eebf946 Patterns to match AVX 256-bit permutation intrinsics
llvm-svn: 110468
2010-08-06 20:03:27 +00:00
Jim Grosbach
9ef6362af1 Remove empty processFunctionBeforeFrameFinalized(). The default
implementation of the function is equivalent, so no need to provide
the target-specific version until/unless it needs to do something.

llvm-svn: 110465
2010-08-06 18:57:24 +00:00
Owen Anderson
f2fea95f2f Reapply r110396, with fixes to appease the Linux buildbot gods.
llvm-svn: 110460
2010-08-06 18:33:48 +00:00
Rafael Espindola
6d53fded19 Fix eabi calling convention when a 64 bit value shadows r3.
Without this what was happening was:

* R3 is not marked as "used"
* ARM backend thinks it has to save it to the stack because of vaarg
* Offset computation correctly ignores it
* Offsets are wrong

llvm-svn: 110446
2010-08-06 15:35:32 +00:00
Bruno Cardoso Lopes
d186fba555 Patterns to match AVX 256-bit horizontal arithmetic intrinsics
llvm-svn: 110427
2010-08-06 02:10:30 +00:00
Bruno Cardoso Lopes
5e9f9c921e Patterns to match AVX 256-bit arithmetic intrinsics
llvm-svn: 110425
2010-08-06 01:52:29 +00:00
Bill Wendling
0cd2ae5158 Add the Optimize Compares pass (disabled by default).
This pass tries to remove comparison instructions when possible. For instance,
if you have this code:

   sub r1, 1
   cmp r1, 0
   bz  L1

and "sub" either sets the same flag as the "cmp" instruction or could be
converted to set the same flag, then we can eliminate the "cmp" instruction all
together. This is a important for ARM where the ALU instructions could set the
CPSR flag, but need a special suffix ('s') to do so.

llvm-svn: 110423
2010-08-06 01:32:48 +00:00
Owen Anderson
aadd8a89ca Revert r110396 to fix buildbots.
llvm-svn: 110410
2010-08-06 00:23:35 +00:00
Eric Christopher
cf17d8dfa7 Add an option to always emit realignment code for a particular module.
llvm-svn: 110404
2010-08-05 23:57:43 +00:00
Owen Anderson
b9762c07cb Don't use PassInfo* as a type identifier for passes. Instead, use the address of the static
ID member as the sole unique type identifier.  Clean up APIs related to this change.

llvm-svn: 110396
2010-08-05 23:42:04 +00:00
Dan Gohman
8a813c4ded Remove IntrWriteMem, as it's the default. Rename IntrWriteArgMem
to IntrReadWriteArgMem, as it's for reading as well as writing.

llvm-svn: 110395
2010-08-05 23:36:21 +00:00
Bruno Cardoso Lopes
a26a97510a Support very basic (doesn't include ABI support in the front-end, varags, ...) 256-bit argument passing and return for AVX
llvm-svn: 110394
2010-08-05 23:35:51 +00:00
Eric Christopher
b10ca25085 Handle the memory barrier pseudo that goes to nothing for the JIT.
llvm-svn: 110371
2010-08-05 20:04:36 +00:00
Eric Christopher
bc14450d15 Set hasSideEffects on the 64-bit no-sse memory barrier.
llvm-svn: 110369
2010-08-05 19:54:59 +00:00
Jim Grosbach
fb6af5329d For local variables in functions with a frame pointer, use FP as a base
register for local access when it's closer to the stack slot being refererenced
than the stack pointer. Make sure to take into account any argument frame
SP adjustments that are in affect at the time.

rdar://8256090

llvm-svn: 110366
2010-08-05 19:27:37 +00:00
Bob Wilson
fbce203f20 Fix indentation.
llvm-svn: 110363
2010-08-05 19:00:21 +00:00
Bob Wilson
4ba3c0a5e1 Add an ARM RSCrr instruction for disassembly only.
Partial fix for PR7792.

llvm-svn: 110361
2010-08-05 18:59:36 +00:00
Eric Christopher
61f3059ee1 Be a little bit more specific about target for the memory barrier
instructions.

llvm-svn: 110360
2010-08-05 18:36:20 +00:00
Eric Christopher
904ec3a392 Handle the pseudo in MCInstLower.
llvm-svn: 110359
2010-08-05 18:34:30 +00:00
Bob Wilson
9fbaea3765 Add an ARM RSBrr instruction for disassembly only.
Partial fix for PR7792.

llvm-svn: 110358
2010-08-05 18:23:43 +00:00
Chandler Carruth
01c83a8512 Silence a GCC warning about && and || without explicit parentheses. This
preserves the existing behavior, as it seems a concious choice to allow RS to
be null and BigStack marked true.

llvm-svn: 110307
2010-08-05 03:04:21 +00:00
Bob Wilson
214b004717 ARM "rrx" shift operands do not have an immediate. PR7790.
llvm-svn: 110292
2010-08-05 00:34:42 +00:00
Eric Christopher
0e09eb9f77 Make x86-64 membarriers work without sse and clean up some of the
uses.

llvm-svn: 110274
2010-08-04 23:03:04 +00:00
Jim Grosbach
511dbe9c8e and back in. false alarm on the tests from another unrelated local change.
llvm-svn: 110269
2010-08-04 22:46:09 +00:00
Eli Friedman
401dbe036d PR7814: Truncates cannot be ignored for signed comparisons.
llvm-svn: 110268
2010-08-04 22:40:58 +00:00
Devang Patel
53e2e4feae Implement target specific getDebugValueLocation().
llvm-svn: 110267
2010-08-04 22:39:39 +00:00
Jim Grosbach
497c60502c oops. revert for a moment to clean up tests first.
llvm-svn: 110259
2010-08-04 22:12:43 +00:00
Jim Grosbach
ece51f94db Reserve a stack slot if the function adjusts the stack but doesn't
simplify the call frame pseudo instructions. In that situation, the
calculations for estimating the stack size will be way off, leading to
not having an emergency spill slot when we need one. It should be possible
to be more precise about tracking the adjustment values, but not really
necessary for correctness. Upcoming cleanups for PEI in general will
render that moot.

llvm-svn: 110258
2010-08-04 22:10:15 +00:00
Devang Patel
97a93285f5 Implement target specific getDebugValueLocation().
llvm-svn: 110256
2010-08-04 22:07:50 +00:00
Torok Edwin
319c3f56c8 Use indirect calls in PowerPC JIT.
See PR5201. There is no way to know if direct calls will be within the allowed
range for BL. Hence emit all calls as indirect when in JIT mode.
Without this long-running applications will fail to JIT on PowerPC with a
relocation failure.

llvm-svn: 110246
2010-08-04 20:47:44 +00:00
Dale Johannesen
53bc276b33 Remove switch for disabling ARM tail calls. They
seem to be working correctly.  No functional change.

llvm-svn: 110226
2010-08-04 18:07:17 +00:00
Devang Patel
e48431509c Add DEBUG message.
llvm-svn: 110224
2010-08-04 18:06:05 +00:00
Benjamin Kramer
8bce8e326c Enable COFF writer on mingw32 and cygwin.
llvm-svn: 110200
2010-08-04 15:32:40 +00:00
Kalle Raiskila
ce1e4d80cb Make SPU backend handle insertelement and
store for "half vectors"

llvm-svn: 110198
2010-08-04 13:59:48 +00:00
Benjamin Kramer
968cc0119f Print an error message when someone tries -integrated-as on an unsupported target.
- The COFF backend doesn't support MingW/Cygwin at the moment, it'll report an
  error, but it's still much better than random assertions from the MachO backend.
- We want to make ELF the default eventually, it's what the majority of targets use.

llvm-svn: 110197
2010-08-04 13:16:30 +00:00
Gabor Greif
50fb0419ea by Alexander Herz:
"The CWriter::GetValueName() method does not check if a value as an alias 
and emits the alias name which will never be defined in the output .c 
file (so the output file fails to compile). This can happen if you have 
multiple inheritance with several destructors defined by clang (...D0Ev, 
...D1Ev, ...D2Ev)."

-- applied with minor tweaks. Thanks!

llvm-svn: 110194
2010-08-04 10:00:52 +00:00
Bob Wilson
6a2437480a Combine NEON VABD (absolute difference) intrinsics with ADDs to make VABA
(absolute difference with accumulate) intrinsics.  Radar 8228576.

llvm-svn: 110170
2010-08-04 00:12:08 +00:00
Chris Lattner
a2e36c6b18 fix a win64 encoding problem, patch by Cameron Esfahani!
llvm-svn: 110164
2010-08-03 22:49:22 +00:00
Nate Begeman
b506e13a32 Add support for getting & setting the FPSCR application register on ARM when VFP is enabled.
Add support for using the FPSCR in conjunction with the vcvtr instruction, for controlling fp to int rounding.
Add support for the FLT_ROUNDS_ node now that the FPSCR is exposed.

llvm-svn: 110152
2010-08-03 21:31:55 +00:00
Oscar Fuentes
7186be986b CMake: Change somme target library names:
XCore->XCoreGen
PIC16->PIC16CodeGen

After updating your working copy, the first build will fail because it
is using the old library dependencies. Start the build again and it
will work fine.

llvm-svn: 110127
2010-08-03 17:40:31 +00:00