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Commit Graph

89303 Commits

Author SHA1 Message Date
Arnold Schwaighofer
b7dd0ff204 ARM cost model: Add vector reverse shuffle costs
A reverse shuffle is lowered to a vrev and possibly a vext instruction (quad
word).

radar://13171406

llvm-svn: 174933
2013-02-12 02:40:39 +00:00
Arnold Schwaighofer
fafd6a4d28 Cost model: Add check for reverse shuffles to CostModel analysis
Check for reverse shuffles in the CostModel analysis pass and query
TargetTransform info accordingly. This allows us we can write test cases for
reverse shuffles.

radar://13171406

llvm-svn: 174932
2013-02-12 02:40:37 +00:00
Arnold Schwaighofer
1ecca5fd68 ARM NEON: Handle v16i8 and v8i16 reverse shuffles
Lower reverse shuffles to a vrev64 and a vext instruction instead of the default
legalization of storing and loading to the stack. This is important because we
generate reverse shuffles in the loop vectorizer when we reverse store to an
array.

  uint8_t Arr[N];
  for (i = 0; i < N; ++i)
    Arr[N - i - 1] = ...

radar://13171760

llvm-svn: 174929
2013-02-12 01:58:32 +00:00
Chad Rosier
0422258982 Update error message due to previous commit, r174926.
llvm-svn: 174927
2013-02-12 01:12:24 +00:00
Chad Rosier
eb4399962e [ms-inline asm] Add support for lexing hexidecimal integers with a [hH] suffix.
Part of rdar://12470373

llvm-svn: 174926
2013-02-12 01:00:01 +00:00
David Blaikie
ec946c1606 DIBuilder: make the return type of createBasicType more specific
llvm-svn: 174924
2013-02-12 00:40:41 +00:00
Kay Tiong Khoo
d299c572f3 Added 0x0D to 2-byte opcode extension table for prefetch* variants
Fixed decode of existing 3dNow prefetchw instruction
Intel is scheduled to add a compatible prefetchw (same encoding) to future CPUs

llvm-svn: 174920
2013-02-12 00:19:12 +00:00
Hal Finkel
5e637e4e5d BBVectorize: Don't over-search when building the dependency map
When building the pairable-instruction dependency map, don't search
past the last pairable instruction. For large blocks that have been
divided into multiple instruction groups, searching past the last
instruction in each group is very wasteful. This gives a 32% speedup
on the csa.ll test case from PR15222 (when using 50 instructions
in each group).

No functionality change intended.

llvm-svn: 174915
2013-02-11 23:02:17 +00:00
Hal Finkel
b67d7ef969 BBVectorize: Omit unnecessary entries in PairableInstUsers
This map is queried only for instructions in pairs of pairable
instructions; so make sure that only pairs of pairable
instructions are added to the map. This gives a 3.5% speedup
on the csa.ll test case from PR15222.

No functionality change intended.

llvm-svn: 174914
2013-02-11 23:02:09 +00:00
Michael J. Spencer
1696e9f28b [Support][Compiler] Add LLVM_HAS_VARIADIC_TEMPLATES.
llvm-svn: 174913
2013-02-11 22:51:07 +00:00
Akira Hatanaka
10788fa4a6 [mips] Expand pseudo instructions before they are emitted in
MipsCodeEmitter.cpp.

JALR and NOP are expanded by function emitPseudoExpansionLowering, which is not
called when the old JIT is used.

This fixes the following tests which have been failing on
llvm-mips-linux builder:

LLVM :: ExecutionEngine__2003-01-04-LoopTest.ll
LLVM :: ExecutionEngine__2003-05-06-LivenessClobber.ll
LLVM :: ExecutionEngine__2003-06-04-bzip2-bug.ll
LLVM :: ExecutionEngine__2005-12-02-TailCallBug.ll
LLVM :: ExecutionEngine__2003-10-18-PHINode-ConstantExpr-CondCode-Failure.ll
LLVM :: ExecutionEngine__hello2.ll
LLVM :: ExecutionEngine__stubs.ll
LLVM :: ExecutionEngine__test-branch.ll
LLVM :: ExecutionEngine__test-call.ll
LLVM :: ExecutionEngine__test-common-symbols.ll
LLVM :: ExecutionEngine__test-loadstore.ll
LLVM :: ExecutionEngine__test-loop.ll

llvm-svn: 174912
2013-02-11 22:35:40 +00:00
Bill Wendling
b1b156b0e8 Rename AttributeSets to AttributeGroups so that it's more meaningful.
llvm-svn: 174911
2013-02-11 22:33:26 +00:00
Bill Wendling
0b59566dee Use a std::map so that we record the group ID.
llvm-svn: 174910
2013-02-11 22:32:29 +00:00
Bill Wendling
4ebafe3a4e Rename to something more sensible. No functionality change.
llvm-svn: 174909
2013-02-11 22:31:34 +00:00
Akira Hatanaka
23e95ae884 [mips] Fix indentation.
llvm-svn: 174907
2013-02-11 22:03:52 +00:00
Michael Ilseman
61bd4eabc9 Optimization: bitcast (<1 x ...> insertelement ..., X, ...) to ... ==> bitcast X to ...
llvm-svn: 174905
2013-02-11 21:41:44 +00:00
Krzysztof Parzyszek
272abb00e0 Extend Hexagon hardware loop generation to handle various additional cases:
- variety of compare instructions,
- loops with no preheader,
- arbitrary lower and upper bounds.

llvm-svn: 174904
2013-02-11 21:37:55 +00:00
Michael Ilseman
b3761fb25a Remove trailing whitespace
llvm-svn: 174903
2013-02-11 21:36:49 +00:00
Krzysztof Parzyszek
b814fd5e20 Implement HexagonInstrInfo::analyzeCompare.
llvm-svn: 174901
2013-02-11 20:04:29 +00:00
Kay Tiong Khoo
09400e6c4a *fixed disassembly of some i386 system insts with intel syntax
*added file for test cases for i386 intel syntax

llvm-svn: 174900
2013-02-11 19:46:36 +00:00
Justin Holewinski
f41b45202c [NVPTX] Remove NoCapture from address space conversion intrinsics. NoCapture is not valid in this case, and was causing incorrect optimizations.
llvm-svn: 174896
2013-02-11 18:56:35 +00:00
Hal Finkel
2e8c1799a0 BBVectorize: Eliminate one more restricted linear search
This eliminates one more linear search over a range of
std::multimap entries. This gives a 22% speedup on the
csa.ll test case from PR15222.

No functionality change intended.

llvm-svn: 174893
2013-02-11 17:19:34 +00:00
Tim Northover
763e9e99e3 AArch64: generate dwarfdump test rather than include .o in subversion
llvm-svn: 174891
2013-02-11 16:28:12 +00:00
Michel Danzer
14d128a6ef R600/SI: Use V_ADD_F32 instead of V_MOV_B32 for clamp/neg/abs modifiers.
The modifiers don't seem to have any effect with V_MOV_B32, supposedly it's
meant to just move bits untouched.

Fixes 46 piglit tests with radeonsi, though unfortunately 11 of those had
just regressed because they started using the clamp modifier.

NOTE: This is a candidate for the Mesa stable branch.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 174890
2013-02-11 15:58:21 +00:00
Kostya Serebryany
c24d624c92 [asan] added a flag -mllvm asan-short-64bit-mapping-offset=1 (0 by default)
This flag makes asan use a small (<2G) offset for 64-bit asan shadow mapping.
On x86_64 this saves us a register, thus achieving ~2/3 of the
zero-base-offset's benefits in both performance and code size.

Thanks Jakub Jelinek for the idea.

llvm-svn: 174886
2013-02-11 14:36:01 +00:00
Tim Northover
f2c4616277 AArch64: fix build on some MSVC versions
This does two things:

It removes a call to abs() which may have "long long" parameter on Windows,
which is not necessarily available in C++03.

It also corrects the signedness of Amount, which was relying on
implementation-defined conversions previously.

Code was already tested (albeit in an implemnetation defined way) so no extra
tests.

llvm-svn: 174885
2013-02-11 14:25:52 +00:00
Bill Schmidt
be9ad5cfe1 Restore the resurrected doc link previously deleted
llvm-svn: 174884
2013-02-11 14:14:32 +00:00
Bill Schmidt
8cab270b2e Remove a dead PowerPC doc link
llvm-svn: 174881
2013-02-11 13:16:30 +00:00
Tim Northover
17c416da1f AArch64: Simplify logic in deciding whether bfi is valid
Previous code had a confusing comment which was mostly an implementation
detail. This condition corresponds to "lsb up to register width" and "width not
ridiculous".

llvm-svn: 174877
2013-02-11 12:32:18 +00:00
Tim Northover
e77be415c6 AArch64: Add basic relocation processing for llvm-dwarfdump.
This allows llvm-dwarfdump to handle the relocations needed, at least
for LLVM-produced code.

llvm-svn: 174874
2013-02-11 11:16:02 +00:00
Tim Northover
258a329bb0 AArch64: Undo change to how test was run
This broke on Windows, presumably due to interleaving of output streams.

llvm-svn: 174873
2013-02-11 10:51:41 +00:00
Tim Northover
349160133e Make use of DiagnosticType to provide better AArch64 diagnostics.
This gives a DiagnosticType to all AsmOperands in sight. This replaces all
"invalid operand" diagnostics with something more specific. The messages given
should still be sufficiently vague that they're not usually actively misleading
when LLVM guesses your instruction incorrectly.

llvm-svn: 174871
2013-02-11 09:29:37 +00:00
Cameron Zwarich
9b38749e29 Add support for updating LiveIntervals to MachineBasicBlock::SplitCriticalEdge().
This is currently a bit hairier than it needs to be, since depending on where the
split block resides the end ListEntry of the split block may be the end ListEntry
of the original block or a new entry. Some changes to the SlotIndexes updating
should make it possible to eliminate the two cases here.

This also isn't as optimized as it could be. In the future Liveinterval should
probably get a flag that indicates whether the LiveInterval is within a single
basic block. We could ignore all such intervals when splitting an edge.

llvm-svn: 174870
2013-02-11 09:24:47 +00:00
Cameron Zwarich
9aa358cc0c Update SlotIndexes after updateTerminator() possibly removes instructions. I am
really trying to avoid piping SlotIndexes through to RemoveBranch() and friends.

llvm-svn: 174869
2013-02-11 09:24:45 +00:00
Cameron Zwarich
a494e12ad8 Fix some problems with the updating of SlotIndexes after adding a new MBB. In
particular, holes were being left between two blocks after splitting an edge.

llvm-svn: 174868
2013-02-11 09:24:42 +00:00
Bill Wendling
f45666e4e9 Add support for printing out the attribute groups.
This emits the attribute groups that are used by the functions. (It currently
doesn't print out return type or parameter attributes within attribute groups.)

Note: The functions still retrieve their attributes from the "old" bitcode
format (using the deprecated 'Raw()' method). This means that string attributes
within an attribute group will not show up during a disassembly. This will be
addressed in a future commit.

llvm-svn: 174867
2013-02-11 08:43:33 +00:00
Bill Wendling
d01be8c559 FileCheck-ize the tests.
llvm-svn: 174865
2013-02-11 08:34:57 +00:00
Kostya Serebryany
8e2f1fbfb7 [tsan/msan] adding thread_safety and uninitialized_checks attributes
llvm-svn: 174864
2013-02-11 08:13:54 +00:00
Bob Wilson
3fa3bbfe65 Revert "Rename LLVMContext diagnostic handler types and functions."
This reverts my commit 171047. Now that I've removed my misguided attempt to
support backend warnings, these diagnostics are only about inline assembly.
It would take quite a bit more work to generalize them properly, so I'm
just reverting this.

llvm-svn: 174860
2013-02-11 05:37:07 +00:00
Hal Finkel
d37a002ca6 BBVectorize: Remove the linear searches from pair connection searching
This removes the last of the linear searches over ranges of std::multimap
iterators, giving a 7% speedup on the doduc.bc input from PR15222.

No functionality change intended.

llvm-svn: 174859
2013-02-11 05:29:51 +00:00
Hal Finkel
e006b66033 BBVectorize: Avoid linear searches within the load-move set
This is another cleanup aimed at eliminating linear searches
in ranges of std::multimap.

No functionality change intended.

llvm-svn: 174858
2013-02-11 05:29:49 +00:00
Hal Finkel
6672c24cc9 BBVectorize: isa/cast cleanup in getInstructionTypes
Profiling suggests that getInstructionTypes is performance-sensitive,
this cleans up some double-casting in that function in favor of
using dyn_cast.

No functionality change intended.

llvm-svn: 174857
2013-02-11 05:29:48 +00:00
Hal Finkel
fad3c1ec89 BBVectorize: Make the bookkeeping to support full cycle checking less expensive
By itself, this does not have much of an effect, but only because in the default
configuration the full cycle checks are used only for small problem sizes.
This is part of a general cleanup of uses of iteration over std::multimap
ranges only for the purpose of checking membership.

No functionality change intended.

llvm-svn: 174856
2013-02-11 05:29:41 +00:00
Evan Cheng
d6beb40882 Currently, codegen may spent some time in SDISel passes even if an entire
function is successfully handled by fast-isel. That's because function
arguments are *always* handled by SDISel. Introduce FastLowerArguments to
allow each target to provide hook to handle formal argument lowering.

As a proof-of-concept, add ARMFastIsel::FastLowerArguments to handle
functions with 4 or fewer scalar integer (i8, i16, or i32) arguments. It
completely eliminates the need for SDISel for trivial functions.

rdar://13163905

llvm-svn: 174855
2013-02-11 01:27:15 +00:00
Evan Cheng
45462196b9 Remove unnecessary code.
llvm-svn: 174854
2013-02-11 01:18:26 +00:00
David Blaikie
9ca06623be Fix unnecessary removal of const through cast machinery
I have some uncommitted changes to the cast code that catch this sort of thing
at compile-time but I still need to do some other cleanup before I can enable
it.

llvm-svn: 174853
2013-02-11 01:16:51 +00:00
Joel Jones
d3ff41937c Spelling correction
llvm-svn: 174852
2013-02-10 23:56:30 +00:00
Cameron Zwarich
99633d18d6 Fix the unused but nearly correct method SlotIndexes::insertMBBInMaps() and add
support for updating SlotIndexes to MachineBasicBlock::SplitCriticalEdge(). This
calls renumberIndexes() every time; it should be improved to only renumber
locally.

llvm-svn: 174851
2013-02-10 23:29:54 +00:00
Cameron Zwarich
32038e56b8 Abstract the liveness checking in PHIElimination::SplitPHIEdges() to support
both LiveVariables and LiveIntervals.

llvm-svn: 174850
2013-02-10 23:29:49 +00:00
Bill Wendling
84776838c6 Add support in the bitcode reader to read the attribute groups.
This reads the attribute groups. It currently doesn't do anything with them.

NOTE: In the commit to the bitcode writer, the format *may* change in the near
future. Which means that this code would also change.

llvm-svn: 174849
2013-02-10 23:24:25 +00:00