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194394 Commits

Author SHA1 Message Date
Nikita Popov
b87bc671ab [IVDescriptors] Remove IRBuilder.h include; NFC
IVDescriptors.h itself does not reference IRBuilder at all.
Move the include into transformation passes that do.
2020-04-04 12:07:57 +02:00
Nikita Popov
34ec684e36 [IVDescriptors] Remove unnecessary DemandedBits.h include; NFC
Forward declare DemandedBits in IVDescriptors, and move include
into the cpp file. Also drop the include from LoopUtils, which
does not need it at all.
2020-04-04 12:07:57 +02:00
Matt Arsenault
e41d374974 AMDGPU: Fix a few more tests with old denormal subtarget features 2020-04-03 23:42:13 -04:00
Mehdi Amini
27adb21285 Add mention of advantages of arc in the Phabricator doc.
Differential Revision: https://reviews.llvm.org/D76952
2020-04-04 03:22:29 +00:00
Nemanja Ivanovic
5c1da92dff [NFC][PowerPC] Pre-commit a test case for D77448
Pre-committing the new test case so the review shows only the diffs.
2020-04-03 20:43:04 -05:00
Eli Friedman
7ed9262dbb [llvm-stress][opaque pointers] Remove use of deprecated constructor
(See also D76269.)
2020-04-03 18:00:33 -07:00
LLVM GN Syncbot
544e601c6b [gn build] Port 1d42c0db9a2 2020-04-04 00:07:07 +00:00
Craig Topper
e39e44f2a9 Revert "[X86] Add a Pass that builds a Condensed CFG for Load Value Injection (LVI) Gadgets"
This reverts commit c74dd640fd740c6928f66a39c7c15a014af3f66f.

Reverting to address coding standard issues raised in post-commit
review.
2020-04-03 16:56:08 -07:00
Craig Topper
d67dcc4798 Revert "[X86] Add Support for Load Hardening to Mitigate Load Value Injection (LVI)"
This reverts commit 62c42e29ba43c9d79cd5bd2084b641fbff6a96d5

Reverting to address coding standard issues raised in post-commit
review.
2020-04-03 16:55:53 -07:00
Sanjay Patel
2e2fc47f38 [InstCombine] add tests for freelyNegateValue with 'not'; NFC 2020-04-03 17:28:29 -04:00
Nico Weber
4b48a417a9 Fix standalone clang builds after fb80b6b2d58.
When clang is built against a prebuilt LLVM, LLVM_SOURCE_DIR is
empty, which due to a cmake quirk caused list lengths to get out
of sync. Add a workaround.
2020-04-03 17:15:09 -04:00
Nick Desaulniers
2c9dae12e1 [test] preformat test with update_llc_test_checks.py NFC
Summary:
Prior to landing D76961, preprocess via:
    $ llvm/utils/update_llc_test_checks.py \
      llvm/test/CodeGen/X86/callbr-asm-outputs.ll

Reviewers: void, MaskRay

Reviewed By: void, MaskRay

Subscribers: MaskRay, llvm-commits, srhines

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77356
2020-04-03 14:07:21 -07:00
Scott Constable
40fb959a78 [X86] Add Support for Load Hardening to Mitigate Load Value Injection (LVI)
After finding all such gadgets in a given function, the pass minimally inserts
LFENCE instructions in such a manner that the following property is satisfied:
for all SOURCE+SINK pairs, all paths in the CFG from SOURCE to SINK contain at
least one LFENCE instruction. The algorithm that implements this minimal
insertion is influenced by an academic paper that minimally inserts memory
fences for high-performance concurrent programs:

http://www.cs.ucr.edu/~lesani/companion/oopsla15/OOPSLA15.pdf

The algorithm implemented in this pass is as follows:

1. Build a condensed CFG (i.e., a GadgetGraph) consisting only of the following components:
  -SOURCE instructions (also includes function arguments)
  -SINK instructions
  -Basic block entry points
  -Basic block terminators
  -LFENCE instructions
2. Analyze the GadgetGraph to determine which SOURCE+SINK pairs (i.e., gadgets) are already mitigated by existing LFENCEs. If all gadgets have been mitigated, go to step 6.
3. Use a heuristic or plugin to approximate minimal LFENCE insertion.
4. Insert one LFENCE along each CFG edge that was cut in step 3.
5. Go to step 2.
6. If any LFENCEs were inserted, return true from runOnFunction() to tell LLVM that the function was modified.

By default, the heuristic used in Step 3 is a greedy heuristic that avoids
inserting LFENCEs into loops unless absolutely necessary. There is also a
CLI option to load a plugin that can provide even better optimization,
inserting fewer fences, while still mitigating all of the LVI gadgets.
The plugin can be found here: https://github.com/intel/lvi-llvm-optimization-plugin,
and a description of the pass's behavior with the plugin can be found here:
https://software.intel.com/security-software-guidance/insights/optimized-mitigation-approach-load-value-injection.

Differential Revision: https://reviews.llvm.org/D75937
2020-04-03 13:45:50 -07:00
LLVM GN Syncbot
8b6e307b13 [gn build] Port c74dd640fd7 2020-04-03 20:07:19 +00:00
Julian Lettner
4ee9cd0894 [lit] Cleanly exit on user keyboard interrupt
Graceful lit shutdown on user keyboard interrupt [Ctrl+C] was a
longstanding goal of mine.  After a few refactorings this revision
finally enables it.  We use the following strategy to deal with
KeyboardInterrupt:
https://noswap.com/blog/python-multiprocessing-keyboardinterrupt

Printing of a helpful summary for interrupted runs (just as the one for
completed runs) will be tackled in future revisions.

Reviewed By: serge-sans-paille, rnk

Differential Revision: https://reviews.llvm.org/D77365
2020-04-03 13:03:44 -07:00
Scott Constable
4303527cf0 [X86] Add a Pass that builds a Condensed CFG for Load Value Injection (LVI) Gadgets
Adds a new data structure, ImmutableGraph, and uses RDF to find LVI gadgets and add them to a MachineGadgetGraph.

More specifically, a new X86 machine pass finds Load Value Injection (LVI) gadgets consisting of a load from memory (i.e., SOURCE), and any operation that may transmit the value loaded from memory over a covert channel, or use the value loaded from memory to determine a branch/call target (i.e., SINK).

Also adds a new target feature to X86: +lvi-load-hardening

The feature can be added via the clang CLI using -mlvi-hardening.

Differential Revision: https://reviews.llvm.org/D75936
2020-04-03 13:02:04 -07:00
LLVM GN Syncbot
b81cbc287f [gn build] Port f95a67d8b8a 2020-04-03 19:47:51 +00:00
Andrew Ng
e79cb065c8 Don't use relpaths in lit cfg if build/source dir are on different drives.
See discussion on https://reviews.llvm.org/D77184.
2020-04-03 15:43:50 -04:00
Paul Robinson
8c03abb401 Test had incorrect check for nonzero count 2020-04-03 12:37:13 -07:00
Lang Hames
fe14ec0a0c [ORC] Improve documention of memory ownership in the new Orc C bindings. 2020-04-03 12:33:02 -07:00
Alina Sbirlea
24bd9b3b24 [GraphDiff] Extend GraphDiff to track a list of updates.
Summary:
This patch includes two extensions:
1. It extends the GraphDiff to also keep the original list of updates
after legalization, not just the deletes/insert vectors.
It also provides an API to pop the first update (the updates are store
in reverse, such that the first update is at the end of the list)
2. It adds a bool to mark whether the given updates should be applied as
given, or applied in reverse. This moves the task of reversing the
updates (when the caller needs this) to a functionality inside
GraphDiff, versus having the caller do this.

The two changes could be split into two patches, but they seemed
reasonably small to be reviewed together.

Reviewers: kuhar, dblaikie

Subscribers: hiraditya, george.burgess.iv, mgrang, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77167
2020-04-03 12:10:36 -07:00
Scott Constable
89f19db618 [X86] Add RET-hardening Support to mitigate Load Value Injection (LVI)
Adding a pass that replaces every ret instruction with the sequence:

pop <scratch-reg>
lfence
jmp *<scratch-reg>

where <scratch-reg> is some available scratch register, according to the
calling convention of the function being mitigated.

Differential Revision: https://reviews.llvm.org/D75935
2020-04-03 12:08:34 -07:00
Matt Arsenault
2c672c9e7d Support: Add specializations for reverseBits to use builtin 2020-04-03 14:52:54 -04:00
Matt Arsenault
d5df445655 CodeGen: Convert some TII hooks to use Register 2020-04-03 14:52:54 -04:00
Matt Arsenault
4eb760ce6c AMDGPU: Use Register in more places 2020-04-03 14:52:54 -04:00
Matt Arsenault
3fbbb59e29 AMDGPU: Remove redundant virtual 2020-04-03 14:52:53 -04:00
Stanislav Mekhanoshin
7179790282 [AMDGPU] Added label to test. NFC. 2020-04-03 11:36:32 -07:00
Christopher Tetreault
6fdad00e46 Clean up usages of asserting vector getters in Type
Summary:
Remove usages of asserting vector getters in Type in preparation for the
VectorType refactor. The existence of these functions complicates the
refactor while adding little value.

Reviewers: kparzysz, sdesmalen, efriedma

Reviewed By: kparzysz

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77267
2020-04-03 11:26:51 -07:00
Stephen Neuendorffer
0820ad9f38 [CMAKE] Plumb include_directories() into tablegen()
Previously, the tablegen() cmake command, which defines custom
commands for running tablegen, included several hardcoded paths.  This
becomes unwieldy as there are more users for which these paths are
insufficient.  For most targets, cmake uses include_directories() and
the INCLUDE_DIRECTORIES directory property to specify include paths.
This change picks up the INCLUDE_DIRECTORIES property and adds it
to the include path used when running tablegen.  As a side effect, this
allows us to remove several hard coded paths to tablegen that are redundant
with specified include_directories().

I haven't removed the hardcoded path to CMAKE_CURRENT_SOURCE_DIR, which
seems generically useful.  There are several users in clang which apparently
don't have the current directory as an include_directories().  This could
be considered separately.

The new version of this path uses list APPEND rather than list TRANSFORM,
in order to be compatible with cmake 3.4.3. If we update to cmake 3.12 then
we can use list TRANSFORM instead.

Differential Revision: https://reviews.llvm.org/D77156
2020-04-03 11:23:38 -07:00
Stanislav Mekhanoshin
ed36d749eb [AMDGPU] Propagate AGPR RC from PHI to its PHI operands
We can fix register class of PHI based on its all AGPR uses.
That leaves behind all PHIs which were already processed
earlier. Propagate RC back to PHI operands of a PHI.

Differential Revision: https://reviews.llvm.org/D77344
2020-04-03 11:23:02 -07:00
Simon Pilgrim
658fa76c7a [YAMLParser] Scanner::setError - ensure we use the StringRef::iterator argument (PR45043)
As detailed on PR45043, static analysis was warning that the StringRef::iterator Position argument was being ignored and the function was hardwired to use the Current iterator.

This patch ensures we use the provided iterator and removes the (barely necessary) setError wrapper that always used Current.

Differential Revision: https://reviews.llvm.org/D76512
2020-04-03 18:55:38 +01:00
Sanjay Patel
24269f9eb6 [VectorCombine] try to form a better extractelement
Extracting to the same index that we are going to insert back into
allows forming select ("blend") shuffles and enables further transforms.

Admittedly, this is a quick-fix for a more general problem that I'm
hoping to solve by adding transforms for patterns that start with an
insertelement.

But this might resolve some regressions known to be caused by the
extract-extract transform (although I have not gotten more details on
those yet).

In the motivating case from PR34724:
https://bugs.llvm.org/show_bug.cgi?id=34724

The combination of subsequent instcombine and codegen transforms gets us this improvement:

  vmovshdup	%xmm0, %xmm2    ## xmm2 = xmm0[1,1,3,3]
  vhaddps	%xmm1, %xmm1, %xmm4
  vmovshdup	%xmm1, %xmm3    ## xmm3 = xmm1[1,1,3,3]
  vaddps	%xmm0, %xmm2, %xmm0
  vaddps	%xmm1, %xmm3, %xmm1
  vshufps	$200, %xmm4, %xmm0, %xmm0 ## xmm0 = xmm0[0,2],xmm4[0,3]
  vinsertps	$177, %xmm1, %xmm0, %xmm0 ## xmm0 = zero,xmm0[1,2],xmm1[2]

  -->

  vmovshdup	%xmm0, %xmm2    ## xmm2 = xmm0[1,1,3,3]
  vhaddps	%xmm1, %xmm1, %xmm1
  vaddps	%xmm0, %xmm2, %xmm0
  vshufps	$200, %xmm1, %xmm0, %xmm0 ## xmm0 = xmm0[0,2],xmm1[0,3]

Differential Revision: https://reviews.llvm.org/D76623
2020-04-03 13:55:13 -04:00
Sylvain Audi
4e03034619 [Support/Path] sys::path::replace_path_prefix fix and simplifications
Added unit tests for 2 scenarios that were failing.
Made replace_path_prefix back to 3 parameters instead of 5, simplifying the implementation. The other 2 were always used with the default value.

This commit is intended to be the first of 3:
1) simplify/fix replace_path_prefix.
2) use it in the context of -fdebug-prefix-map and -fmacro-prefix-map (see D76869).
3) Make Windows version of replace_path_prefix insensitive to both case and separators (slash vs backslash).

Differential Revision: https://reviews.llvm.org/D77223
2020-04-03 13:50:23 -04:00
Stephen Neuendorffer
7f5ee4136e Revert "[CMAKE] Plumb include_directories() into tablegen()"
This reverts commit ae044c5b0caa095602b6ef4cca40d57efc26a8f6.

This breaks the buildbots, which use an older version of cmake.
2020-04-03 10:47:36 -07:00
Stephen Neuendorffer
d8ac72d584 [CMAKE] Plumb include_directories() into tablegen()
Previously, the tablegen() cmake command, which defines custom
commands for running tablegen, included several hardcoded paths.  This
becomes unwieldy as there are more users for which these paths are
insufficient.  For most targets, cmake uses include_directories() and
the INCLUDE_DIRECTORIES directory property to specify include paths.
This change picks up the INCLUDE_DIRECTORIES property and adds it
to the include path used when running tablegen.  As a side effect, this
allows us to remove several hard coded paths to tablegen that are redundant
with specified include_directories().

I haven't removed the hardcoded path to CMAKE_CURRENT_SOURCE_DIR, which
seems generically useful.  There are several users in clang which apparently
don't have the current directory as an include_directories().  This could
be considered separately.

Differential Revision: https://reviews.llvm.org/D77156
2020-04-03 10:38:25 -07:00
Simon Pilgrim
4b79bb7de1 [X86][SSE] lowerShuffleWithPACK - extend to use chained PACKs for larger truncations
Extend lowerShuffleWithPACK/matchShuffleWithPACK/createPackShuffleMask to handle compaction style shuffle masks that can be lowered to chains of PACKSS/PACKUS if their inputs are suitably sign/zero extended.

This helps avoid PSHUFB (and its mask load) for short shuffle chains, shuffle combining will still replace with a PSHUFB if we have enough shuffles as getFauxShuffleMask should recognise the PACKSS/PACKUS chains.
2020-04-03 18:26:10 +01:00
Roman Lebedev
bcf124828a Revert "[SCEV] rewriteLoopExitValues(): even if have hard uses, still rewrite if cheap (PR44668)"
As discussed in post-commit review in https://reviews.llvm.org/D73501
if the goal of this is to help vectorizer, then we should actually
be teaching vectorizer to do this, because right now this rewrite
is still budget-limited, which isn't what we'd want.

Additionally, while the rest of the patch series was universally profitable,
this particular patch is reportedly (https://reviews.llvm.org/D73501#1905171)
exposing cost-modeling issues on ARM.

So let's just back this particular patch out. Once there's an undo transform,
this could be considered for reintegration.

This reverts commit 44edc6fd2c63b7db43e13cc8caf1fee79bebdb5f.
2020-04-03 20:15:04 +03:00
Roman Lebedev
c4ef8430c1 [NFC] Move ARM opt -indvars test from Codegen into Transforms
They are really not codegen tests.
2020-04-03 20:15:03 +03:00
Simon Pilgrim
2bdf4c0f9c [LoopStrengthReduce] Fix test checks to fix issue reported on D77227 2020-04-03 18:10:33 +01:00
Simon Pilgrim
ee2252c346 [AArch64] Fix swap-compare-operands test names to fix issue reported on D77354
Load of copy+paste errors in the label checks that needed fixing before the missing ":" could be added
2020-04-03 17:48:18 +01:00
Sanjay Patel
9697d8bfdc [PhaseOrdering] add shuffle tests based on D40633; NFC
We got some of the potential optimizations with D76727 and D76844.
There are 2 likely enhancements that we could add to -vector-combine
to get most of the remaining cases:
1. Allow bitcasted shuffle mask narrowing (widen the elements).
2. Combine shuffle-of-shuffle into a single shuffle.

This is already partly handled by the x86 backend, but the
tests here show that we still miss some of the potential
combines.
2020-04-03 12:44:49 -04:00
John Brawn
715275dfe2 [ARM] Fix incorrect handling of big-endian vmov.i64
Currently when the target is big-endian vmov.i64 reverses the order of the two
words of the vector. This is correct only when the underlying element type is
32-bit, as actually what it should be doing is considering it a vector of the
underlying type and reversing the elements of that.

Differential Revision: https://reviews.llvm.org/D76515
2020-04-03 17:36:50 +01:00
John Brawn
2f899bd67b [ARM] Avoid pointless vrev of element-wise vmov
If we have an element-wise vmov immediate instruction then a subsequent vrev
with width greater or equal to the vmov element width, then that vrev won't do
anything. Add a DAG combine to convert bitcasts that would become such vrevs
into vector_reg_casts instead.

Differential Revision: https://reviews.llvm.org/D76514
2020-04-03 17:36:50 +01:00
John Brawn
dadb4604ce Run update_llc_test on test/CodeGen/ARM/vmov.ll
This is in preparation for D76514
2020-04-03 17:36:50 +01:00
Simon Pilgrim
4cba550cd6 [InstSimplify] Regenerate compares tests to fix issue reported on D77354 2020-04-03 17:34:56 +01:00
Simon Pilgrim
50016fe640 [LoopRotate] Cleanup test checks to fix issue reported on D77354 2020-04-03 17:21:37 +01:00
Simon Pilgrim
00c011274f [PowerPC] Regenerate f128 test to fix issue reported on D77354
I had to manually edit the file as the update script won't strip checks that don't have the ":" immediately after the prefix
2020-04-03 17:01:28 +01:00
Matt Arsenault
23312f75b3 InstCombine: Reduce minnum/maxnum if inputs are casted 2020-04-03 11:57:25 -04:00
Simon Pilgrim
dd83182426 [X86] Remove defunct section checks from emulated TLS tests to fix issue reported on D77354 2020-04-03 16:46:09 +01:00
Simon Pilgrim
1bb44c3118 [X86] Fix weak global label issue reported on D77354 2020-04-03 16:15:24 +01:00