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Commit Graph

157 Commits

Author SHA1 Message Date
Evan Cheng
9a5c2f1169 If an interval is being undone clear its preference as well since the source interval may have been undone as well.
llvm-svn: 43670
2007-11-04 08:32:21 +00:00
Evan Cheng
1771f6da9c There are times when the coalescer would not coalesce away a copy but the copy
can be eliminated by the allocator is the destination and source targets the
same register. The most common case is when the source and destination registers
are in different class. For example, on x86 mov32to32_ targets GR32_ which
contains a subset of the registers in GR32.

The allocator can do 2 things:
1. Set the preferred allocation for the destination of a copy to that of its source.
2. After allocation is done, change the allocation of a copy destination (if
   legal) so the copy can be eliminated.

This eliminates 443 extra moves from 403.gcc.

llvm-svn: 43662
2007-11-03 07:20:12 +00:00
Evan Cheng
4bba09dc4e Apply Chris' suggestions.
llvm-svn: 43069
2007-10-17 06:53:44 +00:00
Evan Cheng
d292b1c096 Clean up code that calculate MBB live-in's.
llvm-svn: 43061
2007-10-17 02:12:22 +00:00
Evan Cheng
97ada80b22 Some clean up.
llvm-svn: 43043
2007-10-16 21:09:14 +00:00
Evan Cheng
8af3000e93 Some clean up.
llvm-svn: 42898
2007-10-12 08:45:27 +00:00
David Greene
2ca4b270db Pluggable coalescers inplementation.
llvm-svn: 41743
2007-09-06 16:18:45 +00:00
Evan Cheng
215f802b75 Re-implement trivial rematerialization. This allows def MIs whose live intervals that are coalesced to be rematerialized.
llvm-svn: 41060
2007-08-13 23:45:17 +00:00
David Greene
6b14050d1e Factor live variable analysis so it does not do register coalescing
simultaneously.  Move that pass to SimpleRegisterCoalescing.

This makes it easier to implement alternative register allocation and
coalescing strategies while maintaining reuse of the existing live
interval analysis.

llvm-svn: 37520
2007-06-08 17:18:56 +00:00
Bill Wendling
a5f8cb0805 Change names from RA to something unique to get rid of naming conflicts with
certain linkers...

llvm-svn: 36944
2007-05-08 19:02:46 +00:00
Devang Patel
cd45427a87 Drop 'const'
llvm-svn: 36662
2007-05-03 01:11:54 +00:00
Devang Patel
8ee9065162 Use 'static const char' instead of 'static const int'.
Due to darwin gcc bug, one version of darwin linker coalesces
static const int, which defauts PassID based pass identification.

llvm-svn: 36652
2007-05-02 21:39:20 +00:00
Devang Patel
38a66bc82e Do not use typeinfo to identify pass in pass manager.
llvm-svn: 36632
2007-05-01 21:15:47 +00:00
Evan Cheng
7f44e880dc Match MachineFunction::UsedPhysRegs changes.
llvm-svn: 36452
2007-04-25 22:13:27 +00:00
Evan Cheng
4f48ec6738 Clean up.
llvm-svn: 36431
2007-04-25 07:18:20 +00:00
Evan Cheng
48352d7a71 Copy coalescing change to prevent a physical register from being pin to a
long live interval that has low usage density.
1. Change order of coalescing to join physical registers with virtual
   registers first before virtual register intervals become too long.
2. Check size and usage density to determine if it's worthwhile to join.
3. If joining is aborted, assign virtual register live interval allocation
   preference field to the physical register.
4. Register allocator should try to allocate to the preferred register
   first (if available) to create identify moves that can be eliminated.

llvm-svn: 36218
2007-04-17 20:32:26 +00:00
Evan Cheng
0176b9859d First cut trivial re-materialization support.
llvm-svn: 35208
2007-03-20 08:13:50 +00:00
Evan Cheng
9968353d64 Only add liveinterval to livein set if it isn't assigned a stack slot.
llvm-svn: 34593
2007-02-25 09:39:02 +00:00
Evan Cheng
e4ab9c032b Re-apply my liveintervalanalysis changes. Now with PR1207 fixes.
llvm-svn: 34428
2007-02-19 21:49:54 +00:00
Reid Spencer
b27fcf3482 For PR1207:
Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.

llvm-svn: 34399
2007-02-19 03:20:00 +00:00
Evan Cheng
259a05c582 Do not add livein's to entry MBB twice.
llvm-svn: 34382
2007-02-17 11:11:27 +00:00
Evan Cheng
64185104f1 Add live-ins to every BB.
llvm-svn: 34342
2007-02-16 09:05:02 +00:00
Chris Lattner
a975b95adb Eliminate static ctors from Statistics
llvm-svn: 32698
2006-12-19 22:41:21 +00:00
Chris Lattner
a531ce882e Detemplatize the Statistic class. The only type it is instantiated with
is 'unsigned'.

llvm-svn: 32279
2006-12-06 17:46:33 +00:00
Chris Lattner
a7baddddcc eliminate fp statistic
llvm-svn: 32251
2006-12-06 01:48:55 +00:00
Jeff Cohen
f99052befb Unbreak VC++ build.
llvm-svn: 32113
2006-12-02 02:22:01 +00:00
Bill Wendling
0ae0a45ebe Replace std::cerr uses of the "DEBUG" macro with "DOUT" instead. Removes
a #include of iostream.

llvm-svn: 31800
2006-11-17 00:50:36 +00:00
Jim Laskey
28fec74f1b Remove redundant <cmath>.
llvm-svn: 31561
2006-11-08 19:16:44 +00:00
Jim Laskey
4b1aff4aec Use correct value for float HUGH_VAL.
llvm-svn: 31500
2006-11-07 12:25:45 +00:00
Jim Laskey
47b2dcf17f LinearScanner hotspot.
llvm-svn: 31153
2006-10-24 14:35:25 +00:00
Chris Lattner
33bd5dcfb7 s|llvm/Support/Visibility.h|llvm/Support/Compiler.h|
llvm-svn: 29911
2006-08-27 12:54:02 +00:00
Jim Laskey
6d121090d3 Final polish on machine pass registries.
llvm-svn: 29471
2006-08-02 12:30:23 +00:00
Jim Laskey
b92b14f422 Introducing plugable register allocators and instruction schedulers.
llvm-svn: 29434
2006-08-01 14:21:23 +00:00
Andrew Lenharth
c1074954fb Reduce number of exported symbols
llvm-svn: 29220
2006-07-20 17:28:38 +00:00
Chris Lattner
de706b3e3e Shave another 27K off libllvmgcc.dylib with visibility hidden
llvm-svn: 28973
2006-06-28 22:17:39 +00:00
Evan Cheng
772647518f If the register allocator cannot find a register to spill, try the aliases. If
that still fails (because all the register spill weights are inf), just grab
one.

llvm-svn: 28262
2006-05-12 19:07:46 +00:00
Evan Cheng
da04c3aab4 Backing out previous check-in.
llvm-svn: 28219
2006-05-11 07:28:16 +00:00
Evan Cheng
03fa9eb65e If the live interval legnth is essentially zero, i.e. in every live range
the use follows def immediately, it doesn't make sense to spill it and
hope it will be easier to allocate for this LI.

llvm-svn: 28217
2006-05-10 22:30:41 +00:00
Chris Lattner
8b6f0daaae Add some comments.
llvm-svn: 27133
2006-03-25 23:00:56 +00:00
Chris Lattner
b74e255d8b Code cleanups, no functionality change
llvm-svn: 26328
2006-02-23 06:44:17 +00:00
Chris Lattner
aafc339b4e Add explicit #includes of <iostream>
llvm-svn: 25515
2006-01-22 23:41:00 +00:00
Duraid Madina
f8a342aa4f HB is *the* code janitor.
llvm-svn: 25031
2005-12-28 04:55:42 +00:00
Duraid Madina
04be8e167c I think I know what you meant here, but just to be safe I'll let you
do it. :)

    <_sabre_> excuses excuses

llvm-svn: 24471
2005-11-21 14:09:40 +00:00
Chris Lattner
f78eca1416 Add section switching to common code generator code. Add a couple of
asserts.

llvm-svn: 24445
2005-11-21 07:06:27 +00:00
Chris Lattner
288e5b0a7d Expose the LiveInterval interfaces as public headers.
llvm-svn: 23400
2005-09-21 04:19:09 +00:00
Chris Lattner
36461b2e37 When checking the fixed intervals, don't forget to check for register aliases.
This fixes PR621 and Regression/CodeGen/X86/2005-08-30-RegAllocAliasProblem.ll

llvm-svn: 23158
2005-08-30 21:03:36 +00:00
Chris Lattner
610eeca969 Keep track of which registers are related to which other registers.
Use this information to avoid doing expensive interval intersections for
registers that could not possible be interesting.  This speeds up linscan
on ia64 compiling kc++ in release mode from taking 7.82s to 4.8s(!), total
itanium llc time on this program is 27.3s now.  This marginally speeds up
PPC and X86, but they appear to be limited by other parts of linscan, not
this code.

On this program, on itanium, live intervals now takes 41% of llc time.

llvm-svn: 22986
2005-08-23 22:27:31 +00:00
Chris Lattner
2c5f36d938 Try to avoid scanning the fixed list. On architectures with a non-stupid
number of regs (e.g. most riscs), many functions won't need to use callee
clobbered registers.  Do a speculative check to see if we can get a free
register without processing the fixed list (which has all of these).  This
saves a lot of time on machines with lots of callee clobbered regs (e.g.
ppc and itanium, also x86).

This reduces ppc llc compile time from 184s -> 172s on kc++.  This is probably
worth FAR FAR more on itanium though.

llvm-svn: 22972
2005-08-22 20:59:30 +00:00
Chris Lattner
9b0058b424 Move some code in the register assignment case that only needs to happen if
we spill out of the fast path.  The scan of active_ and the calls to
updateSpillWeights don't need to happen unless a spill occurs.  This reduces
debug llc time of kc++ with ppc from 187.3s to 183.2s.

llvm-svn: 22971
2005-08-22 20:20:42 +00:00
Chris Lattner
a9710ba54f Speed up this loop a bit, based on some observations that Nate made, and
add some comments.  This loop really needs to be reevaluated!

llvm-svn: 22966
2005-08-22 16:55:22 +00:00