Matt Arsenault
28876d6a15
AMDGPU/GlobalISel: Select DS GWS intrinsics
2020-01-16 11:25:10 -05:00
Stanislav Mekhanoshin
d7b7080ce3
[AMDGPU] Fix bundle scheduling
...
Bundles coming to scheduler considered free, i.e. zero latency.
Fixed.
Differential Revision: https://reviews.llvm.org/D72487
2020-01-09 15:56:36 -08:00
Yevgeny Rouban
7fbbd670e7
[IR] Fix mayReadFromMemory() for writeonly calls
...
Current implementation of Instruction::mayReadFromMemory()
returns !doesNotAccessMemory() which is !ReadNone. This
does not take into account that the writeonly attribute
also indicates that the call does not read from memory.
The patch changes the predicate to !doesNotReadMemory()
that reflects the intended behavior.
Differential Revision: https://reviews.llvm.org/D69086
llvm-svn: 375389
2019-10-21 06:52:08 +00:00
Matt Arsenault
55161e45ee
AMDGPU: Remove v0 workaround for DS_GWS_* instructions
...
Any register should work for the src field since r366067, since the
used value is not pulled from the expected encoding field.
llvm-svn: 367598
2019-08-01 18:41:32 +00:00
Matt Arsenault
2724c8cef5
AMDGPU: Don't rely on m0 being -1 for GWS offsets
...
This only works if the high bits of m0 are also 0, so m0 would have to
be set to 0xffff.
llvm-svn: 366608
2019-07-19 20:01:24 +00:00
Matt Arsenault
b81a355be5
AMDGPU: Force s_waitcnt after GWS instructions
...
This is apparently required to be the immediately following
instruction, so force it into a bundle with a waitcnt.
llvm-svn: 366607
2019-07-19 19:47:30 +00:00
Matt Arsenault
d44a022d4e
AMDGPU: Insert mem_viol check loop around GWS pre-GFX9
...
It is necessary to emit this loop around GWS operations in case the
wave is preempted pre-GFX9.
llvm-svn: 363979
2019-06-20 20:54:32 +00:00
Matt Arsenault
00b493eb4d
Reapply "AMDGPU: Add ds_gws_init / ds_gws_barrier intrinsics"
...
This reapplies r363678, using the correct chain for the CopyToReg for
v0. glueCopyToM0 counterintuitively changes the operands of the
original node.
llvm-svn: 363870
2019-06-19 19:55:27 +00:00
Simon Pilgrim
718e2eb597
Revert rL363678 : AMDGPU: Add ds_gws_init / ds_gws_barrier intrinsics
...
There may or may not be additional work to handle this correctly on
SI/CI.
........
Breaks EXPENSIVE_CHECKS buildbots - http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/78/
llvm-svn: 363797
2019-06-19 13:00:54 +00:00
Matt Arsenault
c29ccd12f7
AMDGPU: Add ds_gws_init / ds_gws_barrier intrinsics
...
There may or may not be additional work to handle this correctly on
SI/CI.
llvm-svn: 363678
2019-06-18 13:19:57 +00:00
