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65508 Commits

Author SHA1 Message Date
Juergen Ributzka
8e480fdae5 [DAG] Refactor vector splitting code in SelectionDAG. No functional change intended.
Reviewed by Tom

llvm-svn: 195156
2013-11-19 21:20:17 +00:00
Rafael Espindola
4833910f66 Make it explicit that nulls are not allowed in names.
The object files we support use null terminated strings, so there is no way to
support these.

This patch adds an assert to catch bad API use and an error check in the .ll
parser.

llvm-svn: 195155
2013-11-19 21:12:39 +00:00
Yuchen Wu
aba14a2b9e llvm-cov: Moved printing after error checks.
llvm-svn: 195153
2013-11-19 20:57:20 +00:00
Jack Carter
6943b6e5c6 reverts 195057 per request
llvm-svn: 195152
2013-11-19 20:53:28 +00:00
Yuchen Wu
3f48050d3c llvm-cov: Added constness property to methods.
Added constness to methods that shouldn't modify objects. Replaced
operator[] lookup in maps with find() instead.

llvm-svn: 195151
2013-11-19 20:33:32 +00:00
Benjamin Kramer
f5a7aea34b DataLayout: value initialize globals to avoid static construction.
llvm-svn: 195150
2013-11-19 20:28:04 +00:00
Rafael Espindola
5d21406399 Support multiple COFF sections with the same name but different COMDAT.
This is the first step to fix pr17918.

It extends the .section directive a bit, inspired by what the ELF one looks
like. The problem with using linkonce is that given

.section foo
.linkonce....

.section foo
.linkonce

we would already have switched sections when getting to .linkonce. The cleanest
solution seems to be to add the comdat information in the .section itself.

llvm-svn: 195148
2013-11-19 19:52:52 +00:00
Andrew Trick
a5f0869aed Obvious pasto survived a couple rounds of cleanup.
Caught by Aaron Ballman.

llvm-svn: 195138
2013-11-19 18:29:45 +00:00
John Thompson
844100cb0c YAML I/O - Added default trait support for std:string. Making another attempt at this, this time doing a clean build on Linux, and running the LLVM, clang, and extra tests, to try to make sure there's no problems.
llvm-svn: 195134
2013-11-19 17:28:21 +00:00
Cameron McInally
9232b52359 Fix assembly operands for the SSE2 cvtsd2ss instruction.
llvm-svn: 195129
2013-11-19 14:36:00 +00:00
Simon Atanasyan
226923909e [Mips] Adjust float ABI settings in case of MIPS16 mode.
Hard float for mips16 means essentially to compile as soft float but to
use a runtime library for soft float that is written with native mips32
floating point instructions (those runtime routines run in mips32 hard
float mode).

The patch reviewed by Reed Kotler.

llvm-svn: 195123
2013-11-19 12:20:17 +00:00
Eric Christopher
03cbb881d9 Formatting and 80-col.
llvm-svn: 195122
2013-11-19 09:28:34 +00:00
Eric Christopher
8b203da235 Fix comment.
llvm-svn: 195121
2013-11-19 09:11:26 +00:00
Eric Christopher
525b98f23c Refactor the section emission code to remove duplicates now that
we can emit various sections in any order.
No functional change.

llvm-svn: 195120
2013-11-19 09:04:50 +00:00
Eric Christopher
c80c663188 Reformat file.
llvm-svn: 195119
2013-11-19 09:04:36 +00:00
Chandler Carruth
4d8e469cd3 Fix an issue where SROA computed different results based on the relative
order of slices of the alloca which have exactly the same size and other
properties. This was found by a perniciously unstable sort
implementation used to flush out buggy uses of the algorithm.

The fundamental idea is that findCommonType should return the best
common type it can find across all of the slices in the range. There
were two bugs here previously:

1) We would accept an integer type smaller than a byte-width multiple,
   and if there were different bit-width integer types, we would accept
   the first one. This caused an actual failure in the testcase updated
   here when the sort order changed.
2) If we found a bad combination of types or a non-load, non-store use
   before an integer typed load or store we would bail, but if we found
   the integere typed load or store, we would use it. The correct
   behavior is to always use an integer typed operation which covers the
   partition if one exists.

While a clever debugging sort algorithm found problem #1 in our existing
test cases, I have no useful test case ideas for #2. I spotted in by
inspection when looking at this code.

llvm-svn: 195118
2013-11-19 09:03:18 +00:00
Michael Ilseman
0f69f39907 Add support for software expansion of 64-bit integer division instructions.
Patch by Dmitri Shtilman!

llvm-svn: 195116
2013-11-19 06:54:19 +00:00
Andrew Trick
5b8040c957 Fix patchpoint comments.
llvm-svn: 195103
2013-11-19 05:05:43 +00:00
Andrew Trick
9f7d826e8a Use symbolic operands in the patchpoint folding routine and fix a spilling bug.
Fixes <rdar://15487687> [JS] AnyRegCC argument ends up being spilled

llvm-svn: 195094
2013-11-19 03:29:59 +00:00
Andrew Trick
15aac659a7 Add an abstraction to handle patchpoint operands.
Hard-coded operand indices were scattered throughout lowering stages
and layers. It was super bug prone.

llvm-svn: 195093
2013-11-19 03:29:56 +00:00
Hao Liu
b26dfe0306 Implement AArch64 neon instructions class SIMD lsone and SIMD lone-post.
llvm-svn: 195078
2013-11-19 02:17:05 +00:00
Eric Christopher
106d6557a8 Remove unused special member functions and reformat.
llvm-svn: 195077
2013-11-19 02:01:07 +00:00
Eric Christopher
51aecac48c Fix previous commit and fully remove variable.
llvm-svn: 195076
2013-11-19 01:52:38 +00:00
Eric Christopher
0d2c47bfb4 Remove unused variable.
llvm-svn: 195075
2013-11-19 01:50:29 +00:00
Jiangning Liu
42b7a215f4 Implement AArch64 SISD intrinsics for vget_high and vget_low.
llvm-svn: 195074
2013-11-19 01:46:48 +00:00
Kevin Qin
7b74269765 implement MC layer of AArch64 neon instruction PMULL and PMULL2 with 128 bit integer.
llvm-svn: 195072
2013-11-19 01:40:25 +00:00
Jiangning Liu
7c858f236d Add predicate for AArch64 crypto instructions.
llvm-svn: 195071
2013-11-19 01:38:31 +00:00
Jack Carter
8bb31d387d [Mips] Support for MicroMips STO refactoring.
No true functional changes.

Change the "hack" name of emitMipsHackSTOCG to emitSymSTO.

Remove demonstration code in AsmParser for emitMipsHackSTOCG and
emitMipsHackELFFlags. The STO field is in an ELF symbol and is not
an explicit directive. That said, we are missing the compliment call
in AsmParser and that will need to be addressed soon.

XFAIL dummy tests for emitMipsHackELFFlags and emitMipsHackELFFlags.
These will built out with following patches.

llvm-svn: 195067
2013-11-19 01:25:18 +00:00
Juergen Ributzka
5357a6d64b [weak vtables] Remove a bunch of weak vtables
This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file. The memory leaks in this version have been fixed. Thanks
Alexey for pointing them out.

Differential Revision: http://llvm-reviews.chandlerc.com/D2068

Reviewed by Andy

llvm-svn: 195064
2013-11-19 00:57:56 +00:00
David Blaikie
f941cd8a75 DwarfDebug: Move trailing else to the same line as prior closing brace
llvm-svn: 195060
2013-11-18 23:59:04 +00:00
David Blaikie
0fc401fb8f DwarfDebug: Remove some more redundant explicit constructions.
llvm-svn: 195059
2013-11-18 23:57:26 +00:00
Jack Carter
4091753064 [Mips] MipsTargetStreamer refactoring.
No functionality changes.

llvm-svn: 195057
2013-11-18 23:55:27 +00:00
David Blaikie
f1abd8ad9c DebugInfo: Simplify a few more explicit constructions, underconstrained types, and make DIType(MDNode*) explicit like all the other DI* node ctors.
llvm-svn: 195055
2013-11-18 23:33:32 +00:00
Reid Kleckner
552118c34a Revert "COFF: Emit all MCSymbols rather than filtering out some of them"
This reverts commit r190888, to fix PR17967.  The original change wasn't
the right way to get @feat.00 into the object file.  The right fix is to
make @feat.00 be a global symbol.

llvm-svn: 195053
2013-11-18 23:08:12 +00:00
Adrian Prantl
afeac86924 Debug info: Let LowerDbgDeclare perfom the dbg.declare -> dbg.value
lowering only for load/stores to scalar allocas. The resulting values
confuse the backend and don't add anything because we can describe
array-allocas with a dbg.declare intrinsic just fine.

rdar://problem/15464571

llvm-svn: 195052
2013-11-18 23:04:38 +00:00
Paul Robinson
27ef03dc70 The 'optnone' attribute means don't inline anything into this function
(except functions marked always_inline).
Functions with 'optnone' must also have 'noinline' so they don't get
inlined into any other function.

Based on work by Andrea Di Biagio.

llvm-svn: 195046
2013-11-18 21:44:03 +00:00
Matt Arsenault
be108f1643 R600/SI: Fix moveToVALU when the first operand is VSrc.
Moving into a VSrc doesn't always work, since it could be
replaced with an SGPR later.

llvm-svn: 195042
2013-11-18 20:09:55 +00:00
Matt Arsenault
cdea5c8fe0 R600/SI: Fix multiple SGPR reads when using VCC.
No other SGPR operands are allowed, so if VCC is
used, move the other to a VGPR.

llvm-svn: 195041
2013-11-18 20:09:50 +00:00
Matt Arsenault
485f69c9cf R600/SI: Implement add i64, but do not yet enable.
Test doesn't actually check the output. I need
to fix add i64 being matched for the addressing
calculations.

llvm-svn: 195040
2013-11-18 20:09:47 +00:00
Matt Arsenault
2b3d70daa8 R600/SI: Specify SSrc operands
llvm-svn: 195039
2013-11-18 20:09:43 +00:00
Matt Arsenault
1e729e94db R600/SI: addc / adde i32 are legal
llvm-svn: 195038
2013-11-18 20:09:40 +00:00
Matt Arsenault
adcc6666c5 R600/SI: Match addc to S_ADD_U32.
The carry always goes to SCC.

llvm-svn: 195037
2013-11-18 20:09:37 +00:00
Matt Arsenault
3ce3089446 R600/SI: Match adde/sube to S_ADDC_U32/S_SUBB_U32
llvm-svn: 195036
2013-11-18 20:09:34 +00:00
Matt Arsenault
7202effe49 R600/SI: Specify S_ADD/S_SUB set SCC and add is commutable
llvm-svn: 195035
2013-11-18 20:09:32 +00:00
Matt Arsenault
62a8d8b89a R600/SI: Move patterns to match add / sub to scalar instructions
llvm-svn: 195034
2013-11-18 20:09:29 +00:00
Matt Arsenault
70b306fc07 R600/SI: Fix extra defs of VCC / SCC.
When replacing scalar operations with vector,
the wrong implicit output register was used.

llvm-svn: 195033
2013-11-18 20:09:21 +00:00
Tom Stellard
84bb236e61 R600: Enable the IR structurizer by default
llvm-svn: 195031
2013-11-18 19:43:44 +00:00
Tom Stellard
f1b1fa4727 R600: Fix a crash in the AMDILCFGStrucurizer
The ifPatternMatch() function was not correctly reporting the number
of matches in some cases.

llvm-svn: 195030
2013-11-18 19:43:38 +00:00
Tom Stellard
b3bf286ada R600: Add a SubtargetFeatture for disabling the ifcvt pass.
This is useful when writing test cases for the AMDIL structurizer.

llvm-svn: 195029
2013-11-18 19:43:33 +00:00
Tom Stellard
c6a94af8d4 R600: Use lower-case for EnableIRStructurizer feature
llc converts all values passed to -mattr= to lowercase, so this
enables us to toggle this feature when using llc.

llvm-svn: 195028
2013-11-18 19:43:29 +00:00