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Commit Graph

160914 Commits

Author SHA1 Message Date
Nicholas Wilson
bcbc464e13 [WebAssembly] Attach a name to globals similarly to function naming
This allows LLD to print the name for an InputGlobal when encountering
an error.

Differential Revision: https://reviews.llvm.org/D44033

llvm-svn: 326691
2018-03-05 12:16:32 +00:00
Thomas Preud'homme
5ee7236a6d Fix location of comment in EmitPopInst
Comment about folding return in LDM was not moved along with the
corresponding code in r242714. This commit fixes that.

llvm-svn: 326690
2018-03-05 11:49:00 +00:00
Yuka Takahashi
1a6b7a6545 [Bash-autocompletion] Pass all flags in shell command-line to Clang
Previously, we passed "#" to --autocomplete to indicate to enable cc1
flags. For example, when -cc1 or -Xclang was passed to bash, bash
executed `clang --autocomplete=#-<flag they want to complete>`.

However, this was not a good implementation because it depends -Xclang
and -cc1 parsing to shell. So I changed this to pass all flags shell
has, so that Clang can handle them internally.

I had to change many testcases because API spec changed quite a lot.

Reviewers: teemperor, v.g.vassilev

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D39342

llvm-svn: 326684
2018-03-05 08:54:20 +00:00
Clement Courbet
3e66b31c6a [MergeICmps][NFC] Improve logging.
llvm-svn: 326683
2018-03-05 08:21:47 +00:00
Craig Topper
fd8b3ce3b0 [X86] Replace usages of X86Subtarget::hasFp256 with hasAVX. Remove hasFP256.
Almost none of these usages were FP specific. And we had no clear guideliness on when to use hasAVX vs hasFP256.

I might also remove hasInt256 too since its an alias for hasAVX2.

llvm-svn: 326682
2018-03-05 00:13:35 +00:00
Craig Topper
b262747bf9 [X86] Add a DAG combine to turn stores of vXi1 constants into scalar stores.
llvm-svn: 326679
2018-03-04 19:33:15 +00:00
Craig Topper
b9c9dd7951 [X86] Add a 32-bit mode command line to avx512-mask-op.ll. Add tests for storing v2i1 and v4i1 constants.
llvm-svn: 326678
2018-03-04 19:33:13 +00:00
Craig Topper
53ec70c57c [DAGCombiner] Add a peekThroughBitcast to MergeStoresOfConstantsOrVecElts to fix a crash if we are storing a bitcast of a constant.
Loading a constant into a k-register in AVX512 requires a bitcast from a scalar constant. In the test case here we have a k-register store that gets split into multiple parts of KNL. MergeConsecutiveStores sees each of these pieces as a consecutive store and looks through the bitcast to find the underly scalar constant. But when we went to create the combined store we didn't look through the same bitcast.

llvm-svn: 326677
2018-03-04 18:51:46 +00:00
Simon Pilgrim
60c68d3c93 [X86][X87] Add X87 folded integer arithmetic tests
Add tests for FIADD/FISUB/FISUBR/FIMUL/FIDIV/FIDIVR

Shows we have more FILD stack usage than necessary (arg load, spill, reload to x87)

llvm-svn: 326674
2018-03-04 15:00:19 +00:00
Simon Pilgrim
d059a5fd94 [X86][MMX] Remove completed _mm_cvtsi32_si64 todo
rL322525 - mmx zero constant support
rL322553 - mmx i32 zero extended value
rL326497 - mmx i64 general constant handling

Not all constants are folded, we generate some on the GPRs (similar to SSE build vector) where appropriate

llvm-svn: 326673
2018-03-04 14:57:26 +00:00
Craig Topper
5e5ff32fdb [X86] Fix unused variable in release builds.
llvm-svn: 326672
2018-03-04 02:14:16 +00:00
Craig Topper
f089ced662 [X86] Combine (store (v1i1 (scalar_to_vector (i8 X)))) -> (store (i8 X)).
llvm-svn: 326670
2018-03-04 01:48:02 +00:00
Craig Topper
55480673fc [X86] Lower v1i1/v2i1/v4i1/v8i1 load/stores to i8 load/store during op legalization if AVX512DQ is not supported.
We were previously doing this with isel patterns. Moving it to op legalization gives us chance to see the required bitcast earlier. And it lets us remove some isel patterns.

llvm-svn: 326669
2018-03-04 01:48:00 +00:00
Fedor Indutny
2de161d33b [CallSiteSplitting] fix use after-free
Iterating through predecessors of `TailBB` while removing their
terminators leads to use after-free, because the predecessor list is
changing on each removal.

llvm-svn: 326668
2018-03-03 22:34:38 +00:00
Fedor Indutny
5f6d64098f [CallSiteSplitting] properly split musttail calls
Summary:
`musttail` calls can't be naively splitted. The split blocks must
include not only the call instruction itself, but also (optional)
`bitcast` and `return` instructions that follow it.

Clone `bitcast` and `ret`, place them into the split blocks, and
remove the tail block when done.

Reviewers: junbuml, mcrosier, davidxl, davide, fhahn

Reviewed By: fhahn

Subscribers: JDevlieghere, llvm-commits

Differential Revision: https://reviews.llvm.org/D43729

llvm-svn: 326666
2018-03-03 21:40:14 +00:00
Sanjay Patel
951a173e2d [InstCombine] add test for vectors with undef elts; NFC
llvm-svn: 326661
2018-03-03 18:00:15 +00:00
Sanjay Patel
9968c706bd [InstCombine] (~X) - (~Y) --> Y - X
llvm-svn: 326660
2018-03-03 17:53:25 +00:00
Sanjay Patel
728449bd27 [InstCombine] add tests for notnotsub; NFC
As shown in D44043, we may need this fold in the backend,
but it's also missing in the IR optimizer.

llvm-svn: 326659
2018-03-03 17:20:37 +00:00
Simon Pilgrim
6583c8a76b [X86] This bit-test TODO has been moved in PR36551
llvm-svn: 326658
2018-03-03 16:31:17 +00:00
Craig Topper
2b16f40269 [X86] Remove 'else' after return. NFC
llvm-svn: 326642
2018-03-03 05:18:21 +00:00
Chandler Carruth
b9edc0e428 [ThinLTO] Revert r325320: Import global variables
This caused some links to fail with ThinLTO due to missing symbols as
well as causing some binaries to have failures at runtime. We're working
with the author to get a test case, but want to get the tree green
again.

Further, it appears to introduce a data race. While the test usage of
threads was disabled in r325361 & r325362, that isn't an acceptable fix.
I've reverted both of these as well. This code needs to be thread safe.
Test cases for this are already on the original commit thread.

llvm-svn: 326638
2018-03-02 23:40:08 +00:00
Craig Topper
b07716f0fd [LegalizeVectorTypes] When scalarizing the operand of a unary op like TRUNC, use a SCALAR_TO_VECTOR rather than a single element BUILD_VECTOR to convert back to a vector type.
X86 considers v1i1 a legal type under AVX512 and as such a truncate from a v1iX type to v1i1 can be turned into a scalar truncate plus a conversion to v1i1. We would much prefer a v1i1 SCALAR_TO_VECTOR over a one element BUILD_VECTOR.

During lowering we were detecting the v1i1 BUILD_VECTOR as a splat BUILD_VECTOR like we try to do for v2i1/v4i1/etc. In this case we create (select i1 splat_elt, v1i1 all-ones, v1i1 all-zeroes). That goes through some more legalization and we end up with a CMOV choosing between 0 and 1 in scalar and a scalar_to_vector.

Arguably we could detect the v1i1 BUILD_VECTOR and do this better in X86 target code. But just using a SCALAR_TO_VECTOR in legalization is much easier.

llvm-svn: 326637
2018-03-02 23:27:50 +00:00
Dmitry Mikulin
4ffb3fc4af Implementation of MRI "delete" command.
Differential Revision: https://reviews.llvm.org/D43989

llvm-svn: 326636
2018-03-02 23:23:48 +00:00
Vedant Kumar
1d99435130 [AggressiveInstCombine] Use use_empty() instead of !getNumUses(), NFC
use_empty() runs in O(1), whereas getNumUses() runs in O(# uses).

llvm-svn: 326635
2018-03-02 23:22:49 +00:00
Sanjay Patel
982134d007 [InstCombine] rearrange visitFMul; NFCI
Put the simplest non-FMF folds first, so it's easier to
see what's left to fix/group/add with the FMF folds.

llvm-svn: 326632
2018-03-02 23:06:45 +00:00
Adrian Prantl
8c7b66990e Add DBG_VALUE support to the linear DAG scheduler
The fast/linear DAG scheduler doesn't lower DBG_VALUEs except for
function entry nodes.

Patch by Joshua Cranmer!

Differential Revision: https://reviews.llvm.org/D43028

llvm-svn: 326631
2018-03-02 22:59:51 +00:00
Francis Ricci
099dd1ade5 [llvm-symbolizer] Use correct path when resolving .gnu_debuglink in .debug
Summary:
The symbolizer was checking for .debug as a subdirectory of the
binary file itself, not of the directory containing the binary. This led to
a failure to find split debug info when it was contained in a .debug directory.

Reviewers: rnk, glider, zturner

Subscribers: llvm-commits, aprantl

Differential Revision: https://reviews.llvm.org/D44025

llvm-svn: 326630
2018-03-02 22:56:45 +00:00
Vedant Kumar
88c6e14549 [Utils] Salvage debug info in block simplification
In stage2 -O3 builds of llc, this results in small but measurable
increases in the number of variables with locations, and in the number
of unique source variables overall.

(According to llvm-dwarfdump --statistics, there are 123 additional
variables with locations, which is just a 0.006% improvement).

The size of the .debug_loc section of the llc dsym increases by 0.004%.

llvm-svn: 326629
2018-03-02 22:46:48 +00:00
Krzysztof Parzyszek
b3966a5583 [Hexagon] Generate valignb for shifting shuffles (instead of vdelta)
llvm-svn: 326627
2018-03-02 22:22:19 +00:00
Sameer AbuAsal
4c83786531 [RISCV] Implement MC relaxations for compressed instructions.
Summary:
     This patch implements relaxation for RISCV in the MC layer.
      The following relaxations are currently handled:
      1) Relax C_BEQZ to BEQ and C_BNEZ to BNEZ in RISCV.
      2) Relax and C_J $imm  to JAL x0, $imm  and CJAL to JAL ra, $imm.

Reviewers: asb, llvm-commits, efriedma

Reviewed By: asb

Subscribers: shiva0217

Differential Revision: https://reviews.llvm.org/D43055

llvm-svn: 326626
2018-03-02 22:04:12 +00:00
Rui Ueyama
b424396cdc Make llvm::djbHash an inline function.
Differential Revision: https://reviews.llvm.org/D43644

llvm-svn: 326625
2018-03-02 22:00:38 +00:00
Vedant Kumar
50d3f5be42 [Utils] Salvage debug info in recursive inst deletion
In stage2 -O3 builds of llc, this results in a 0.3% increase in the
number of variables with locations, and a 0.2% increase in the number of
unique source variables overall.

The size of the .debug_loc section of the llc dsym increases by 0.5%.

llvm-svn: 326621
2018-03-02 21:36:35 +00:00
Vedant Kumar
c4c4aa758a [unittests] Make some parseIR calls more readable, NFC
llvm-svn: 326620
2018-03-02 21:36:33 +00:00
Sam Clegg
ea8a591720 [WebAssembly] Avoid cast ExprType to wasm::ValType
This cast was causing invalid signatures to be written
for libcall functions.

Add an MC test which includes a call to builtin memcpy.

Differential Revision: https://reviews.llvm.org/D44037

llvm-svn: 326618
2018-03-02 21:33:14 +00:00
Craig Topper
91fb580e37 [InstCombine] Rewrite the binary op shrinking in visitFPTrunc to avoid creating overly small ConstantFPs that we'll just need to extend again.
Instead of returning the smaller FP constant we now return the minimal Type the constant can fit into. We also return the Type of the input to any fp extends. The legality checks are then done on just the size of these Types. If we find something profitable we then emit FPTruncs in front of the smaller binop and assume those FPTruncs will be constant folded or combined with any ConstantFPs or fpextends.

Differential Revision: https://reviews.llvm.org/D44038

llvm-svn: 326617
2018-03-02 21:25:18 +00:00
Ulrich Weigand
036eca6963 [SystemZ] Fix test cases after r326613
I forgot to check in the updated test cases after the r326613 commit.

llvm-svn: 326616
2018-03-02 21:22:42 +00:00
Heejin Ahn
cd511914a9 Reland "[WebAssembly] More uses of uint8_t for single byte values"
Summary:
Original change was D43991 (rL326541) and was reverted by rL326571 and
rL326572. This adds also the necessary MCCodeEmitter patch.

Reviewers: sbc100

Subscribers: jfb, dschuff, sbc100, jgravelle-google, sunfish, llvm-commits, ncw

Differential Revision: https://reviews.llvm.org/D44034

llvm-svn: 326614
2018-03-02 20:52:59 +00:00
Ulrich Weigand
be8b777935 [SystemZ] Allow LRV/STRV with volatile memory accesses
The byte-swapping loads and stores do not actually perform multiple
accesses to their memory operand, so they are OK to use with volatile
memory operands as well.  Remove overly cautious check.

llvm-svn: 326613
2018-03-02 20:51:59 +00:00
Ulrich Weigand
124bd48b88 [SystemZ] Add support for anyregcc calling convention
This adds back-end support for the anyregcc calling convention
for use with patchpoints.

Since all registers are considered call-saved with anyregcc
(except for 0 and 1 which may still be clobbered by PLT stubs
and the like), this required adding support for saving and
restoring vector registers in prologue/epilogue code for the
first time.  This is not used by any other calling convention.

llvm-svn: 326612
2018-03-02 20:40:11 +00:00
Ulrich Weigand
6a6a68334a [SystemZ] Support stackmaps and patchpoints
This adds back-end support for the @llvm.experimental.stackmap and
@llvm.experimental.patchpoint intrinsics.

llvm-svn: 326611
2018-03-02 20:39:30 +00:00
Ulrich Weigand
68f7d9ae66 [SystemZ] Fix common-code users of stack size
On SystemZ we need to provide a register save area of 160 bytes to
any called function.  This size needs to be added when allocating
stack in the function prologue.  However, it was not accounted for
as part of MachineFrameInfo::getStackSize(); instead the back-end
used a private routine getAllocatedStackSize().

This is OK for code-gen purposes, but it breaks other users of
the getStackSize() routine, in particular it breaks the recently-
added -stack-size-section feature.

Fix this by updating the main stack size tracked by common code
(in emitPrologue) instead of using the private routine.

No change in code generation intended.

llvm-svn: 326610
2018-03-02 20:38:41 +00:00
Ulrich Weigand
0dfaa8e74a [SystemZ] Support vector registers in inline asm
This adds support for specifying vector registers for use with inline
asm statements, either via the 'v' constraint or by explicit register
names (v0 ... v31).

llvm-svn: 326609
2018-03-02 20:36:34 +00:00
Sanjay Patel
c1a07635a1 [InstCombine] partly fix FMF for fmul+log2 fold
The code was checking that all of the instructions in the 
sequence are 'fast', but that's not necessary. The final 
multiply is all that we need to check (tests adjusted). 
The fmul doesn't need to be fully 'fast' either, but that 
can be another patch.

llvm-svn: 326608
2018-03-02 20:32:46 +00:00
Sanjay Patel
3d24154888 [InstCombine] add tests for rL169025; NFC
This narrow fold was added with no motivation or test cases 
a bit over 5 years ago. Removing a constant operand is a 
good canonicalization? We should handle Y*2.0 too then?

llvm-svn: 326606
2018-03-02 19:26:13 +00:00
Vedant Kumar
1268108615 Fix more spelling mistakes in comments of LLVM Analysis passes
Patch by Reshabh Sharma!

Differential Revision: https://reviews.llvm.org/D43939

llvm-svn: 326601
2018-03-02 18:57:02 +00:00
Sanjay Patel
306e5cccd6 [PatternMatch, InstSimplify] fix m_NaN to work with vector constants and use it
This is NFC for the moment (and independent of any potential NaN semantic
controversy). Besides making the code in InstSimplify easier to read, the
motivation is to eventually allow undef elements in vector constants to
match too. A proposal to add the base logic for that is in D43792.

llvm-svn: 326600
2018-03-02 18:36:08 +00:00
Krzysztof Parzyszek
a3ffcf4b0f [Hexagon] Handle VACOPY in isel lowering
llvm-svn: 326599
2018-03-02 18:35:57 +00:00
Simon Pilgrim
028a35edd1 [X86][BTVER2] Fix throughput of YMM bitwise instructions
These instructions are double-pumped, split into 2 128-bit ops and then passing through either FPU pipe.

Found while testing llvm-mca (D43951)

llvm-svn: 326597
2018-03-02 18:20:35 +00:00
Craig Topper
3ed0775afc [X86] Reject xmm16-31 in inline asm constraints when AVX512 is disabled
Fixes PR36532

Differential Revision: https://reviews.llvm.org/D43960

llvm-svn: 326596
2018-03-02 18:19:40 +00:00
Craig Topper
de65b78e94 [InstCombine] Allow fptrunc (fpext X)) to be reduced to a single fpext/ftrunc
If we are only truncating bits from the extend we should be able to just use a smaller extend.

If we are truncating more than the extend we should be able to just use a fptrunc since the presense of the fpextend shouldn't affect rounding.

Differential Revision: https://reviews.llvm.org/D43970

llvm-svn: 326595
2018-03-02 18:16:51 +00:00