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Commit Graph

69 Commits

Author SHA1 Message Date
Evan Cheng
09942d3f8b Assert if InflightSet is not cleared after instruction selecting a BB.
llvm-svn: 28459
2006-05-25 00:24:28 +00:00
Evan Cheng
b040dd86af Clear HandleMap and ReplaceMap after instruction selection. Or it may cause
non-deterministic behavior.

llvm-svn: 28454
2006-05-24 20:46:25 +00:00
Chris Lattner
f604017e47 Patches to make the LLVM sources more -pedantic clean. Patch provided
by Anton Korobeynikov!  This is a step towards closing PR786.

llvm-svn: 28447
2006-05-24 17:04:05 +00:00
Evan Cheng
52fde7f5ce Back out indirect branch load folding hack. It broke some tests.
llvm-svn: 28425
2006-05-21 06:28:50 +00:00
Evan Cheng
a0bbbba168 - Use of load's chain result should be redirected to load's chain operand.
If it reads the chain result of the call, then the use, callseq_start,
  and call would form a cycle!
- Don't forget handle node replacement!
- There could also be a TokenFactor between the load and the callseq_start.

llvm-svn: 28420
2006-05-20 09:21:39 +00:00
Evan Cheng
95259a0f68 Missing break statements.
llvm-svn: 28418
2006-05-20 07:44:28 +00:00
Evan Cheng
550e73a900 Remove unused patterns.
llvm-svn: 28417
2006-05-20 01:40:16 +00:00
Evan Cheng
c68ea538e7 Handle indirect call which folds a load manually. This never matches by
the TableGen generated code since the load's chain result is read by
the callseq_start node.

llvm-svn: 28416
2006-05-20 01:36:52 +00:00
Evan Cheng
dc9b5f5fc0 X86 integer register classes naming changes. Make them consistent with FP, vector classes.
llvm-svn: 28324
2006-05-16 07:21:53 +00:00
Evan Cheng
871a83d4d0 Remove dead code
llvm-svn: 28261
2006-05-12 19:03:56 +00:00
Evan Cheng
0fb3fc3626 Fixing truncate. Previously we were emitting truncate from r16 to r8 as
movw. That is we promote the destination operand to r16. So
        %CH = TRUNC_R16_R8 %BP
is emitted as
        movw %bp, %cx.

This is incorrect. If %cl is live, it would be clobbered.
Ideally we want to do the opposite, that is emitted it as
        movb ??, %ch
But this is not possible since %bp does not have a r8 sub-register.

We are now defining a new register class R16_ which is a subclass of R16
containing only those 16-bit registers that have r8 sub-registers (i.e.
AX - DX). We isel the truncate to two instructions, a MOV16to16_ to copy the
value to the R16_ class, followed by a TRUNC_R16_R8.

Due to bug 770, the register colaescer is not going to coalesce between R16 and
R16_. That will be fixed later so we can eliminate the MOV16to16_. Right now, it
can only be eliminated if we are lucky that source and destination registers are
the same.

llvm-svn: 28164
2006-05-08 08:01:26 +00:00
Evan Cheng
84612a59c2 Better implementation of truncate. ISel matches it to a pseudo instruction
that gets emitted as movl (for r32 to i16, i8) or a movw (for r16 to i8). And
if the destination gets allocated a subregister of the source operand, then
the instruction will not be emitted at all.

llvm-svn: 28119
2006-05-05 05:40:20 +00:00
Chris Lattner
e199d55073 #include Intrinsics.h into all dag isels
llvm-svn: 27109
2006-03-25 06:47:10 +00:00
Evan Cheng
7ec94f2ff7 Added getTargetLowering() to TargetMachine. Refactored targets to support this.
llvm-svn: 26742
2006-03-13 23:20:37 +00:00
Evan Cheng
fab8a53944 Don't match x << 1 to LEAL. It's better to emit x + x.
llvm-svn: 26429
2006-02-28 21:13:57 +00:00
Evan Cheng
de768027d9 * Cleaned up addressing mode matching code.
* Cleaned up and tweaked LEA cost analysis code. Removed some hacks.
* Handle ADD $X, c to MOV32ri $X+c. These patterns cannot be autogen'd and
  they need to be matched before LEA.

llvm-svn: 26376
2006-02-25 10:09:08 +00:00
Evan Cheng
cb9fb051a5 - Clean up the lowering and selection code of ConstantPool, GlobalAddress,
and ExternalSymbol.
- Use C++ code (rather than tblgen'd selection code) to match the above
  mentioned leaf nodes. Do not mutate and nodes and do not record the
  selection in CodeGenMap. These nodes should be safe to duplicate. This is
  a performance win.

llvm-svn: 26335
2006-02-23 20:41:18 +00:00
Evan Cheng
2977507828 PIC related bug fixes.
1. Various asm printer bug.
2. Lowering bug. Now TargetGlobalAddress is wrapped in X86ISD::TGAWrapper.

llvm-svn: 26324
2006-02-23 02:43:52 +00:00
Evan Cheng
b8000b03aa X86 codegen tweak to use lea in another case:
Suppose base == %eax and it has multiple uses, then instead of
  movl %eax, %ecx
  addl $8, %ecx
use
  leal 8(%eax), %ecx.

llvm-svn: 26323
2006-02-23 00:13:58 +00:00
Evan Cheng
bf3558a375 x86 / Darwin PIC support.
llvm-svn: 26273
2006-02-18 00:15:05 +00:00
Evan Cheng
1b8029264a Prevent certain nodes that have already been selected from being folded into
X86 addressing mode. Currently we do not allow any node whose target node
produces a chain as well as any node that is at the root of the addressing
mode expression tree.

llvm-svn: 26117
2006-02-11 02:05:36 +00:00
Evan Cheng
eaaafb36c8 Nicer code. :-)
llvm-svn: 26111
2006-02-10 22:46:26 +00:00
Evan Cheng
d141f84c34 Added X86 isel debugging stuff.
llvm-svn: 26110
2006-02-10 22:24:32 +00:00
Evan Cheng
d491020c15 Match tblgen change.
llvm-svn: 26096
2006-02-09 22:12:53 +00:00
Evan Cheng
6bd0f9c4ba Match getTargetNode() changes (now return SDNode* instead of SDOperand).
llvm-svn: 26085
2006-02-09 07:17:49 +00:00
Evan Cheng
521e5a1bfe Change Select() from
SDOperand Select(SDOperand N);
to
void Select(SDOperand &Result, SDOperand N);

llvm-svn: 26067
2006-02-09 00:37:58 +00:00
Evan Cheng
080996281c - Update load folding checks to match those auto-generated by tblgen.
- Manually select SDOperand's returned by TryFoldLoad which make up the
  load address.

llvm-svn: 26012
2006-02-06 06:02:33 +00:00
Evan Cheng
fb902782e8 Use SelectRoot() as entry of any tblgen based isel.
llvm-svn: 25997
2006-02-05 06:46:41 +00:00
Evan Cheng
c23d3cd6c3 Re-commit the last bit of change that was backed out.
llvm-svn: 25983
2006-02-05 05:25:07 +00:00
Chris Lattner
15ab5c6d0c Temporarily revert this patch, which probably breaks with the
tblgen patch reverted.

llvm-svn: 25971
2006-02-04 09:24:16 +00:00
Evan Cheng
6a366c5eda Complex pattern's custom matcher should not call Select() on any operands.
Select them afterwards if it returns true.

llvm-svn: 25968
2006-02-04 08:50:49 +00:00
Evan Cheng
45ebd632f2 - Allow XMM load (for scalar use) to be folded into ANDP* and XORP*.
- Use XORP* to implement fneg.

llvm-svn: 25857
2006-01-31 22:28:30 +00:00
Evan Cheng
5891f49c47 x86 CPU detection and proper subtarget support
llvm-svn: 25679
2006-01-27 08:10:46 +00:00
Chris Lattner
aafc339b4e Add explicit #includes of <iostream>
llvm-svn: 25515
2006-01-22 23:41:00 +00:00
Evan Cheng
ddb170b73e Didn't mean to check that in.
llvm-svn: 25436
2006-01-19 01:52:56 +00:00
Evan Cheng
aebece2f7b A obvious typo
llvm-svn: 25435
2006-01-19 01:46:14 +00:00
Evan Cheng
de33ca2831 Fix FP_TO_INT**_IN_MEM lowering.
llvm-svn: 25368
2006-01-16 21:21:29 +00:00
Chris Lattner
20f25dc8c2 Use the default lowering of ISD::DYNAMIC_STACKALLOC, delete now dead code.
llvm-svn: 25333
2006-01-15 09:00:21 +00:00
Chris Lattner
95882698e5 silence a warning
llvm-svn: 25322
2006-01-14 20:11:13 +00:00
Evan Cheng
3c3391632d Select DYNAMIC_STACKALLOC
llvm-svn: 25225
2006-01-11 22:15:18 +00:00
Evan Cheng
e42281bcba * Add special entry code main() (to set x87 to 64-bit precision).
* Allow a register node as SelectAddr() base.
* ExternalSymbol -> TargetExternalSymbol as direct function callee.
* Use X86::ESP register rather than CopyFromReg(X86::ESP) as stack ptr for
  call parmater passing.

llvm-svn: 25207
2006-01-11 06:09:51 +00:00
Chris Lattner
1d0926075f implement FP_REG_KILL insertion for the dag-dag instruction selector
llvm-svn: 25192
2006-01-11 01:15:34 +00:00
Chris Lattner
b4e9082f18 Fit into 80 cols
llvm-svn: 25191
2006-01-11 00:46:55 +00:00
Evan Cheng
8504673bb2 FP_TO_INT*_IN_MEM and x87 FP Select support.
llvm-svn: 25188
2006-01-10 20:26:56 +00:00
Evan Cheng
154cef5ccb * Added undef patterns.
* Some reorg.

llvm-svn: 25163
2006-01-09 23:10:28 +00:00
Evan Cheng
6a9c735e21 * Added integer div / rem.
* Fixed a load folding bug.

llvm-svn: 25136
2006-01-06 23:19:29 +00:00
Evan Cheng
060b19c708 ISEL code for MULHU, MULHS, and UNDEF.
llvm-svn: 25132
2006-01-06 20:36:21 +00:00
Evan Cheng
efe621adce fold (shl x, 1) -> (add x, x)
llvm-svn: 25120
2006-01-06 01:06:31 +00:00
Evan Cheng
6c86cf3a5f Added ConstantFP patterns.
llvm-svn: 25108
2006-01-05 02:08:37 +00:00
Evan Cheng
2329411038 DAG based isel call support.
llvm-svn: 25103
2006-01-05 00:27:02 +00:00