RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-21 20:12:56 +02:00
Code Issues Projects Releases Wiki Activity
21,563 Commits 4 Branches 5 Tags 704 MiB
bea3ab432b
Commit Graph

406 Commits

Author SHA1 Message Date
Evan Cheng
231b11ba87 Added field noResults to Instruction. 
Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.

llvm-svn: 25017
 2005-12-26 09:11:45 +00:00
Evan Cheng
d87688fe72 * Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead. 
* Added a pseudo instruction (for each target) that represent "return void".
  This is a workaround for lack of optional flag operand (return void is not
  lowered so it does not have a flag operand.)

llvm-svn: 24997
 2005-12-23 22:14:32 +00:00
Chris Lattner
738cec7a6e not a good idea 
llvm-svn: 24991
 2005-12-23 07:37:47 +00:00
Chris Lattner
2e386f9d46 fix something-o 
llvm-svn: 24987
 2005-12-23 07:08:39 +00:00
Chris Lattner
a4a2d4c3fe implement vaarg. Varargs now should work. 
llvm-svn: 24986
 2005-12-23 06:37:38 +00:00
Chris Lattner
4e8124bd9b implement vastart. The dag isel compiles this: 
void test3(va_list Y);
void test2(int F, ...) {
  va_list X;
  va_start(X, F);
  test3(X);
}

into this:

test2:
        save -104, %o6, %o6
        st %i5, [%i6+88]
        st %i4, [%i6+84]
        st %i3, [%i6+80]
        st %i2, [%i6+76]
        st %i1, [%i6+72]
        add %i6, 72, %o0
        st %o0, [%i6+-4]
        call test3
        nop
        restore %g0, %g0, %g0
        retl
        nop

The simple isel emits:

test2:
        save -96, %o6, %o6
        st %i0, [%i6+68]
        st %i1, [%i6+72]
        st %i2, [%i6+76]
        st %i3, [%i6+80]
        st %i4, [%i6+84]
        st %i5, [%i6+88]
        or %g0, 1, %l0
        or %g0, 4, %l1
        umul %l0, %l1, %l0
        add %l0, 7, %l0
        and %l0, -8, %l0
        sub %o6, %l0, %o6
        add %o6, 96, %l0
        add %i6, 72, %l1
        st %l1, [%l0]
        ld [%l0], %o0
        call test3
        nop
        restore %g0, %g0, %g0
        retl
        nop

llvm-svn: 24985
 2005-12-23 06:24:04 +00:00
Chris Lattner
73db2dc9fc remove benchmark list, remove issues addressed by the dag-dag isel 
llvm-svn: 24984
 2005-12-23 06:09:30 +00:00
Chris Lattner
8b2bd265f4 make sure bit_converts are expanded 
llvm-svn: 24978
 2005-12-23 05:13:35 +00:00
Chris Lattner
e47f28d044 fix the int<->fp instructions, which apparently take a single float register 
to represent the int part (because it's always 32-bits)

llvm-svn: 24976
 2005-12-23 05:00:16 +00:00
Chris Lattner
aaeb6774c7 Use BIT_CONVERT to simplify this code 
llvm-svn: 24975
 2005-12-23 02:31:39 +00:00
Chris Lattner
1cbff1f3cd clean up .td file by using evan's new FLAG thing 
llvm-svn: 24967
 2005-12-22 21:18:39 +00:00
Jim Laskey
d82881490c Disengage DEBUG_LOC from non-PPC targets. 
llvm-svn: 24919
 2005-12-21 20:51:37 +00:00
Chris Lattner
39b72c3525 remove dead code 
llvm-svn: 24896
 2005-12-21 05:27:51 +00:00
Chris Lattner
338c0b2011 Run lower-switch after lower-invoke. 
Only run lower-allocations and lower-select for the simple isel

llvm-svn: 24881
 2005-12-20 08:00:11 +00:00
Chris Lattner
ec177e242d Reserve G1 for frame offset stuff and use it to handle large stack frames. 
For example, instead of emitting this:

test:
        save -40112, %o6, %o6   ;; imm too large
        add %i6, -40016, %o0    ;; imm too large
        call caller
        nop
        restore %g0, %g0, %g0
        retl
        nop

emit this:

test:
        sethi 4194264, %g1
        or %g1, 848, %g1
        save %o6, %g1, %o6
        sethi 4194264, %g1
        add %g1, %i6, %g1
        add %i1, 944, %o0
        call caller
        nop
        restore %g0, %g0, %g0
        retl
        nop

which doesn't cause the assembler to barf.

llvm-svn: 24880
 2005-12-20 07:56:31 +00:00
Chris Lattner
7a430ddf61 Fix pifft by correcting the case when a i64/f64 straddles O5 and memory: 
we were storing into [FP+88] instead of [FP+92].
Improve codegen by emitting [FP+92], instead of emitting a copy of FP into
another GPR which wouldn't be coallesced because FP isn't register allocated.

llvm-svn: 24859
 2005-12-19 07:57:53 +00:00
Chris Lattner
3d1946c765 don't emit 'add %o6, 0, %o6' instructions 
llvm-svn: 24857
 2005-12-19 02:51:12 +00:00
Chris Lattner
2aeb7fcbb3 Fix calls to functions returning i64 
llvm-svn: 24856
 2005-12-19 02:15:51 +00:00
Chris Lattner
63761db672 Correct bool truncstore operand order 
llvm-svn: 24855
 2005-12-19 02:06:50 +00:00
Chris Lattner
4fef952e4d add the other bool zextload as well 
llvm-svn: 24854
 2005-12-19 01:44:58 +00:00
Chris Lattner
91caf35bf5 implement zextload bool 
llvm-svn: 24853
 2005-12-19 01:43:04 +00:00
Chris Lattner
59f1a92c77 mark some unsupported ops as unsupported 
llvm-svn: 24852
 2005-12-19 01:39:40 +00:00
Chris Lattner
480e2f7945 Fix syntax for indirect calls. This fixes Olden/mst 
llvm-svn: 24850
 2005-12-19 01:22:53 +00:00
Chris Lattner
bd8b911c46 Keep stack frames 8-byte aligned. This fixes olden/voronoi 
llvm-svn: 24849
 2005-12-19 01:15:13 +00:00
Chris Lattner
b10b543e85 apparently rdy isn't actually a psuedo instruction. Use rd %y 
llvm-svn: 24848
 2005-12-19 00:53:02 +00:00
Chris Lattner
9e50ecd0d2 add fneg/fabs support for doubles 
llvm-svn: 24847
 2005-12-19 00:50:12 +00:00
Chris Lattner
0a579fb2ac Various cleanups to this pass, no functionality change 
llvm-svn: 24846
 2005-12-19 00:46:20 +00:00
Chris Lattner
be1adf763b add bool truncstores 
llvm-svn: 24845
 2005-12-19 00:19:21 +00:00
Chris Lattner
be3df4a199 Elimiante SP and FP, which weren't members of the IntRegs register class 
llvm-svn: 24844
 2005-12-19 00:06:52 +00:00
Chris Lattner
fdc05d74a6 The sun assembler only supports .xword in V9 mode. 
llvm-svn: 24842
 2005-12-18 23:36:45 +00:00
Chris Lattner
d0e25175d3 Configure the asmwriter to allow constant pools to be printed correctly 
llvm-svn: 24841
 2005-12-18 23:35:05 +00:00
Chris Lattner
84a2caf581 add support for integer extloads 
llvm-svn: 24840
 2005-12-18 23:18:37 +00:00
Chris Lattner
061cfe15c9 Add support for undef 
llvm-svn: 24839
 2005-12-18 23:10:57 +00:00
Chris Lattner
e8dad0dcb9 Add support for calls to external symbols 
llvm-svn: 24838
 2005-12-18 23:07:11 +00:00
Chris Lattner
745c88ba10 we have no memcpy 
llvm-svn: 24837
 2005-12-18 23:00:27 +00:00
Chris Lattner
d8c98dcfe0 Fix a crash on a call with no arguments 
llvm-svn: 24836
 2005-12-18 22:57:47 +00:00
Chris Lattner
27357a915a Change return lowering so that we can autogen the matching code. 
llvm-svn: 24832
 2005-12-18 21:03:04 +00:00
Chris Lattner
41ec63f309 Implement Calls for V8. This would be completely autogenerated except for 
a small bug in tblgen.  When that is fixed, we can remove the ISD::Call case
in Select.

llvm-svn: 24830
 2005-12-18 15:55:15 +00:00
Chris Lattner
b82f4641c4 Implement the full V8 ABI for incoming arguments. 
llvm-svn: 24825
 2005-12-18 13:33:06 +00:00
Chris Lattner
21ae63ceb9 Push ops list, asm string, and pattern all the way up to InstV8. Move the 
InstV8 class to the InstrFormats file where it belongs.

llvm-svn: 24824
 2005-12-18 08:21:00 +00:00
Chris Lattner
11fa3cc8ee Give V8 select_cc, in the spirit of the PPC backend 
llvm-svn: 24823
 2005-12-18 08:13:54 +00:00
Chris Lattner
6d46ed50a0 remove some unused instructions 
llvm-svn: 24822
 2005-12-18 07:15:17 +00:00
Chris Lattner
e0ebaa24f9 V8 doesn't have FP extload 
llvm-svn: 24821
 2005-12-18 07:13:32 +00:00
Chris Lattner
0d0850d22e simplifications, fix typo 
llvm-svn: 24820
 2005-12-18 07:09:06 +00:00
Chris Lattner
941ba22d08 Add frameindex support 
Add support for copying (e.g. returning) doubles
Add support for F<->I instructions

llvm-svn: 24818
 2005-12-18 06:59:57 +00:00
Chris Lattner
7b7ea7c7bd Tighten up some checks 
llvm-svn: 24817
 2005-12-18 06:40:34 +00:00
Chris Lattner
2aab8f4471 Add constant pool support, including folding into addresses. 
Pretty print addresses a bit, to not print [%r1+%g0]: just print [%r1]

llvm-svn: 24813
 2005-12-18 02:37:35 +00:00
Chris Lattner
cba8a96bd0 Teach the addressing mode stuff to fold "%lo" into 'ri' addressing modes, 
allowing us to compile this:

to this:

%G1 = external global int
%G2 = external global int
void %test() {
        %X = load int* %G1
        store int %X, int* %G2
        ret void
}

test:
        save -96, %sp, %sp
        sethi %hi(G1), %l0
        ld [%l0+%lo(G1)], %l0
        sethi %hi(G2), %l1
        st %l0, [%l1+%lo(G2)]
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

test:
        save -96, %sp, %sp
        sethi %hi(G1), %l0
        or %g0, %lo(G1), %l1
        ld [%l1+%l0], %l0
        sethi %hi(G2), %l1
        or %g0, %lo(G2), %l2
        st %l0, [%l2+%l1]
        restore %g0, %g0, %g0
        retl
        nop

llvm-svn: 24812
 2005-12-18 02:27:00 +00:00
Chris Lattner
5303e59b7a Add initial support for global variables, and fix a bug in addr mode selection 
where we didn't select the operands.

llvm-svn: 24811
 2005-12-18 02:10:39 +00:00
Chris Lattner
1294e27969 Claiming that branch targets are registers is not very wholesome. Change them 
to be basic blocks.  Also, add uncond branches.

llvm-svn: 24810
 2005-12-18 01:46:58 +00:00