Anton Korobeynikov
|
08d9f6b882
|
Cleanup
llvm-svn: 76053
|
2009-07-16 14:31:32 +00:00 |
|
Anton Korobeynikov
|
94f250ff30
|
Fix logic inversion for RI-mode address selection
llvm-svn: 76052
|
2009-07-16 14:31:14 +00:00 |
|
Anton Korobeynikov
|
373515d99e
|
Expand 32-bit bitconverts via memory
llvm-svn: 76050
|
2009-07-16 14:30:29 +00:00 |
|
Anton Korobeynikov
|
080bdae588
|
Fix incomin arg stack frame offset in case we need to generate stack frame
llvm-svn: 76049
|
2009-07-16 14:29:57 +00:00 |
|
Anton Korobeynikov
|
c84e2bb30e
|
Fix instruction mnemonics for some fp_to_sint operations
llvm-svn: 76048
|
2009-07-16 14:29:26 +00:00 |
|
Anton Korobeynikov
|
74497b2190
|
i32 values are passed extended also on stack. Handle this in generic way
llvm-svn: 76047
|
2009-07-16 14:29:05 +00:00 |
|
Anton Korobeynikov
|
319dc4e8d3
|
We definitely have 1-0 bools
llvm-svn: 76046
|
2009-07-16 14:28:46 +00:00 |
|
Anton Korobeynikov
|
2e8f54d16d
|
Revert the commit, it just hides the real bug
llvm-svn: 76045
|
2009-07-16 14:28:26 +00:00 |
|
Anton Korobeynikov
|
0276bc9176
|
Out GR128 regclass is not a 'real' i128 one.
llvm-svn: 76044
|
2009-07-16 14:27:53 +00:00 |
|
Anton Korobeynikov
|
690fef7849
|
Add missed condbranch opcodes
llvm-svn: 76043
|
2009-07-16 14:27:26 +00:00 |
|
Anton Korobeynikov
|
4181716247
|
Handle bitconverts
llvm-svn: 76042
|
2009-07-16 14:27:01 +00:00 |
|
Anton Korobeynikov
|
60427c0b64
|
Unbreak mvi and friends - emit only 'significant' part of the operand
llvm-svn: 76041
|
2009-07-16 14:26:38 +00:00 |
|
Anton Korobeynikov
|
ff6d84fd85
|
Expand fp_to_uint too
llvm-svn: 76040
|
2009-07-16 14:26:06 +00:00 |
|
Anton Korobeynikov
|
da480ca78d
|
We don't have FP truncstores
llvm-svn: 76039
|
2009-07-16 14:25:46 +00:00 |
|
Anton Korobeynikov
|
7ea47e70b3
|
Expand uint_to_fp
llvm-svn: 76038
|
2009-07-16 14:25:30 +00:00 |
|
Anton Korobeynikov
|
117e7a7179
|
Emit proper rounding mode for fp_to_sint
llvm-svn: 76037
|
2009-07-16 14:25:12 +00:00 |
|
Anton Korobeynikov
|
61bf5c13c4
|
f32/f64 regs are stored on stack if we're short in FP regs
llvm-svn: 76036
|
2009-07-16 14:24:57 +00:00 |
|
Anton Korobeynikov
|
bbf0fe2a76
|
Lower anyext to zext, 32-bit stuff does not have any implicit zero-extension side effects
llvm-svn: 76035
|
2009-07-16 14:24:41 +00:00 |
|
Anton Korobeynikov
|
886e977c69
|
Make FP zero to be legal FP immediate via LOAD ZERO
llvm-svn: 76034
|
2009-07-16 14:24:16 +00:00 |
|
Anton Korobeynikov
|
2474b40557
|
Loads are not two-address in any way
llvm-svn: 76033
|
2009-07-16 14:24:01 +00:00 |
|
Anton Korobeynikov
|
e45c7cb554
|
Add LOAD NEGATIVE instruction
llvm-svn: 76032
|
2009-07-16 14:23:44 +00:00 |
|
Anton Korobeynikov
|
d12e7875c9
|
LOAD COMPLEMENT instruction is not really two-addr
llvm-svn: 76031
|
2009-07-16 14:23:30 +00:00 |
|
Anton Korobeynikov
|
f8ac41d531
|
Add multiple add/sub instructions
llvm-svn: 76030
|
2009-07-16 14:23:16 +00:00 |
|
Anton Korobeynikov
|
df2f045667
|
Handle FP callee-saved regs
llvm-svn: 76029
|
2009-07-16 14:23:01 +00:00 |
|
Anton Korobeynikov
|
b90a38d00d
|
Proper FP extloads
llvm-svn: 76028
|
2009-07-16 14:22:46 +00:00 |
|
Anton Korobeynikov
|
940ec5955b
|
Add proper PWS impdef's
llvm-svn: 76027
|
2009-07-16 14:22:30 +00:00 |
|
Anton Korobeynikov
|
3f37f337be
|
Propagate FP select_cc to dag inserters
llvm-svn: 76026
|
2009-07-16 14:22:15 +00:00 |
|
Anton Korobeynikov
|
dc167c2eec
|
Implement fp_to_sint
llvm-svn: 76025
|
2009-07-16 14:21:57 +00:00 |
|
Anton Korobeynikov
|
e372330133
|
Implement FP regs spills / restores
llvm-svn: 76024
|
2009-07-16 14:21:41 +00:00 |
|
Anton Korobeynikov
|
0c3534b070
|
Add fabs
llvm-svn: 76023
|
2009-07-16 14:21:27 +00:00 |
|
Anton Korobeynikov
|
fc1f449073
|
Add fneg
llvm-svn: 76022
|
2009-07-16 14:21:12 +00:00 |
|
Anton Korobeynikov
|
a73f3ffb1f
|
We don't have native sine / cosine instructions
llvm-svn: 76021
|
2009-07-16 14:20:56 +00:00 |
|
Anton Korobeynikov
|
d2feb0d2e4
|
More sint_to_fp stuff
llvm-svn: 76020
|
2009-07-16 14:20:39 +00:00 |
|
Anton Korobeynikov
|
23615e0340
|
Add bunch of FP instructions
llvm-svn: 76019
|
2009-07-16 14:20:24 +00:00 |
|
Anton Korobeynikov
|
32c9954322
|
We don't have any FP extloads
llvm-svn: 76018
|
2009-07-16 14:20:08 +00:00 |
|
Anton Korobeynikov
|
643215b0d7
|
Implement all comparisons
llvm-svn: 76017
|
2009-07-16 14:19:54 +00:00 |
|
Anton Korobeynikov
|
488f8c2fd1
|
Add constpool lowering / printing
llvm-svn: 76016
|
2009-07-16 14:19:35 +00:00 |
|
Anton Korobeynikov
|
4dbabbe3cf
|
Allow FP arguments pass / return
llvm-svn: 76015
|
2009-07-16 14:19:16 +00:00 |
|
Anton Korobeynikov
|
d4e7c7a373
|
Register FP regclasses
llvm-svn: 76014
|
2009-07-16 14:19:02 +00:00 |
|
Anton Korobeynikov
|
2ccdd0fd2b
|
Add FP regs
llvm-svn: 76013
|
2009-07-16 14:18:48 +00:00 |
|
Anton Korobeynikov
|
d8ced10967
|
Fix fallout from prev. patch
llvm-svn: 76012
|
2009-07-16 14:18:31 +00:00 |
|
Anton Korobeynikov
|
3e670f38f9
|
Provide consistent subreg idx scheme. This (hopefully) fixes remaining divide problems
llvm-svn: 76011
|
2009-07-16 14:18:17 +00:00 |
|
Anton Korobeynikov
|
bf722c6946
|
Use divide single for 32 bit signed divides
llvm-svn: 76010
|
2009-07-16 14:17:52 +00:00 |
|
Anton Korobeynikov
|
785f486b30
|
Add missed operands types
llvm-svn: 76009
|
2009-07-16 14:17:07 +00:00 |
|
Anton Korobeynikov
|
41d3ac1720
|
Missed part of prev. patch
llvm-svn: 76008
|
2009-07-16 14:16:45 +00:00 |
|
Anton Korobeynikov
|
7cf7a634df
|
Another attempt to fix prologue emission
llvm-svn: 76007
|
2009-07-16 14:16:26 +00:00 |
|
Anton Korobeynikov
|
b3af53a626
|
Implement 'large' PIC model
llvm-svn: 76006
|
2009-07-16 14:16:05 +00:00 |
|
Anton Korobeynikov
|
2889a28adb
|
Implement shifts properly (hopefilly - finally!)
llvm-svn: 76005
|
2009-07-16 14:15:24 +00:00 |
|
Anton Korobeynikov
|
6ff1411adf
|
Remove redundand register move
llvm-svn: 76004
|
2009-07-16 14:14:54 +00:00 |
|
Anton Korobeynikov
|
f48e88136e
|
Properly handle divides. As a bonus - implement memory versions of them.
llvm-svn: 76003
|
2009-07-16 14:14:33 +00:00 |
|
Anton Korobeynikov
|
3434b05a2c
|
Fix epic fail: full-width muls are not commutable. This unbreaks bunch of stuff from SingleSource/Benchmarks/Stanford
llvm-svn: 76002
|
2009-07-16 14:14:01 +00:00 |
|
Anton Korobeynikov
|
ca4d4129c6
|
32 bit rotate is not twoaddr instruction
llvm-svn: 76001
|
2009-07-16 14:13:43 +00:00 |
|
Anton Korobeynikov
|
e6b7c15a63
|
32 bit shifts have only 12 bit displacements
llvm-svn: 76000
|
2009-07-16 14:13:24 +00:00 |
|
Anton Korobeynikov
|
cffc479110
|
Add proper register aliases
llvm-svn: 75999
|
2009-07-16 14:12:54 +00:00 |
|
Anton Korobeynikov
|
2954802d28
|
Properly generate stack frame
llvm-svn: 75998
|
2009-07-16 14:12:36 +00:00 |
|
Anton Korobeynikov
|
0e3d764cc1
|
Unbreak indirect branches
llvm-svn: 75997
|
2009-07-16 14:12:18 +00:00 |
|
Anton Korobeynikov
|
07380f3ab0
|
Unbreak
llvm-svn: 75996
|
2009-07-16 14:12:00 +00:00 |
|
Anton Korobeynikov
|
1764c55d85
|
Do not forget to save R15 when we allocate stack frame
llvm-svn: 75995
|
2009-07-16 14:11:40 +00:00 |
|
Anton Korobeynikov
|
31bef4e21c
|
All calls clobbers R14
llvm-svn: 75994
|
2009-07-16 14:11:22 +00:00 |
|
Anton Korobeynikov
|
a04cb342a7
|
Unbreak calls to vararg functions
llvm-svn: 75993
|
2009-07-16 14:11:03 +00:00 |
|
Anton Korobeynikov
|
decd66501b
|
Stupid typo
llvm-svn: 75992
|
2009-07-16 14:10:49 +00:00 |
|
Anton Korobeynikov
|
6d0c8510ab
|
Typos
llvm-svn: 75991
|
2009-07-16 14:10:35 +00:00 |
|
Anton Korobeynikov
|
6c1091e7f3
|
Consolidate reg-imm / reg-reg-imm address mode selection logic in one place.
llvm-svn: 75990
|
2009-07-16 14:10:17 +00:00 |
|
Anton Korobeynikov
|
292a84921d
|
Fix fallout from 12-bit stuff landing: decide whether 20 bit displacements are needed during elimination of frame indexes.
llvm-svn: 75989
|
2009-07-16 14:09:56 +00:00 |
|
Anton Korobeynikov
|
9a1ad49207
|
Add support for 12 bit displacements
llvm-svn: 75988
|
2009-07-16 14:09:35 +00:00 |
|
Anton Korobeynikov
|
c2ec4e23f6
|
We already have reserved call frame regardless whether variable sized frame objects were present or not
llvm-svn: 75987
|
2009-07-16 14:09:04 +00:00 |
|
Anton Korobeynikov
|
a809635fc8
|
Emit proper lowering of load from arg stack slot
llvm-svn: 75986
|
2009-07-16 14:08:42 +00:00 |
|
Anton Korobeynikov
|
9013a1ee39
|
Implement dynamic allocas
llvm-svn: 75985
|
2009-07-16 14:08:15 +00:00 |
|
Anton Korobeynikov
|
ee8ce5b760
|
Add jump tables
llvm-svn: 75984
|
2009-07-16 14:07:50 +00:00 |
|
Anton Korobeynikov
|
cb3ee3ee90
|
Exapnd br_jt into indirect branch. Provide pattern for indirect branches.
llvm-svn: 75983
|
2009-07-16 14:07:24 +00:00 |
|
Anton Korobeynikov
|
21e498ac1c
|
Implement 64 bit immediates
llvm-svn: 75982
|
2009-07-16 14:07:06 +00:00 |
|
Anton Korobeynikov
|
ab90a05ff3
|
Add rotates
llvm-svn: 75981
|
2009-07-16 14:06:49 +00:00 |
|
Anton Korobeynikov
|
ff5b07e994
|
Add patterns for integer negate
llvm-svn: 75980
|
2009-07-16 14:06:27 +00:00 |
|
Anton Korobeynikov
|
335aeecedc
|
Provide proper patterns for and with imm instructions. Tune the tests accordingly.
llvm-svn: 75979
|
2009-07-16 14:06:00 +00:00 |
|
Anton Korobeynikov
|
49d065e9c9
|
Add 32 bit and reg-imm and disable invalid patterns for now
llvm-svn: 75978
|
2009-07-16 14:05:32 +00:00 |
|
Anton Korobeynikov
|
c9778b81c9
|
Add z9 and z10 target processors. Mark z10-only instructions as such.
llvm-svn: 75977
|
2009-07-16 14:05:00 +00:00 |
|
Anton Korobeynikov
|
0cc45f7a03
|
Fix MUL64rm instruction asmprinting
llvm-svn: 75976
|
2009-07-16 14:04:38 +00:00 |
|
Anton Korobeynikov
|
34fae672be
|
Preliminary asmprinting of globals
llvm-svn: 75975
|
2009-07-16 14:04:22 +00:00 |
|
Anton Korobeynikov
|
2fb805526a
|
Implement asmprinting for odd-even regpairs
llvm-svn: 75974
|
2009-07-16 14:04:01 +00:00 |
|
Anton Korobeynikov
|
0fd61ed25a
|
32-bit ri addressing mode has only 12-bit displacement
llvm-svn: 75973
|
2009-07-16 14:03:41 +00:00 |
|
Anton Korobeynikov
|
77a5da3f8f
|
Forgot to add
llvm-svn: 75972
|
2009-07-16 14:03:24 +00:00 |
|
Anton Korobeynikov
|
0be41e9cc1
|
Print signed imms properly
llvm-svn: 75970
|
2009-07-16 14:02:45 +00:00 |
|
Anton Korobeynikov
|
9ddb4978ed
|
Provide hooks for spilling / restoring stuff
llvm-svn: 75969
|
2009-07-16 14:01:27 +00:00 |
|
Anton Korobeynikov
|
7d9fd11d73
|
Revert thinko
llvm-svn: 75968
|
2009-07-16 14:01:10 +00:00 |
|
Anton Korobeynikov
|
2bdca8fa4c
|
Temporary workaround problem with signed 32-bit imm's
llvm-svn: 75967
|
2009-07-16 14:00:42 +00:00 |
|
Anton Korobeynikov
|
0ed25fd249
|
Implement InsertBranch() hook
llvm-svn: 75966
|
2009-07-16 14:00:10 +00:00 |
|
Anton Korobeynikov
|
484e1956df
|
Pipehole pattern for i32 imm's
llvm-svn: 75965
|
2009-07-16 13:59:49 +00:00 |
|
Anton Korobeynikov
|
dfc4f762b3
|
Bunch of sext_inreg patterns
llvm-svn: 75964
|
2009-07-16 13:59:18 +00:00 |
|
Anton Korobeynikov
|
1030c0611e
|
Provide normal 32 bit load and store
llvm-svn: 75963
|
2009-07-16 13:58:43 +00:00 |
|
Anton Korobeynikov
|
1e1f1a789b
|
Proper lower 'small' results
llvm-svn: 75962
|
2009-07-16 13:58:24 +00:00 |
|
Anton Korobeynikov
|
db9fb21b48
|
Completel forgot about unconditional branches
llvm-svn: 75961
|
2009-07-16 13:57:52 +00:00 |
|
Anton Korobeynikov
|
ce2b70586e
|
Lower addresses of globals
llvm-svn: 75960
|
2009-07-16 13:57:27 +00:00 |
|
Anton Korobeynikov
|
d984dc6c9d
|
Provide "wide" muls and divs/rems
llvm-svn: 75958
|
2009-07-16 13:56:42 +00:00 |
|
Anton Korobeynikov
|
6ad41d1540
|
Fix thinko
llvm-svn: 75957
|
2009-07-16 13:56:11 +00:00 |
|
Anton Korobeynikov
|
72a2743b16
|
Fix epic bug with invalid regclass for R0D
llvm-svn: 75956
|
2009-07-16 13:55:51 +00:00 |
|
Anton Korobeynikov
|
c4e9f407ae
|
More register pairs (now 32 bit ones)
llvm-svn: 75954
|
2009-07-16 13:55:04 +00:00 |
|
Anton Korobeynikov
|
ffea8dd106
|
Add even-odd register pairs
llvm-svn: 75953
|
2009-07-16 13:54:45 +00:00 |
|
Anton Korobeynikov
|
6a90c957dd
|
Unbreak due to mainline api change
llvm-svn: 75952
|
2009-07-16 13:54:20 +00:00 |
|
Anton Korobeynikov
|
c42f164135
|
Preliminary mul lowering
llvm-svn: 75951
|
2009-07-16 13:53:55 +00:00 |
|
Anton Korobeynikov
|
f93f6b0ed3
|
More extloads
llvm-svn: 75950
|
2009-07-16 13:53:35 +00:00 |
|
Anton Korobeynikov
|
e26fb377c5
|
SELECT_CC lowering
llvm-svn: 75948
|
2009-07-16 13:52:51 +00:00 |
|
Anton Korobeynikov
|
769a8c2312
|
Conditional branches and comparisons
llvm-svn: 75947
|
2009-07-16 13:52:31 +00:00 |
|
Anton Korobeynikov
|
3df5bd3b40
|
Emit correct offset for PseudoSourceValue
llvm-svn: 75946
|
2009-07-16 13:52:10 +00:00 |
|
Anton Korobeynikov
|
57bf9a3426
|
Provide proper stack offsets for outgoing arguments
llvm-svn: 75945
|
2009-07-16 13:51:53 +00:00 |
|
Anton Korobeynikov
|
4906b76843
|
Change register allocation order to reduce amount of callee-saved regs to be spilled.
llvm-svn: 75944
|
2009-07-16 13:51:34 +00:00 |
|
Anton Korobeynikov
|
b4a6f3c467
|
Emit callee-saved regs spills / restores
llvm-svn: 75943
|
2009-07-16 13:51:12 +00:00 |
|
Anton Korobeynikov
|
4fcadd1a7d
|
Some preliminary call lowering
llvm-svn: 75941
|
2009-07-16 13:50:21 +00:00 |
|
Anton Korobeynikov
|
f4257ba74e
|
Prologue / epilogue emission
llvm-svn: 75940
|
2009-07-16 13:49:49 +00:00 |
|
Anton Korobeynikov
|
dd60515f11
|
Add simple frame index elimination
llvm-svn: 75939
|
2009-07-16 13:49:25 +00:00 |
|
Anton Korobeynikov
|
6d15e5c657
|
Swap the order of imm and idx field for rri addrmode in order to make handling of rri and ri addrmodes common
llvm-svn: 75937
|
2009-07-16 13:48:42 +00:00 |
|
Anton Korobeynikov
|
c0374ea3e6
|
Do not truncate sign bits for negative imms
llvm-svn: 75936
|
2009-07-16 13:48:23 +00:00 |
|
Anton Korobeynikov
|
5e1fa67a23
|
Add address computation stuff
llvm-svn: 75935
|
2009-07-16 13:47:59 +00:00 |
|
Anton Korobeynikov
|
4409d9a464
|
Cleanup
llvm-svn: 75934
|
2009-07-16 13:47:36 +00:00 |
|
Anton Korobeynikov
|
47c086cc6b
|
Add mem-imm stores
llvm-svn: 75933
|
2009-07-16 13:47:14 +00:00 |
|
Anton Korobeynikov
|
370d19266f
|
[PATCH 023/155] Typo
llvm-svn: 75932
|
2009-07-16 13:45:22 +00:00 |
|
Anton Korobeynikov
|
b88da5c190
|
Add stores and truncstores
llvm-svn: 75931
|
2009-07-16 13:45:00 +00:00 |
|
Anton Korobeynikov
|
b262cec2d0
|
Add patterns for various extloads
llvm-svn: 75930
|
2009-07-16 13:44:30 +00:00 |
|
Anton Korobeynikov
|
58f9ca9055
|
Do some heroic rri address matching (shamelessly stolen from x86 backend). Not tested though.
llvm-svn: 75929
|
2009-07-16 13:44:00 +00:00 |
|
Anton Korobeynikov
|
ba9ee88377
|
Change register allocation order, so R0 will be allocated the last among scratch. This will make address-calculation code much more happy.
llvm-svn: 75928
|
2009-07-16 13:43:40 +00:00 |
|
Anton Korobeynikov
|
f080a4a0bd
|
Add shifts and reg-imm address matching
llvm-svn: 75927
|
2009-07-16 13:43:18 +00:00 |
|
Anton Korobeynikov
|
de69aad588
|
Add bunch of 32-bit patterns... Uffff :)
llvm-svn: 75926
|
2009-07-16 13:42:31 +00:00 |
|
Anton Korobeynikov
|
b902c71a90
|
Add 32 bit subregs
llvm-svn: 75923
|
2009-07-16 13:35:30 +00:00 |
|
Anton Korobeynikov
|
2f5b711ced
|
Add another bunch of reg-imm patterns for add/or/and/xor
llvm-svn: 75922
|
2009-07-16 13:35:08 +00:00 |
|
Anton Korobeynikov
|
f63382b52b
|
Add bunch of reg-imm movs
llvm-svn: 75921
|
2009-07-16 13:34:50 +00:00 |
|
Anton Korobeynikov
|
349c4f3410
|
Proper match halfword-imm operands for mov and add
llvm-svn: 75920
|
2009-07-16 13:34:24 +00:00 |
|
Anton Korobeynikov
|
dcc7d19ef3
|
Provide masked reg-imm 'or' and 'and'
llvm-svn: 75919
|
2009-07-16 13:33:57 +00:00 |
|
Anton Korobeynikov
|
c98835c743
|
Add reg-reg and pattern
llvm-svn: 75917
|
2009-07-16 13:32:49 +00:00 |
|
Anton Korobeynikov
|
2688d3c0a7
|
Add sub reg-reg pattern
llvm-svn: 75916
|
2009-07-16 13:32:16 +00:00 |
|
Anton Korobeynikov
|
2dd607fca7
|
Add xor reg-reg pattern
llvm-svn: 75915
|
2009-07-16 13:31:28 +00:00 |
|
Anton Korobeynikov
|
66b2612946
|
Add or reg-reg pattern.
llvm-svn: 75914
|
2009-07-16 13:30:53 +00:00 |
|
Anton Korobeynikov
|
ca9c5365ac
|
Add add reg-reg and reg-imm patterns
llvm-svn: 75913
|
2009-07-16 13:30:15 +00:00 |
|
Anton Korobeynikov
|
7b8aec2c40
|
Add simple reg-reg and reg-imm moves
llvm-svn: 75912
|
2009-07-16 13:29:38 +00:00 |
|
Anton Korobeynikov
|
7fe1d9c90e
|
Minimal lowering for formal_arguments / ret
llvm-svn: 75911
|
2009-07-16 13:28:59 +00:00 |
|
Anton Korobeynikov
|
8155f0cbaa
|
Let's start another backend :)
llvm-svn: 75909
|
2009-07-16 13:27:25 +00:00 |
|