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Commit Graph

162964 Commits

Author SHA1 Message Date
Sam Parker
becfd76f21 [IRCE] Only check for NSW on equality predicates
After investigation discussed in D45439, it would seem that the nsw
flag restriction is unnecessary in most cases. So the IsInductionVar
lambda has been removed, the functionality extracted, and now only
require nsw when using eq/ne predicates.

Differential Revision: https://reviews.llvm.org/D45617

llvm-svn: 330256
2018-04-18 13:50:28 +00:00
Simon Pilgrim
6133119928 [llvm-exegesis] Pull out LLVMTargetMachine to simplify debugging. NFCI.
Has been useful while trying to get around all the error reporting issues mentioned on PR37049.

llvm-svn: 330255
2018-04-18 13:39:03 +00:00
Momchil Velikov
128a6355b2 Add tests for shrink wrapping and VLAs
Differential revision: https://reviews.llvm.org/D45727

llvm-svn: 330253
2018-04-18 13:37:12 +00:00
Teresa Johnson
cd597a41f0 [gold] Add support for optimization remarks
Summary:
Adds support for LTO opt remarks (optionally with hotness) to
gold-plugin.

Reviewers: anemet

Subscribers: fhahn, mehdi_amini, llvm-commits

Differential Revision: https://reviews.llvm.org/D45752

llvm-svn: 330252
2018-04-18 13:25:23 +00:00
Pavel Labath
95b9d71eef [cmake] Improve pthread_[gs]etname_np detection code
Summary:
Due to some android peculiarities, in some build configurations
(statically linked executables targeting older releases) we could detect
the presence of these functions (because they are present in libc.a,
where check_library_exists searches), but then fail to build because the
headers did not include the definition.

This attempts to remedy that by upgrading the check_library_exists to
check_symbol_exists, which will check that the function is declared too.

I am hoping that a more thorough check will make the messy #ifdef we
have accumulated in the code obsolete, so I optimistically try to remove
them.

Reviewers: zturner, kparzysz, danalbert

Subscribers: srhines, mgorny, krytarowski, llvm-commits

Differential Revision: https://reviews.llvm.org/D45359

llvm-svn: 330251
2018-04-18 13:13:27 +00:00
Florian Hahn
8d76ff9dd3 [LoopUnroll] Only peel if a predicate becomes known in the loop body.
If a predicate does not become known after peeling, peeling is unlikely
to be beneficial.

Reviewers: mcrosier, efriedma, mkazantsev, junbuml

Reviewed By: mkazantsev

Differential Revision: https://reviews.llvm.org/D44983

llvm-svn: 330250
2018-04-18 12:29:24 +00:00
Pavel Labath
489385f0e3 [CodeGen/Dwarf] Make debug_names compatible with split-dwarf
Summary:
Previously we crashed for the combination of the two features because we
tried to reference the dwo CU from the main object file. The fix
consists of two items:
- reference the skeleton CU from the name index (the consumer is
  expected to use the skeleton CU to find the real data).
- use the main object file string pool for the strings in the index

Reviewers: JDevlieghere, aprantl, dblaikie

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45566

llvm-svn: 330249
2018-04-18 12:11:59 +00:00
Greg Bedwell
9dc124e019 [UpdateTestChecks] Add update_mca_test_checks.py script
This script can be used to regenerate tests in the
test/tools/llvm-mca directory (PR36904).

Regenerated a number of tests using the pattern: test/tools/llvm-mca/*/*/*.s

Differential Revision: https://reviews.llvm.org/D45369

llvm-svn: 330246
2018-04-18 10:27:45 +00:00
Bjorn Pettersson
348b96dc3b [DebugInfo] Sink related dbg users when sinking in InstCombine
Summary:
When sinking an instruction in InstCombine we now also sink
the DbgInfoIntrinsics that are using the sunken value.

Example)

When sinking the load in this input

bb.X:
  %0 = load i64, i64* %start, align 4, !dbg !31
  tail call void @llvm.dbg.value(metadata i64 %0, ...)
  br i1 %cond, label %for.end, label %for.body.lr.ph
for.body.lr.ph:
  br label %for.body

we now also move the dbg.value, like this

bb.X:
  br i1 %cond, label %for.end, label %for.body.lr.ph
for.body.lr.ph:
  %0 = load i64, i64* %start, align 4, !dbg !31
  tail call void @llvm.dbg.value(metadata i64 %0, ...)
  br label %for.body

In the past we haven't moved the dbg.value so we got

bb.X:
  tail call void @llvm.dbg.value(metadata i64 %0, ...)
  br i1 %cond, label %for.end, label %for.body.lr.ph
for.body.lr.ph:
  %0 = load i64, i64* %start, align 4, !dbg !31
  br label %for.body


So in the past we got a debug-use before the def of %0.
And that dbg.value was also on the path jumping to %for.end, for
which %0 never was defined.

CodeGenPrepare normally comes to rescue later (when not moving
the dbg.value), since it moves dbg.value instrinsics quite
brutally, without really analysing if it is correct to move
the intrinsic (see PR31878).
So at the moment this patch isn't expected to have much impact,
besides that it is moving the dbg.value already in opt, making
the IR look more sane directly.

This can be seen as a preparation to (hopefully) make it possible
to turn off CodeGenPrepare::placeDbgValues later as a solution
to PR31878.

I also adjusted test/DebugInfo/X86/sdagsplit-1.ll to make the
IR in the test case up-to-date with this behavior in InstCombine.

Reviewers: rnk, vsk, aprantl

Reviewed By: vsk, aprantl

Subscribers: mattd, JDevlieghere, llvm-commits

Tags: #debug-info

Differential Revision: https://reviews.llvm.org/D45425

llvm-svn: 330243
2018-04-18 08:08:04 +00:00
Matt Davis
25f408b0db [NFC] Remove doxygen brief tag from BasicBlock.h
Summary: Documentation is built using the AutoBrief configuration option in docs/doxygen.cfg.in.  This change removes the redundant brief tags from BasicBlock.h.   I'm happy to write a sed script and remove all \brief tags as a separate commit later.

Reviewers: aprantl

Reviewed By: aprantl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45708

llvm-svn: 330242
2018-04-18 07:58:45 +00:00
Craig Topper
b90ee34811 [X86][Broadwell] Remove some unnecessary InstRW overrides and add some FIXMEs.
llvm-svn: 330241
2018-04-18 06:41:25 +00:00
Craig Topper
1b0d6e20c1 [X86] Give CMOV 2 cycle latency on SLM.
llvm-svn: 330239
2018-04-18 06:04:30 +00:00
Craig Topper
a3607c3fc1 [X86] Don't crash on bad operand modifiers in inline assembly
Summary: Previously if a modifer was placed on a non-GPR register class we would hit an assert or crash.

Reviewers: echristo

Reviewed By: echristo

Subscribers: eraman, llvm-commits

Differential Revision: https://reviews.llvm.org/D45751

llvm-svn: 330238
2018-04-18 05:15:24 +00:00
Sanjay Patel
f5a2032ee8 [InstCombine] peek through bitcasted vector/array pointer GEP operand
The bitcast may be interfering with other combines or vectorization 
as shown in PR16739:
https://bugs.llvm.org/show_bug.cgi?id=16739

Most pointer-related optimizations are probably able to look through 
this bitcast, but removing the bitcast shrinks the IR, so it's at
least a size savings.

Differential Revision: https://reviews.llvm.org/D44833

llvm-svn: 330237
2018-04-18 00:36:40 +00:00
Bob Haarman
f215d6d79f Fix lock order inversion between ManagedStatic and Statistic
Summary:
Statistic and ManagedStatic both use mutexes. There was a lock order
inversion where, during initialization, Statistic's mutex would be
held while taking ManagedStatic's, and in llvm_shutdown,
ManagedStatic's mutex would be held while taking Statistic's
mutex. This change causes Statistic's initialization code to avoid
holding its mutex while calling ManagedStatic's methods, avoiding the
inversion.

Reviewers: dsanders, rtereshin

Reviewed By: dsanders

Subscribers: hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D45398

llvm-svn: 330236
2018-04-17 23:37:18 +00:00
Stanislav Mekhanoshin
3c906070f5 [AMDGPU] Enabled v2.16 literals for VOP3P
Literal encoding needs op_sel_hi to select low 16 bit in this case.

Differential Revision: https://reviews.llvm.org/D45745

llvm-svn: 330230
2018-04-17 23:09:05 +00:00
Vedant Kumar
1bdfe2db7c [Mem2Reg] Create merged debug locations for inserted phis
Track the debug locations of the incoming values to newly-created phis,
and apply merged debug locations to the phis.

A merged location will be on line 0, but will have the correct scope
set. This improves crash reporting when an inlined instruction with a
merged location triggers a machine exception. A debugger will be able to
narrow down the crash to the correct inlined scope, instead of simply
pointing to the outer scope of the caller.

Taken together with a change allows generating merged line-0 locations
for  instructions which aren't calls, this results in a 0.5% increase in
the uncompressed size of the .debug_line section of a stage2+Release
build of clang (-O3 -g).

rdar://33858697

Differential Revision: https://reviews.llvm.org/D45397

llvm-svn: 330227
2018-04-17 22:03:08 +00:00
Vedant Kumar
0fc6c6248c [Mem2Reg] Make RenamePassData a struct, NFC
llvm-svn: 330226
2018-04-17 22:03:07 +00:00
Alex Bradbury
00d29ca310 [RISCV] implement li pseudo instruction
The implementation follows the MIPS backend and expands the
pseudo instruction directly during asm parsing. As the result, only
real MC instructions are emitted to the MCStreamer. Additionally,
PseudoLI instructions are emitted during codegen. The actual
expansion to real instructions is performed during MI to MC lowering
and is similar to the expansion performed by the GNU Assembler.

Differential Revision: https://reviews.llvm.org/D41949
Patch by Mario Werner.

llvm-svn: 330224
2018-04-17 21:56:40 +00:00
Peter Collingbourne
7358280f10 llvm-pdbutil: Fix an off-by-one error.
Differential Revision: https://reviews.llvm.org/D45740

llvm-svn: 330222
2018-04-17 21:44:17 +00:00
Stanislav Mekhanoshin
60af27c1a3 LoadStoreVectorizer crashes due to unsized type
When we skip bitcasts while looking for GEP in LoadSoreVectorizer
we should also verify that the type is sized otherwise we assert

Differential Revision: https://reviews.llvm.org/D45709

llvm-svn: 330221
2018-04-17 21:40:04 +00:00
Keith Wyss
2c7eab97b2 [XRay] Typed event logging intrinsic
Summary:
Add an LLVM intrinsic for type discriminated event logging with XRay.
Similar to the existing intrinsic for custom events, but also accepts
a type tag argument to allow plugins to be aware of different types
and semantically interpret logged events they know about without
choking on those they don't.

Relies on a symbol defined in compiler-rt patch D43668. I may wait
to submit before I can see demo everything working together including
a still to come clang patch.

Reviewers: dberris, pelikan, eizan, rSerge, timshen

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45633

llvm-svn: 330219
2018-04-17 21:30:29 +00:00
Heejin Ahn
40181ae718 [WebAssembly] Add an assertion for an invalid CFG
Summary:
It was not easy to provide a test case for D45648 (rL330079) because the bug
didn't manifest itself in the set of currently valid IRs. Added an assertion to
check this faster, thanks to @dblaikie's suggestion.

Reviewers: dblaikie

Subscribers: jfb, dschuff, sbc100, jgravelle-google, llvm-commits, dblaikie

Differential Revision: https://reviews.llvm.org/D45711

llvm-svn: 330217
2018-04-17 21:19:21 +00:00
Rui Ueyama
24ff4ab6df Rename sys::Process::GetArgumentVector -> sys::windows::GetCommandLineArguments
GetArgumentVector (or GetCommandLineArguments) is very Windows-specific.
I think it doesn't make much sense to provide that function from sys::Process.

I also made a change so that the function takes a BumpPtrAllocator
instead of a SpecificBumpPtrAllocator. The latter is the class to call
dtors, but since char * is trivially destructible, we should use the
former class.

Differential Revision: https://reviews.llvm.org/D45641

llvm-svn: 330216
2018-04-17 21:09:16 +00:00
Dan Gohman
e85c5fc4d6 [WebAssembly] Teach fast-isel to gracefully recover from illegal return types.
Fixes PR36564.

llvm-svn: 330215
2018-04-17 20:46:42 +00:00
Zachary Turner
45f2d9aed0 [llvm-pdbutil] Dump first section contribution for each module.
The DBI stream contains a list of module descriptors.  At the
beginning of each descriptor is a structure representing the first
section contribution in the output file for that module.  LLD
currently doesn't fill out this structure at all, but link.exe
does.  So as a precursor to emitting this data in LLD, we first
need a way to dump it so that it can be checked.

This patch adds support for the dumping, and verifies via a test
that LLD emits bogus information.

llvm-svn: 330208
2018-04-17 20:06:43 +00:00
Craig Topper
8cc3b6fad0 [X86] Add separate scheduling class for PSADBW instruction.
llvm-svn: 330204
2018-04-17 19:35:19 +00:00
Craig Topper
394b0de181 [X86] Remove unnecessary InstRW overrides. Add somes FIXMEs/TODOs.
llvm-svn: 330203
2018-04-17 19:35:14 +00:00
Craig Topper
5f9e4c5a37 [X86] Remove -mcpu=skx/knl from some tests and use -mattr instead.
mcpu exposes other tuning flags. These tests are only trying to test instruction set features so it is better to use mattr.

llvm-svn: 330196
2018-04-17 17:30:06 +00:00
Momchil Velikov
eb51d8fea5 Revert "Fix incorrect choice of callee-saved registers save/restore points (take 2)"
Revert in order to fix the test to not run when required targets aren't
configured.

llvm-svn: 330193
2018-04-17 16:29:58 +00:00
Momchil Velikov
8a12ad3112 Fix incorrect choice of callee-saved registers save/restore points (take 2)
Add the accidentally omitted testcase.

Differential revision: https://reviews.llvm.org/D45524

llvm-svn: 330192
2018-04-17 15:59:06 +00:00
Krzysztof Parzyszek
713a9c7a51 [Hexagon] Do not merge initializers for stack and non-stack expressions
Stack addressing needs addressing modes that provide an offset field
immediately following the frame index. An initializer from a non-stack
addressing could force the stack address to use a form that does not
provide an offset field.

llvm-svn: 330191
2018-04-17 15:23:09 +00:00
whitequark
15e1955275 [LLVM-C] [PR34633] Avoid calling ->dump() methods from LLVMDump*.
LLVMDump* functions are available in Release builds too.

Patch by Brenton Bostick.

Differential Revision: https://reviews.llvm.org/D44600

llvm-svn: 330189
2018-04-17 14:52:43 +00:00
Nemanja Ivanovic
8a8b34bbc9 [PowerPC] Mark the BDNZ intrinsic as NoDuplicate
Duplicating this intrinsic is not generally valid because it has the side-effect
of decrementing the CTR. Any passes that duplicate it would need to be taught to
keep the regions formed completely disjoint.
This patch should be NFC for typical uses as CTRLoops runs after the remaining
loop passes. It only affects situations where the loop passes are scheduled on
the IR after the codegen passes (as is the case with some JIT pipelines).

Fixes https://bugs.llvm.org/show_bug.cgi?id=37050

llvm-svn: 330186
2018-04-17 13:07:01 +00:00
Momchil Velikov
1c20c93ec5 Fix incorrect choice of callee-saved registers save/restore points
Make the shrink wrapping pass pay attention to uses/defs of the stack pointer.

Differential revision: https://reviews.llvm.org/D45524

llvm-svn: 330183
2018-04-17 08:37:38 +00:00
Michael Zolotukhin
3079a9f2ee Revert "Reapply "[PR16756] Use SSAUpdaterBulk in JumpThreading." again."
This reverts r330175. There are still stage3/stage4 miscompares.

llvm-svn: 330180
2018-04-17 07:31:27 +00:00
Simon Pilgrim
8ae32b4f07 [X86] Add FP comparison scheduler classes
Split VCMP/VMAX/VMIN instructions off to WriteFCmp and VCOMIS instructions off to WriteFCom instead of assuming they match WriteFAdd

Differential Revision: https://reviews.llvm.org/D45656

llvm-svn: 330179
2018-04-17 07:22:44 +00:00
Gerolf Hoflehner
d6a6778f3e [DAGCombiner] Fix for oss-fuzz bug
llvm-svn: 330178
2018-04-17 07:22:34 +00:00
Michael Zolotukhin
898f9d2ca8 [SSAUpdaterBulk] Add debug logging.
llvm-svn: 330176
2018-04-17 04:45:40 +00:00
Michael Zolotukhin
cd41fb1e7f Reapply "[PR16756] Use SSAUpdaterBulk in JumpThreading." again.
One more, hopefully the last, bug is fixed: when forming UsesToRewrite
we should ignore phi operands coming from edges that we want to delete.

This reverts r329910.

llvm-svn: 330175
2018-04-17 04:45:22 +00:00
Gerolf Hoflehner
9f57c649e7 [IR] Upgrade comment token in objc retain release marker for asm call
Older compiler issued '#' instead of ';'

llvm-svn: 330173
2018-04-17 04:02:24 +00:00
Peter Collingbourne
3cf02eb4eb COFF: Make SectionChunk::Relocs field an ArrayRef. NFCI.
Differential Revision: https://reviews.llvm.org/D45714

llvm-svn: 330172
2018-04-17 01:54:34 +00:00
whitequark
dbe3225739 CODE_OWNERS: Take ownership of C API.
llvm-svn: 330171
2018-04-17 01:09:12 +00:00
Roman Tereshin
af03233d9a [DebugInfo] Follow-up bug fix on "Fixing a couple of DI duplication bugs of CloneModule"
Apparently, DebugInfoFinder::processCompileUnit doesn't process all
of the possible kinds of DIImportedEntit'ies, e.g. DIGlobalVariable's.

Previously introduced `llvm_unreachable` is therefore incorrect.
Removing it here.

llvm-svn: 330167
2018-04-16 23:39:44 +00:00
Saleem Abdulrasool
d583a0f050 Revert "build: reserve --color-diagnostics for lld"
This reverts SVN r330158.

Seems that there was a change to linker flags handling in SVN r316972.
That would alter the behaviour to correct the linker flag handling in
CMake (requiring CMake 3.4.3+).  Since that is already the minimum
version required for LLVM, hard coding the knowledge of the linker is
not required, which is a strictly better solution.

llvm-svn: 330161
2018-04-16 21:57:10 +00:00
Saleem Abdulrasool
1511d68d24 build: reserve --color-diagnostics for lld
When building out-of-tree compilers (e.g. swift), the linker check here
may yield incorrect values.  Ensure that we are using lld before we
attempt to use `--color-diagnostics` for the linker.  Other linkers (i.e
bfd, gold) do not support this flag and the test can pass in some cases
and then fail subsequently when building.

llvm-svn: 330158
2018-04-16 21:05:56 +00:00
Zachary Turner
d4bde9b53a [PDB] Correctly use the target machine when writing DBI stream.
Using Config->is64() will treat ARM64 as Amd64, which is incorrect.
Furthermore, there are more esoteric architectures that could
theoretically be encountered.  Just set it directly to the machine
type, which we already know anyway.

llvm-svn: 330157
2018-04-16 20:42:06 +00:00
Mandeep Singh Grang
4a217547b7 [RISCV] Fix assert message operator
Summary:
Specifying assert message with an || operator makes the compiler interpret it
 as a bool. Changed it to &&.

Reviewers: asb, apazos

Reviewed By: asb

Subscribers: rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, llvm-commits

Differential Revision: https://reviews.llvm.org/D45660

llvm-svn: 330148
2018-04-16 18:56:10 +00:00
Zachary Turner
aff599c919 Resubmit "Fix some incorrect fields in our generated PDBs."
This fixes the failing tests.  They simply hadn't been updated
to match the new output resulting from this patch.

llvm-svn: 330145
2018-04-16 18:17:13 +00:00
Craig Topper
c0dcee6b0c [X86] Remove unnecessary -mattr to enable avx512bw when the -mcpu already enabled it. NFC
This makes the test similar to the arith-sub.ll and arith-mul.ll tests.

llvm-svn: 330144
2018-04-16 18:14:19 +00:00