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Commit Graph

72275 Commits

Author SHA1 Message Date
Rafael Espindola
c03bb178a0 Misc code refactorings:
* Remove unnecessary arguments now that ForceExpAbs is a method.
* Use ForceExpAbs in EmitAbsValue.

llvm-svn: 131683
2011-05-19 21:40:34 +00:00
Eric Christopher
74a9e350d2 Oddly people want to use the 'r' constraint for fp constants on x86.
Fixes rdar://9218925
Fixes PR9601

llvm-svn: 131682
2011-05-19 21:33:47 +00:00
Charles Davis
300a470f45 Implement the EndProlog Win64 EH method on the base MCStreamer.
llvm-svn: 131679
2011-05-19 21:24:54 +00:00
Cameron Zwarich
e876d96b4e Fix PR9947 by placing OPFL_MemRefs on the node using memory operands rather than
the root if there is only one such node. This leaves only 2 verifier failures in
the entire test suite when running "make check".

llvm-svn: 131677
2011-05-19 21:13:30 +00:00
Eli Friedman
97fda21a43 Fix up this test to use explicit triples (Win64 passes a different number of arguments in registers).
llvm-svn: 131676
2011-05-19 21:13:08 +00:00
Jason W Kim
93cb3f967d This fixes one divergence between LLVM and binutils for ARM in the
text section.

Assume the following bit of annotated assembly:

.section	.data.rel.ro,"aw",%progbits
.align	2
.LAlpha:
.long	startval(GOTOFF)

.text
.align	2
.type	main,%function
.align	4

main: ;;; assume "main" starts at offset 0x20
0x0	push	{r11, lr}
0x4	movw	r0, :lower16:(.LAlpha-(.LBeta+8))
;;; ==> (.AddrOf(.LAlpha) - ((.AddrOf(.LBeta) - .AddrOf(".")) + 8)
;;; ==> (??? - ((16-4) + 8) = -20
0x8	movt	r0, :upper16:(.LAlpha-(.LBeta+8))
;;; ==> (.AddrOf(.LAlpha) - ((.AddrOf(.LBeta) - .AddrOf(".")) + 8)
;;; ==> (??? - ((16-8) + 8) = -16
0xc	... blah

.LBeta:
0x10	add	r0, pc, r0
0x14	... blah

.LGamma:
0x18	add	r1, pc, r1

Above snippet results in the following relocs in the .o file for the
first pair of movw/movt instructions

00000024 R_ARM_MOVW_PREL_NC .LAlpha
00000028 R_ARM_MOVT_PREL .LAlpha

And the encoded instructions in the .o file for main: must be

00000020 <main>:
20:	e92d4800 push	{fp, lr}
24:	e30f0fec movw	r0, #65516	; 0xffec i.e. -20
28:	e34f0ff0 movt	r0, #65520	; 0xfff0 i.e. -16

However, llc (prior to this commit) generates the following sequence

00000020 <main>:
20:	e92d4800 push	{fp, lr}
24:	e30f0fec movw	r0, #65516	; 0xffec - i.e. -20
28:	e34f0fff movt	r0, #65535	; 0xffff - i.e. -1

What has to happen in the ArmAsmBackend is that if the relocation is PC
relative, the 16 bits encoded as part of movw and movt must be both addends,
not addresses. It makes sense to encode addresses by right shifting the value
by 16, but the result is incorrect for PIC.
i.e., the right shift by 16 for movt is ONLY valid for the NON-PCRel case.

This change agrees with what GNU as does, and makes the PIC code run.

MC/ARM/elf-movt.s covers this case.

llvm-svn: 131674
2011-05-19 20:55:25 +00:00
Devang Patel
8d9eb3b0f7 Reapply r131605. This time with a fix, which is to use NoFolder.
llvm-svn: 131673
2011-05-19 20:52:46 +00:00
Rafael Espindola
826d41a144 ADD64ri32 sign extends its argument, so we need to use a R_X86_64_32S.
Fixes PR9934.

We really need to start tblgening the relocation info :-(

llvm-svn: 131669
2011-05-19 20:32:34 +00:00
Akira Hatanaka
669a518bab Align i64 arguments to 64 bit boundaries.
llvm-svn: 131668
2011-05-19 20:29:48 +00:00
Charles Davis
925eab3fd7 Implement the Win64 EH prolog instruction methods on the base MCStreamer.
I had to change the API slightly to avoid overloading issues.

llvm-svn: 131666
2011-05-19 19:35:55 +00:00
Eli Friedman
1cbb521f21 Fix up the new StandardPasses to run the same scalarrepl passes as the old one.
llvm-svn: 131665
2011-05-19 19:14:54 +00:00
Evan Cheng
efcc06b08f crc32 with 64-bit output zeros upper 32-bits. rdar://9467055
llvm-svn: 131664
2011-05-19 18:57:12 +00:00
Stuart Hastings
a68d5a99c0 Update some currently-disabled code, preparing for eventual use.
llvm-svn: 131663
2011-05-19 18:48:20 +00:00
Akira Hatanaka
0ed99ae9e9 Increase number of available registers when target is MIPS32.
llvm-svn: 131660
2011-05-19 18:25:03 +00:00
Evan Cheng
113ac155c6 Add comment.
llvm-svn: 131659
2011-05-19 18:18:39 +00:00
Akira Hatanaka
adf693ba31 Simplify CC_MipsO32 and merge it with CC_MipsO32_VarArgs. Patch by Sasa Stankovic.
llvm-svn: 131657
2011-05-19 18:06:05 +00:00
Joerg Sonnenberger
5efd18ca60 Reapply 131644 including the missing header changes:
Introduce -fatal-assembler-warnings for the obvious purpose

llvm-svn: 131655
2011-05-19 18:00:13 +00:00
Stuart Hastings
ff15dfa12e Reverting 131641 to investigate 'bot complaint.
llvm-svn: 131654
2011-05-19 17:54:42 +00:00
Eli Friedman
8cb4a78596 Revert r131644; it's breaking the build.
llvm-svn: 131653
2011-05-19 17:48:09 +00:00
Charles Davis
bb99a68546 Turns out GAS does have Win64 EH directives. (It also supports WinCE EH.) Make
ours compatible with GAS.

In retrospect, I should have emailed binutils about this earlier. Thanks to
Kai Tietz for pointing out that GAS already had SEH directives.

llvm-svn: 131652
2011-05-19 17:46:39 +00:00
Jim Grosbach
db1450056a 80 columns.
llvm-svn: 131649
2011-05-19 17:34:53 +00:00
Joerg Sonnenberger
951d2761f6 Introduce -fatal-assembler-warnings for the obvious purpose
llvm-svn: 131644
2011-05-19 17:27:01 +00:00
Akira Hatanaka
fb42792a55 Fix data layout string. i64 is aligned to 64 bit boundaries.
llvm-svn: 131642
2011-05-19 17:21:09 +00:00
Stuart Hastings
7baa1babdb Revise MOVSX16rr8/MOVZX16rr8 (and rm variants) to no longer be
pseudos.  rdar://problem/8614450

llvm-svn: 131641
2011-05-19 16:59:50 +00:00
Stuart Hastings
b524e73afc Move test to Transforms/InstCombine.
llvm-svn: 131634
2011-05-19 05:53:22 +00:00
Cameron Zwarich
0b52f1e647 Use the correct register class for Cell varargs spilling. This fixes all of the
verifier failures in the CodeGen/CellSPU tests.

llvm-svn: 131631
2011-05-19 04:44:19 +00:00
Mon P Wang
9c138e7a7d Fixed sdiv and udiv for <4 x i16>. The test from r125402 still applies for this change.
llvm-svn: 131630
2011-05-19 04:15:07 +00:00
Charles Davis
e6942fd10b Implement the StartChained and EndChained Win64 EH methods on MCStreamer.
llvm-svn: 131629
2011-05-19 04:04:13 +00:00
Cameron Zwarich
fa285d651f Make CodeGen/PowerPC/2007-09-11-RegCoalescerAssert.ll pass with the verifier.
llvm-svn: 131627
2011-05-19 03:11:06 +00:00
Cameron Zwarich
b5755a9dc2 Fix PR8828 by removing the explicit def in MovePCToLR as well as the pointless
piclabel operand. The operand in the tablegen definition doesn't actually turn
into an MI operand, so it just confuses anything checking the TargetInstrDesc
for the number of operands. It suffices to just have an implicit def of LR.

llvm-svn: 131626
2011-05-19 02:56:28 +00:00
Cameron Zwarich
860c52b752 Reuse the TargetInstrDesc.
llvm-svn: 131625
2011-05-19 02:56:23 +00:00
Francois Pichet
8c22442446 Fix the MSVC build.
Use a set of overloaded functions instead of template function for CreatePassFn.

It seems that template deduction for functions type that differs only by return type doesn't work with MSVC. 

llvm-svn: 131624
2011-05-19 02:54:11 +00:00
Charles Davis
2940df3099 Implement the StartProc and EndProc Win64 EH methods on the base MCStreamer.
Based largely on Rafael Espindola's work on CFI. Other methods soon to follow.

llvm-svn: 131623
2011-05-19 02:49:00 +00:00
Charles Davis
ce8694c82b Fix build issues with headers, which I discovered by actually using them.
Also, convert all the inline functions on UnwindInfo into methods.

llvm-svn: 131622
2011-05-19 02:47:23 +00:00
Rafael Espindola
9f16f89781 Add test for PR9946.
llvm-svn: 131621
2011-05-19 02:35:26 +00:00
Rafael Espindola
4ebe940cd4 revert 131605 to fix PR9946.
llvm-svn: 131620
2011-05-19 02:26:30 +00:00
Cameron Zwarich
eadbf0c427 Correctly constrain a register class when computing frame offsets, as the Thumb2
add instruction takes an rGPR. This fixes the last of PR8825.

llvm-svn: 131619
2011-05-19 02:18:27 +00:00
Cameron Zwarich
6fbc514611 Revert r128961 because it didn't include a test and causes the verifier to fail
on CodeGen/X86/2007-05-07-InvokeSRet.ll. There is probably a bug here that was
fixed by r128961, but since there is no test or reference to a source file I have
to revert it.

llvm-svn: 131618
2011-05-19 01:56:19 +00:00
Eli Friedman
9f62600eb7 Make the demanded bits/elements optimizations preserve debug line information.
I'm not sure this is quite ideal, but I can't really think of any better way to do it.

llvm-svn: 131616
2011-05-19 01:20:42 +00:00
Jim Grosbach
02bb9abfb3 Avoid a Twine that referenced a tmp (which proceded to go out of scope before
the Twine was used).

llvm-svn: 131612
2011-05-19 00:45:05 +00:00
Devang Patel
c5390e2f7f Use IRBuilder.
llvm-svn: 131609
2011-05-19 00:13:33 +00:00
Rafael Espindola
175cee362f Another try at fixing cmake.
llvm-svn: 131608
2011-05-19 00:13:04 +00:00
Devang Patel
ecb22f0544 Use IRBuilder while simplifying unreachable.
llvm-svn: 131607
2011-05-19 00:09:21 +00:00
Rafael Espindola
0a9911d920 Revert my previous patch. The cmake build had already been fixed.
llvm-svn: 131606
2011-05-19 00:02:45 +00:00
Devang Patel
fa6d0b4f84 Use IRBuilder while simplifying conditional branch.
llvm-svn: 131605
2011-05-18 23:59:51 +00:00
Eli Friedman
40a0353b96 More instcombine cleanup, towards improving debug line info.
llvm-svn: 131604
2011-05-18 23:58:37 +00:00
Jim Grosbach
35c032eb5e Restore sanity to 131601.
llvm-svn: 131603
2011-05-18 23:56:43 +00:00
Rafael Espindola
587fa89510 Fix the cmake build.
llvm-svn: 131602
2011-05-18 23:56:40 +00:00
Jim Grosbach
e8791ab417 Objective C functions may use a magic '\1' on the name. Handle that when
dealing with them in the MCJIT.

llvm-svn: 131601
2011-05-18 23:53:21 +00:00
Eli Friedman
98235fd498 Shuffle StandardPasses.cpp into VMCore; add it to CMake.
llvm-svn: 131600
2011-05-18 23:51:11 +00:00