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Author SHA1 Message Date
Dale Johannesen
574bb5e1e2 Expand removal of MMX memory copies to allow 1 level 
of TokenFactor underneath chain (seems to be enough)

llvm-svn: 47554
 2008-02-25 19:20:14 +00:00
Dan Gohman
4f288e3298 Add a new method to SDNode/SDOperand named getValueSizeInBits 
that combines getValueType and MVT::getSizeInBits, since this
occurrs frequently.

llvm-svn: 47552
 2008-02-25 19:08:02 +00:00
Duncan Sands
440b8ac3a0 In debug builds check that the key property holds: all 
result and operand types are legal.

llvm-svn: 47546
 2008-02-25 16:21:21 +00:00
Evan Cheng
fc540545f1 Correctly determine whether a argument load can be folded into its uses. 
llvm-svn: 47545
 2008-02-25 08:50:41 +00:00
Owen Anderson
6eafd532ab Fix an issue where GVN was performing the return slot optimization when it was 
not safe.  This is fixed by more aggressively checking that the return slot is
not used elsewhere in the function.

llvm-svn: 47544
 2008-02-25 04:08:09 +00:00
Evan Cheng
e283043860 Temporarily reverting 46959. 
llvm-svn: 47542
 2008-02-25 03:57:32 +00:00
Owen Anderson
432abc0479 Fix an issue where GVN would try to use an instruction before its definition when performing return slot optimization. 
llvm-svn: 47541
 2008-02-25 00:40:41 +00:00
Duncan Sands
2cdf47bdf7 Add support to LegalizeTypes for building legal vectors 
out of illegal elements (BUILD_VECTOR).  Uses and beefs
up BUILD_PAIR, though it didn't really have to.  Like
most of LegalizeTypes, does not support soft-float.
This cures all "make check" vector building failures.

llvm-svn: 47537
 2008-02-24 07:36:03 +00:00
Bill Wendling
a369a6add8 Some platforms use the same name for 32-bit and 64-bit registers (like 
%r3 on PPC) in their ASM files. However, it's hard for humans to read
during debugging. Adding a new field to the register data that lets you
specify a different name to be printed than the one that goes into the
ASM file -- %x3 instead of %r3, for instance.

llvm-svn: 47534
 2008-02-24 00:56:13 +00:00
Evan Cheng
654983ba21 Backing out r47521 for now. This has broken a number of tests. 
llvm-svn: 47533
 2008-02-23 19:32:32 +00:00
Scott Michel
36bbc39272 Merge current work back to tree to minimize diffs and drift. Major highlights 
for CellSPU modifications:

- SPUInstrInfo.td refactoring: "multiclass" really is _your_ friend.
- Other improvements based on refactoring effort in SPUISelLowering.cpp,
  esp. in SPUISelLowering::PerformDAGCombine(), where zero amount shifts and
  rotates are now eliminiated, other scalar-to-vector-to-scalar silliness
  is also eliminated.
- 64-bit operations are being implemented, _muldi3.c gcc runtime now
  compiles and generates the right code. More work still needs to be done.

llvm-svn: 47532
 2008-02-23 18:41:37 +00:00
Zhou Sheng
5f4e29db89 Testcase for Revision 47478. 
llvm-svn: 47531
 2008-02-23 10:59:51 +00:00
Evan Cheng
d299f09bc5 Rematerialization logic was overly conservative when it comes to loads from fixed stack slots. 
llvm-svn: 47529
 2008-02-23 03:38:34 +00:00
Evan Cheng
6782480bd1 Update test. 
llvm-svn: 47527
 2008-02-23 02:57:25 +00:00
Evan Cheng
2de70b3ff8 If remating a machine instr with virtual register operand, make sure the vr is avaliable at all uses regardless of whether it would be folded. 
llvm-svn: 47526
 2008-02-23 02:14:42 +00:00
Evan Cheng
4e9d5f1ead Remat of pic loads are now on by default. 
llvm-svn: 47525
 2008-02-23 02:08:30 +00:00
Evan Cheng
d3e9e78aa0 Turning on remat of pic loads. 
llvm-svn: 47524
 2008-02-23 02:07:42 +00:00
Dan Gohman
8d536a33ff Fix a bug that caused opt and other tools to silently ignore 
invalid command-line options.

llvm-svn: 47523
 2008-02-23 01:55:25 +00:00
Evan Cheng
97ca29e99a No need recognize load from a fixed argument slot as re-materializable. LiveIntervalAnalysis already handles it as a special case. 
llvm-svn: 47522
 2008-02-23 01:47:44 +00:00
Devang Patel
4995a89a8d Properly read and write bitcodes for multiple return values. 
llvm-svn: 47521
 2008-02-23 01:44:55 +00:00
Evan Cheng
95d3cb841d Recognize loads of arguments as re-materializable first. Therefore if isReallyTriviallyReMaterializable() returns true it doesn't confuse it as a "normal" re-materializable instruction. 
llvm-svn: 47520
 2008-02-23 01:44:27 +00:00
Devang Patel
ac2ec94778 Regenerate. 
llvm-svn: 47519
 2008-02-23 01:17:37 +00:00
Devang Patel
56d28d9fe3 Use isa check instead of getTypeID() check. 
llvm-svn: 47518
 2008-02-23 01:17:17 +00:00
Ted Kremenek
bf1814f91f Fixed buffer overflow reported by Argiris Kirtzidis. 
llvm-svn: 47517
 2008-02-23 01:11:40 +00:00
Devang Patel
a56b43b442 Remove unnecessary "inline" keywords. 
llvm-svn: 47516
 2008-02-23 01:11:02 +00:00
Devang Patel
03a99197aa print getresult operand and its type directly. 
llvm-svn: 47514
 2008-02-23 01:04:26 +00:00
Evan Cheng
7c3a8d0056 Really. Why doesn't every arch support MMX? 
llvm-svn: 47513
 2008-02-23 00:56:14 +00:00
Devang Patel
63d29fccdf Use dyn_cast instead of isa + cast. 
llvm-svn: 47511
 2008-02-23 00:47:00 +00:00
Evan Cheng
676068324b Forgot this. 
llvm-svn: 47510
 2008-02-23 00:46:11 +00:00
Devang Patel
7cfd9e7634 Regenerate 
llvm-svn: 47509
 2008-02-23 00:38:56 +00:00
Devang Patel
f674975a65 To support multiple return values, now ret instruction supports multiple operands instead of one aggregate operand. 
llvm-svn: 47508
 2008-02-23 00:35:18 +00:00
Evan Cheng
166cb23f62 Fix spill weight updating bug. 
llvm-svn: 47507
 2008-02-23 00:33:04 +00:00
Dale Johannesen
ae08bdb4cf Split ParameterAttributes.h, putting the complicated 
stuff into ParamAttrsList.h.  Per feedback from
ParamAttrs changes.

llvm-svn: 47504
 2008-02-22 22:17:59 +00:00
Gordon Henriksen
17f8c537f0 Improving wording. 
llvm-svn: 47503
 2008-02-22 21:55:51 +00:00
Gordon Henriksen
9e3cdbcff0 Adding a note about IR generation to the LLVM FAQ. 
llvm-svn: 47502
 2008-02-22 20:58:29 +00:00
Evan Cheng
3b35d2a86c Test case for PR2082. 
llvm-svn: 47501
 2008-02-22 20:38:49 +00:00
Evan Cheng
bb645b395c Same isPhysRegAvailable bug as local register allocator. 
llvm-svn: 47500
 2008-02-22 20:31:32 +00:00
Evan Cheng
b8e7eb2b1b Really really bad local register allocator bug. On X86, it was never using ESI, EDI, and EBP because of a bug in RALocal::isPhysRegAvailable(). For example, when 
it checks if ESI is available, it then looks at registers aliases to ESI. SIL is marked -2 (not allocatable) but isPhysRegAvailable() incorrectly assumes it is in use and returns false for ESI.

llvm-svn: 47499
 2008-02-22 20:30:53 +00:00
Evan Cheng
e24db258fe Add debugging printfs. 
llvm-svn: 47496
 2008-02-22 19:57:06 +00:00
Devang Patel
f8efadbac0 Regenerate 
llvm-svn: 47495
 2008-02-22 19:31:30 +00:00
Devang Patel
92fdd3b97c Use SymbolicValueRef to parse getresult operand 
llvm-svn: 47494
 2008-02-22 19:31:15 +00:00
Evan Cheng
c7ef6dc2db Remove an invalid assertion now that there are implicit virtual register operands. 
llvm-svn: 47493
 2008-02-22 19:25:04 +00:00
Evan Cheng
fadafa2109 Make sure reload of implicit uses are issued before remat's. 
llvm-svn: 47492
 2008-02-22 19:22:06 +00:00
Devang Patel
f7d8b7679b Add StripDeadPrototypes pass. 
llvm-svn: 47488
 2008-02-22 18:39:29 +00:00
Dale Johannesen
1d3737e5ed Generated files for 47484. 
llvm-svn: 47485
 2008-02-22 17:50:51 +00:00
Dale Johannesen
a96eb3a1d8 Pass alignment on ByVal parameters, from FE, all 
the way through.  It is now used for codegen.

llvm-svn: 47484
 2008-02-22 17:49:45 +00:00
Dale Johannesen
23a6f7fc1f MMX vectors are passed 4-byte aligned. 
llvm-svn: 47483
 2008-02-22 17:47:28 +00:00
Anton Korobeynikov
fd4b209731 Add smart refcounting pointer class to ADT back (known before as IntrusiveSPtr.h). 
llvm-svn: 47482
 2008-02-22 17:26:05 +00:00
Chris Lattner
fd538f8ee9 fix some bugs in tutorial, patch by Erick Tryzelaar 
llvm-svn: 47481
 2008-02-22 17:09:39 +00:00
Anton Korobeynikov
5eaa8e774e Unbreak build for VC2008. Patch by Argiris Kirtzidis! 
llvm-svn: 47480
 2008-02-22 10:11:21 +00:00