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Commit Graph

1094 Commits

Author SHA1 Message Date
Benjamin Kramer
c233521d45 Convert a ton of simple integer type equality tests to the new predicate.
llvm-svn: 92760
2010-01-05 20:07:06 +00:00
Evan Cheng
3c99a6f8c3 Code refactoring.
llvm-svn: 92694
2010-01-05 06:52:31 +00:00
Evan Cheng
275a43dadb Perform this folding as a target specific dag combine:
(or (x << c) | (y >> (64 - c))) ==> (shld64 x, y, c)

The isel patterns may not catch all the cases if general dag combine has reduced width of source operands.

llvm-svn: 92513
2010-01-04 21:22:48 +00:00
Dan Gohman
5f107150ed A use by operand 1 or 2 of a SELECT is not a FLAGS use. This
lets the test-elimination work in more conditional-move cases.

llvm-svn: 92508
2010-01-04 20:52:50 +00:00
Benjamin Kramer
1d24aae2db Replace a few more SmallVectors with arrays.
llvm-svn: 92265
2009-12-29 16:57:26 +00:00
Bill Wendling
fc4c238bd5 Add more plumbing. This time in the LowerArguments and "get" functions which
return partial registers. This affected the back-end lowering code some.

Also patch up some places I missed before in the "get" functions.

llvm-svn: 91880
2009-12-22 02:10:19 +00:00
Ken Dyck
319b2ed194 In LowerEXTRACT_VECTOR_ELT, force an i32 value type for PEXTWR instead of
incrementing the simple value type of the 16-bit type, which would give the
wrong type if an intemediate MVT (such as i24) were introduced.

llvm-svn: 91602
2009-12-17 15:31:52 +00:00
Evan Cheng
aaf2f58a04 Re-enable 91381 with fixes.
llvm-svn: 91489
2009-12-16 00:53:11 +00:00
Evan Cheng
4adb4acc7b Disable 91381 for now. It's miscompiling ARMISelDAG2DAG.cpp.
llvm-svn: 91405
2009-12-15 03:07:11 +00:00
Evan Cheng
cd8f0de016 Use sbb x, x to materialize carry bit in a GPR. The result is all one's or all zero's.
llvm-svn: 91381
2009-12-15 00:53:42 +00:00
Dan Gohman
57dc006590 Fix integer cast code to handle vector types.
llvm-svn: 91362
2009-12-14 23:40:38 +00:00
Dan Gohman
2e616e859b Implement vector widening, splitting, and scalarizing for SIGN_EXTEND_INREG.
llvm-svn: 91158
2009-12-11 21:31:27 +00:00
Anton Korobeynikov
f8b2e2868e Honour setHasCalls() set from isel.
This is used in some weird cases like general dynamic TLS model.
This fixes PR5723

llvm-svn: 91144
2009-12-11 19:39:55 +00:00
Evan Cheng
9e2442c0be Optimize splat of a scalar load into a shuffle of a vector load when it's legal. e.g.
vector_shuffle (scalar_to_vector (i32 load (ptr + 4))), undef, <0, 0, 0, 0>
=>
vector_shuffle (v4i32 load ptr), undef, <1, 1, 1, 1>

iff ptr is 16-byte aligned (or can be made into 16-byte aligned).

llvm-svn: 90984
2009-12-09 21:00:30 +00:00
Evan Cheng
41c13e41fe Teach InferPtrAlignment to infer GV+cst alignment and use it to simplify x86 isl lowering code.
llvm-svn: 90925
2009-12-09 01:53:58 +00:00
Evan Cheng
7941695285 Move isConsecutiveLoad to SelectionDAG. It's not target dependent and it's primary used by selectdag passes.
llvm-svn: 90922
2009-12-09 01:36:00 +00:00
Mon P Wang
27bce4e285 Added support to allow clients to custom widen. For X86, custom widen vectors for
divide/remainder since these operations can trap by unroll them and adding undefs
for the resulting vector.

llvm-svn: 90108
2009-11-30 02:42:02 +00:00
Dan Gohman
b5ec39e2dc Remove ISD::DEBUG_LOC and ISD::DBG_LABEL, which are no longer used.
Note that "hasDotLocAndDotFile"-style debug info was already broken;
people wanting this functionality should implement it in the
AsmPrinter/DwarfWriter code.

llvm-svn: 89711
2009-11-23 23:20:51 +00:00
Devang Patel
327919890c We are not using DBG_STOPPOINT anymore.
llvm-svn: 89536
2009-11-21 02:46:55 +00:00
Dan Gohman
3517f425b8 Target-independent support for TargetFlags on BlockAddress operands,
and support for blockaddresses in x86-32 PIC mode.

llvm-svn: 89506
2009-11-20 23:18:13 +00:00
Jeffrey Yasskin
0f846dbb3e Make X86-64 in the Large model always emit 64-bit calls.
The large code model is documented at
http://www.x86-64.org/documentation/abi.pdf and says that calls should
assume their target doesn't live within the 32-bit pc-relative offset
that fits in the call instruction.

To do this, we turn off the global-address->target-global-address
conversion in X86TargetLowering::LowerCall(). The first attempt at
this broke the lazy JIT because it can separate the movabs(imm->reg)
from the actual call instruction. The lazy JIT receives the address of
the movabs as a relocation and needs to record the return address from
the call; and then when that call happens, it needs to patch the
movabs with the newly-compiled target. We could thread the call
instruction into the relocation and record the movabs<->call mapping
explicitly, but that seems to require at least as much new
complication in the code generator as this change.

To fix this, we make lazy functions _always_ go through a call
stub. You'd think we'd only have to force lazy calls through a stub on
difficult platforms, but that turns out to break indirect calls
through a function pointer. The right fix for that is to distinguish
between calls and address-of operations on uncompiled functions, but
that's complex enough to leave for someone else to do.

Another attempt at this defined a new CALL64i pseudo-instruction,
which expanded to a 2-instruction sequence in the assembly output and
was special-cased in the X86CodeEmitter's emitInstruction()
function. That broke indirect calls in the same way as above.

This patch also removes a hack forcing Darwin to the small code model.
Without far-call-stubs, the small code model requires things of the
JITMemoryManager that the DefaultJITMemoryManager can't provide.

Thanks to echristo for lots of testing!

llvm-svn: 88984
2009-11-16 22:41:33 +00:00
David Greene
58e7c6145b Add a bool flag to StackObjects telling whether they reference spill
slots.  The AsmPrinter will use this information to determine whether to
print a spill/reload comment.

Remove default argument values.  It's too easy to pass a wrong argument
value when multiple arguments have default values.  Make everything
explicit to trap bugs early.

Update all targets to adhere to the new interfaces..

llvm-svn: 87022
2009-11-12 20:49:22 +00:00
Benjamin Kramer
da70783da7 Add compare_lower and equals_lower methods to StringRef. Switch all users of
StringsEqualNoCase (from StringExtras.h) to it.

llvm-svn: 87020
2009-11-12 20:36:59 +00:00
Nate Begeman
49d93dc6d1 x86 vector shuffle cleanup/fixes:
1. rename the movhp patfrag to movlhps, since thats what it actually matches
2. eliminate the bogus movhps load and store patterns, they were incorrect.  The load transforms are already handled (correctly) by shufps/unpack.
3. revert a recent test change to its correct form.

llvm-svn: 86415
2009-11-07 23:17:15 +00:00
Kenneth Uildriks
91ceaa85a2 Add code to check at SelectionDAGISel::LowerArguments time to see if return values can be lowered to registers. Coming soon, code to perform sret-demotion if return values cannot be lowered to registers
llvm-svn: 86324
2009-11-07 02:11:54 +00:00
Dan Gohman
2767aa065e Initial x86 support for BlockAddresses.
llvm-svn: 85557
2009-10-30 01:28:02 +00:00
Evan Cheng
4e3bc5efb7 Add a second ValueType argument to isFPImmLegal.
llvm-svn: 85361
2009-10-28 01:43:28 +00:00
Evan Cheng
151726ad30 Do away with addLegalFPImmediate. Add a target hook isFPImmLegal which returns true if the fp immediate can be natively codegened by target.
llvm-svn: 85281
2009-10-27 19:56:55 +00:00
Dan Gohman
e0ace5c4eb Make TranslateX86CC return COND_INVALID instead of aborting when it
encounters an OEQ or UNE comparison, and update its callers to check
for this return status and recover. This fixes a problem resulting from
the LowerOperation hooks being called from LegalizeVectorOps, because
LegalizeVectorOps only lowers vectors, so OEQ and UNE comparisons may
still be at large. This fixes PR5092.

llvm-svn: 84640
2009-10-20 16:22:37 +00:00
Nate Begeman
1308a36647 Add support for matching shuffle patterns with palignr.
llvm-svn: 84459
2009-10-19 02:17:23 +00:00
Evan Cheng
e921ebe70d -Revert parts of 84326 and 84411. Distinquishing between fixed and non-fixed
stack slots and giving them different PseudoSourceValue's did not fix the
problem of post-alloc scheduling miscompiling llvm itself.
- Apply Dan's conservative workaround by assuming any non fixed stack slots can
alias other memory locations. This means a load from spill slot #1 cannot 
move above a store of spill slot #2. 
- Enable post-alloc scheduling for x86 at optimization leverl Default and above.

llvm-svn: 84424
2009-10-18 18:16:27 +00:00
Evan Cheng
b40322ac49 Only fixed stack objects and spill slots should be get FixedStack PseudoSourceValue.
llvm-svn: 84411
2009-10-18 06:27:36 +00:00
Evan Cheng
d941e8b23a Revert 84315 for now. Re-thinking the patch.
llvm-svn: 84321
2009-10-17 07:53:04 +00:00
Evan Cheng
12dd96e2f8 Rename getFixedStack to getStackObject. The stack objects represented are not
necessarily fixed. Only those will negative frame indices are "fixed."

llvm-svn: 84315
2009-10-17 06:22:26 +00:00
Dan Gohman
b5a0207b98 Don't forget to mark RAX as live-out of the function when arranging for
it to hold the address of an sret return value, for x86-64 ABI purposes.

Also, fix the test that was originally intended to test this to actually
test it, using FileCheck.

llvm-svn: 83853
2009-10-12 16:36:12 +00:00
Dale Johannesen
ba62bb565d Fix handling of x86 'R' constraint.
llvm-svn: 83499
2009-10-07 22:47:20 +00:00
Dan Gohman
0ac693a89e Improve MachineMemOperand handling.
- Allocate MachineMemOperands and MachineMemOperand lists in MachineFunctions.
   This eliminates MachineInstr's std::list member and allows the data to be
   created by isel and live for the remainder of codegen, avoiding a lot of
   copying and unnecessary translation. This also shrinks MemSDNode.
 - Delete MemOperandSDNode. Introduce MachineSDNode which has dedicated
   fields for MachineMemOperands.
 - Change MemSDNode to have a MachineMemOperand member instead of its own
   fields with the same information. This introduces some redundancy, but
   it's more consistent with what MachineInstr will eventually want.
 - Ignore alignment when searching for redundant loads for CSE, but remember
   the greatest alignment.

Target-specific code which previously used MemOperandSDNodes with generic
SDNodes now use MemIntrinsicSDNodes, with opcodes in a designated range
so that the SelectionDAG framework knows that MachineMemOperand information
is available.

llvm-svn: 82794
2009-09-25 20:36:54 +00:00
Dan Gohman
1256f9265b Rename several variables from EVT to more descriptive names, now that EVT
is also the name of their type, as declarations like "EVT EVT" look
really odd.

llvm-svn: 82654
2009-09-23 21:02:20 +00:00
Dan Gohman
5eb4fde3c3 Recognize SSE min and max opportunities in even more cases.
And fix a bug with the behavior of min/max instructions formed from
fcmp uge comparisons.

Also, use FiniteOnlyFPMath() for this code instead of UnsafeFPMath,
as it is more specific.

llvm-svn: 82466
2009-09-21 18:03:22 +00:00
Daniel Dunbar
378331a13d Tabs -> spaces, and remove trailing whitespace.
llvm-svn: 82355
2009-09-20 02:20:51 +00:00
Evan Cheng
7714c8412d Fix PR4926. When target hook EmitInstrWithCustomInserter() insert new basic blocks and update CFG, it should also inform sdisel of the changes so the phi source operands will come from the right basic blocks.
llvm-svn: 82311
2009-09-19 09:51:03 +00:00
Evan Cheng
7cb9c456e5 Enhance EmitInstrWithCustomInserter() so target can specify CFG changes that sdisel will use to properly complete phi nodes.
Not functionality change yet.

llvm-svn: 82273
2009-09-18 21:02:19 +00:00
Chris Lattner
60739d60bf Make a new X8632_MachoTargetObjectFile TLOF implementation whose
getSymbolForDwarfGlobalReference is smart enough to know that it 
needs to register the stub it references with MachineModuleInfoMachO,
so that it gets emitted at the end of the file.

Move stub emission from X86ATTAsmPrinter::doFinalization to the
new X86ATTAsmPrinter::EmitEndOfAsmFile asmprinter hook.  The important
thing here is that EmitEndOfAsmFile is called *after* the ehframes are
emitted, so we get all the stubs.

This allows us to remove a gross hack from the asmprinter where it would
"just know" that it needed to output stubs for personality functions.
Now this is all driven from a consistent interface.

The testcase change is just reordering the expected output now that the
stubs come out after the ehframe instead of before.

This also unblocks other changes that Bill wants to make.

llvm-svn: 82269
2009-09-18 20:22:52 +00:00
Dan Gohman
0dcc5f9922 Add support for using the FLAGS result of or, xor, and and instructions
on x86, to avoid explicit test instructions. A few existing tests changed
due to arbitrary register allocation differences.

llvm-svn: 82263
2009-09-18 19:59:53 +00:00
Chris Lattner
7b52d90c9e Big change #1 for personality function references:
Eliminate the PersonalityPrefix/Suffix & NeedsIndirectEncoding
fields from MAI: they aren't part of the asm syntax, they are
related to the structure of the object file.

To replace their functionality, add a new 
TLOF::getSymbolForDwarfGlobalReference method which asks targets
to decide how to reference a global from EH in a pc-relative way.

The default implementation just returns the symbol.  The default
darwin implementation references the symbol through an indirect
$non_lazy_ptr stub.  The bizarro x86-64 darwin specialization
handles the weird "foo@GOTPCREL+4" hack.

DwarfException.cpp now uses this to emit the reference to the
symbol in the right way, and this also eliminates another 
horrible hack from DwarfException.cpp:

-    if (strcmp(MAI->getPersonalitySuffix(), "+4@GOTPCREL"))
-      O << "-" << MAI->getPCSymbol();

llvm-svn: 81991
2009-09-16 01:46:41 +00:00
Chris Lattner
830f090c2e add some special case handling for strangely named x86 registers.
llvm-svn: 81726
2009-09-13 22:41:48 +00:00
Duncan Sands
6efbe6150b Remove a left over bit of code with no effect.
llvm-svn: 81128
2009-09-06 19:29:07 +00:00
Duncan Sands
598fe699d0 Remove some not-really-used variables, as warned
about by icc (#593, partial).  Patch by Erick Tryzelaar.

llvm-svn: 81115
2009-09-06 12:41:19 +00:00
Dan Gohman
69e9573064 Recognize more opportunities to use SSE min and max instructions,
swapping the operands if necessary.

llvm-svn: 80940
2009-09-03 20:34:31 +00:00
Mon P Wang
985c62a61e Fixed a few problems with vector shifts
- when transforming a vector shift of a non-immediate scalar shift amount, zero
    extend the i32 shift amount to i64 since the vector shift reads 64 bits
  - when transforming i16 vectors to use a vector shift, zero extend i16 shift amount
  - improve the code quality in some cases when transforming vectors to use a vector shift

llvm-svn: 80935
2009-09-03 19:56:25 +00:00