RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-22 20:43:44 +02:00
Code Issues Projects Releases Wiki Activity
42,712 Commits 4 Branches 5 Tags 704 MiB
c3965308a4
Commit Graph

9286 Commits

Author SHA1 Message Date
Scott Michel
c3965308a4 CellSPU: 
(a) Improve the extract element code: there's no need to do gymnastics with
    rotates into the preferred slot if a shuffle will do the same thing.
(b) Rename a couple of SPUISD pseudo-instructions for readability and better
    semantic correspondence.
(c) Fix i64 sign/any/zero extension lowering.

llvm-svn: 59965
 2008-11-24 17:11:17 +00:00
Duncan Sands
9816d42357 If the type legalizer actually legalized anything 
(this doesn't happen that often, since most code
does not use illegal types) then follow it by a
DAG combiner run that is allowed to generate
illegal operations but not illegal types.  I didn't
modify the target combiner code to distinguish like
this between illegal operations and illegal types,
so it will not produce illegal operations as well
as not producing illegal types.

llvm-svn: 59960
 2008-11-24 14:53:14 +00:00
Matthijs Kooijman
73be220b45 Fix comments. 
llvm-svn: 59958
 2008-11-24 11:44:00 +00:00
Evan Cheng
a19ef59d6c Move target independent td files from lib/Target/ to include/llvm/Target so they can be distributed along with the header files. 
llvm-svn: 59953
 2008-11-24 07:34:46 +00:00
Mon P Wang
c9ba9d066e Added missing description for -disable-mmx option. 
llvm-svn: 59929
 2008-11-24 02:10:43 +00:00
Duncan Sands
f9ea1124c9 Rename SetCCResultContents to BooleanContents. In 
practice these booleans are mostly produced by SetCC,
however the concept is more general.

llvm-svn: 59911
 2008-11-23 15:47:28 +00:00
Mon P Wang
0f887d148c Added -disable-mmx using a patch from Preston Gurd. 
llvm-svn: 59901
 2008-11-23 04:37:22 +00:00
Scott Michel
50e49b28f0 CellSPU: Fix bug 3056. Varadic extract_element was not implemented (nor was it 
ever conceived to occur).

llvm-svn: 59891
 2008-11-22 23:50:42 +00:00
Anton Korobeynikov
ba74a11c9b Make a convenient helper for printing offsets. 
llvm-svn: 59872
 2008-11-22 16:15:34 +00:00
Scott Michel
314d705baf CellSPU: 
(a) Fix bgs 3052, 3057
(b) Incorporate Duncan's suggestions re: i1 promotion
(c) Indentation updates.

llvm-svn: 59790
 2008-11-21 02:56:16 +00:00
Scott Michel
4026c8f44a CellSPU: 
(a) Remove moved file (SPUAsmPrinter.cpp) to make svn happy.
(b) Remove truncated stores that will never be used.
(c) Add initial support for __muldi3 as a libcall.

llvm-svn: 59734
 2008-11-20 16:36:33 +00:00
Mon P Wang
76b86c996e Allow XMM2 and XMM3 to be used for non ABI compliant code. 
llvm-svn: 59720
 2008-11-20 07:48:19 +00:00
Scott Michel
c4efcfdcd6 CellSPU: Custom lower truncating stores of i8 to i1 (should not have been 
promote), fix signed conversion of indexed offsets.

llvm-svn: 59707
 2008-11-20 05:01:09 +00:00
Scott Michel
d811d41fe7 CellSPU: Adjust spacing/tabulation 
llvm-svn: 59703
 2008-11-20 04:26:21 +00:00
Evan Cheng
bc91bb7658 Fix a thinko. MO is getOperand(i-1) so we don't have to adjust e. 
llvm-svn: 59696
 2008-11-20 02:25:51 +00:00
Evan Cheng
c8ecb037a2 Eliminate a compile time warning. 
llvm-svn: 59678
 2008-11-19 23:21:33 +00:00
Evan Cheng
b434100baa Eliminate a compile time warning. 
llvm-svn: 59677
 2008-11-19 23:21:11 +00:00
Dan Gohman
f4b2751ee6 Experimental post-pass scheduling support. Post-pass scheduling 
is currently off by default, and can be enabled with
-disable-post-RA-scheduler=false.

This doesn't have a significant impact on most code yet because it doesn't
yet do anything to address anti-dependencies and it doesn't attempt to
disambiguate memory references. Also, several popular targets
don't have pipeline descriptions yet.

The majority of the changes here are splitting the SelectionDAG-specific
code out of ScheduleDAG, so that ScheduleDAG can be moved to
libLLVMCodeGen.a. The interface between ScheduleDAG-using code and
the rest of the scheduling code is somewhat rough and will evolve.

llvm-svn: 59676
 2008-11-19 23:18:57 +00:00
Oscar Fuentes
c4345795b0 CMake: Removed source file from lib/Target/PIC16/CMakeLists.txt. 
llvm-svn: 59655
 2008-11-19 18:42:25 +00:00
Scott Michel
583eadfb46 CellSPU: Do not custom lower i1 stores, rely on type legalization to do the 
right thing and promote the store to i8.

llvm-svn: 59648
 2008-11-19 17:45:08 +00:00
Stuart Hastings
545f47a2cb <rdar://problem/6351057> 
Discourage (allocate last) use of x86_64 R12 and R13 due to their
longer instruction encodings.

llvm-svn: 59644
 2008-11-19 17:19:35 +00:00
Scott Michel
5ca4b5b653 Temporary check-in for Duncan to demonstrate CellSPU store problem. 
llvm-svn: 59637
 2008-11-19 15:24:16 +00:00
Sanjiv Gupta
e9e4de3e54 Forgot to add this in the previous commit. 
llvm-svn: 59623
 2008-11-19 12:12:49 +00:00
Sanjiv Gupta
da17b053d6 Fixed build warnings. 
llvm-svn: 59621
 2008-11-19 11:27:59 +00:00
Sanjiv Gupta
a66f48d8e9 Added a more function PIC16 backend. However to get this working a patch in 
ExpandIntegerOperand (LegalizeIntegerTypes.cpp) is needed which is yet to be reworked and submitted. 

llvm-svn: 59617
 2008-11-19 11:00:54 +00:00
Dan Gohman
e5420a0ae9 Don't set neverHasSideEffects on x86's divide instructions, since 
they trap on divide-by-zero, and this side effect is otherwise
unmodeled.

llvm-svn: 59551
 2008-11-18 21:29:14 +00:00
Dan Gohman
04e99d0f3f Add more const qualifiers. This fixes build breakage from r59540. 
llvm-svn: 59542
 2008-11-18 19:49:32 +00:00
Dale Johannesen
f56b6d64f9 Move some former testcases (low-probability codegen 
optimizations) into this wishlist.

llvm-svn: 59455
 2008-11-17 18:56:34 +00:00
Oscar Fuentes
42942c0bc5 Adds extern "C" ints to the .cpp files that use RegisterTarget, as 
well as 2 files that use "Registrator"s. These are to be used by the
MSVC builds, as the Win32 linker does not include libs that are
otherwise unreferenced, even if global constructors in the lib have
side-effects.

Patch by Scott Graham!

llvm-svn: 59378
 2008-11-15 21:36:30 +00:00
Evan Cheng
7ac8120105 Fix fuitos encoding. 
llvm-svn: 59344
 2008-11-15 00:40:57 +00:00
Evan Cheng
626e85dfc2 Fix MOVrx, MOVsrl_flag, and MOVsra_flag encodings. 
llvm-svn: 59314
 2008-11-14 20:09:11 +00:00
Dale Johannesen
29e1b2e9fd Remove unneeded stuff from GRAD register class. 
llvm-svn: 59311
 2008-11-14 18:10:48 +00:00
Richard Osborne
e30cb5908e [XCore] Remove whitespace in the description used when 
registering XCoreTargetMachine.

llvm-svn: 59308
 2008-11-14 16:19:56 +00:00
Richard Osborne
c2b2d5e6cf [XCore] Fix expansion of 64 bit add/sub. Don't custom expand 
these operations if ladd/lsub are not available on the current
subtarget.

llvm-svn: 59305
 2008-11-14 15:59:19 +00:00
Richard Osborne
8f86bb4d20 Add XCore intrinsics for getid (returns thread id) and bitrev (reverses 
bits in a word).

llvm-svn: 59296
 2008-11-14 10:12:16 +00:00
Evan Cheng
f7c1da41a1 Handle the rest of pseudo instructions. 
llvm-svn: 59275
 2008-11-13 23:36:57 +00:00
Evan Cheng
feb7615798 Lazy compilation callback save / restore VFP registers. 
llvm-svn: 59274
 2008-11-13 23:28:54 +00:00
Dale Johannesen
de9fdff884 Extend InlineAsm::C_Register to allow multiple specific registers 
(actually, code already all worked, only the comment
changed).  Use this to implement 'A' constraint on x86.
Fixes PR 1779.

llvm-svn: 59266
 2008-11-13 21:52:36 +00:00
Evan Cheng
4c8297e12b Don't forget to emit stubs for function GV's emitted in CONSTPOOL_ENTRY's. 
llvm-svn: 59258
 2008-11-13 19:22:28 +00:00
Evan Cheng
997eb67c20 fsub{d|s} encoding bugs. 
llvm-svn: 59234
 2008-11-13 07:59:48 +00:00
Evan Cheng
d67d6c4571 Missed a break statement. 
llvm-svn: 59231
 2008-11-13 07:46:59 +00:00
Evan Cheng
3c0113820b Fix pre- and post-indexed load / store encoding bugs. 
llvm-svn: 59230
 2008-11-13 07:34:59 +00:00
Dan Gohman
229c65c05b Move the code that inserts X87 FP_REG_KILL instructions from a 
special-purpose hook to a new pass. Also, add check to see if any
x87 virtual registers are used, to avoid doing any work in the
common case that no x87 code is needed.

llvm-svn: 59190
 2008-11-12 22:55:05 +00:00
Evan Cheng
4768468ec1 Remove the incorrect assertion. We don't have enough information before relocation to set U bit. 
llvm-svn: 59170
 2008-11-12 21:37:59 +00:00
Evan Cheng
9cb6f40f8f Address mode immediate offset has already been divided by 4. 
llvm-svn: 59117
 2008-11-12 08:21:12 +00:00
Evan Cheng
80d0d5cfa8 Fix a VFP binary arithmetic instruction encoding bug. 
llvm-svn: 59116
 2008-11-12 08:14:21 +00:00
Evan Cheng
a4dc0e304e Fix address mode 3 immediate offset mode encoding. 
llvm-svn: 59109
 2008-11-12 07:34:37 +00:00
Evan Cheng
7fef8cfe75 Consolidate formats; fix FCMPED etc. encodings. 
llvm-svn: 59107
 2008-11-12 07:18:38 +00:00
Evan Cheng
0966883093 Fix VFP conversion instruction encodings. 
llvm-svn: 59104
 2008-11-12 06:41:41 +00:00
Evan Cheng
39d8bf295d Fix encoding of single-precision VFP registers. 
llvm-svn: 59102
 2008-11-12 02:19:38 +00:00