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Author SHA1 Message Date
Reid Kleckner
c3f485579d [Support] Propagate the environment into the test child process 
Should fix the dragonegg bootstrap builder, which reasonably needs
LD_LIBRARY_PATH to be set.

llvm-svn: 180041
 2013-04-22 20:23:41 +00:00
Akira Hatanaka
b9c1325601 80 columns. 
llvm-svn: 180040
 2013-04-22 20:13:37 +00:00
Akira Hatanaka
913bf6194a [mips] In performDSPShiftCombine, check that all elements in the vector are 
shifted by the same amount and the shift amount is smaller than the element
size.

llvm-svn: 180039
 2013-04-22 19:58:23 +00:00
Chad Rosier
274f867dea [ms-inline asm] Remove the identifier parsing logic from the AsmParser. This is 
now taken care of by the frontend, which allows us to parse arbitrary C/C++
variables.
Part of rdar://13663589

llvm-svn: 180037
 2013-04-22 19:42:15 +00:00
Reid Kleckner
521e47ef4f [Support] Fix argv string escape bug on Windows 
Summary:
This is http://llvm.org/PR15802.  Backslashes preceding double quotes in
arguments must be escaped.  The interesting bit is that all other
backslashes should *not* be escaped, because the un-escaping logic is
only triggered by the presence of a double quote character.

Reviewers: Bigcheese

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D705

llvm-svn: 180035
 2013-04-22 19:03:55 +00:00
Peter Collingbourne
9c7b994acf COFF: Fix weak external aliases. 
Differential Revision: http://llvm-reviews.chandlerc.com/D700

llvm-svn: 180034
 2013-04-22 18:48:56 +00:00
Stephen Lin
4e394628e7 Extra paranoid test for r179925 (verify that tail calls are not generated to 'this'-returning constructors of objects with different 'this' pointers than the caller) 
llvm-svn: 180032
 2013-04-22 17:23:49 +00:00
Eli Bendersky
397cf8eede Document the -filetype option of llc (PR #12902) 
llvm-svn: 180031
 2013-04-22 17:16:35 +00:00
Eli Bendersky
eb219b8590 Fix for PR 14965: Better error message for GEP with partially defined contents 
llvm-svn: 180030
 2013-04-22 17:03:42 +00:00
Chad Rosier
db1182911d [ms-inline asm] Refactor/clean up the SemaLookup interface. No functional 
change indended.
Part of rdar://13663589

llvm-svn: 180028
 2013-04-22 17:01:46 +00:00
Jia Liu
05e8feb1ad Add AArch64 into $llvm_cv_target_arch in configure, reviewed by Tim Northover & Eric Christopher 
llvm-svn: 180025
 2013-04-22 16:26:15 +00:00
Jia Liu
34d1337e25 typo 
llvm-svn: 180023
 2013-04-22 15:40:16 +00:00
Benjamin Kramer
43d7baf33c Make doxygen comment match declaration. 
Found by -Wdocumentation.

llvm-svn: 180021
 2013-04-22 15:21:03 +00:00
Rafael Espindola
4a4fbbaf4e Also verify llvm.compiler_used. 
llvm-svn: 180020
 2013-04-22 15:16:51 +00:00
Rafael Espindola
88a7961c64 Clarify that llvm.used can contain aliases. 
Also add a check for llvm.used in the verifier and simplify clients now that
they can assume they have a ConstantArray.

llvm-svn: 180019
 2013-04-22 14:58:02 +00:00
Eric Christopher
8fa9d9a193 No really, don't store anything to this since it's unconditionally 
set below.

llvm-svn: 180015
 2013-04-22 14:11:25 +00:00
Eric Christopher
831b87c175 Remove variable store that is never read. 
llvm-svn: 180014
 2013-04-22 13:51:44 +00:00
Eric Christopher
65e2f0c4cb Remove variable store that is never read. 
llvm-svn: 180013
 2013-04-22 13:46:33 +00:00
Stepan Dyatkovskiy
8adaf54376 Fix for 5.5 Parameter Passing --> Stage C: 
-- C.4 and C.5 statements, when NSAA is not equal to SP.
 -- C.1.cp statement for VA functions. Note: There are no VFP CPRCs in a
    variadic procedure.

Before this patch "NSAA != 0" means "don't use GPRs anymore ". But there are
some exceptions in AAPCS.
1. For non VA function: allocate all VFP regs for CPRC. When all VFPs are allocated
   CPRCs would be sent to stack, while non CPRCs may be still allocated in GRPs.
2. Check that for VA functions all params uses GPRs and then stack.
   No exceptions, no CPRCs here.

llvm-svn: 180011
 2013-04-22 13:06:52 +00:00
Eric Christopher
95e5e9b173 Add .ll as a valid test suffix for Object, this allows .ll -> object 
and then dumping as tests.

llvm-svn: 180010
 2013-04-22 10:45:06 +00:00
Eric Christopher
661989b8e1 Add the same todo about a command iterator interface into the 
other mach-o object file as well.

TODO: One interface to rule them all.
llvm-svn: 180009
 2013-04-22 10:27:32 +00:00
Eric Christopher
276dc20d12 Add a TODO about wanting an iterator interface. 
llvm-svn: 180008
 2013-04-22 10:25:25 +00:00
Nico Rieck
1a6cd3f7df llvm-readobj: Dump more COFF auxiliary records 
llvm-svn: 180007
 2013-04-22 08:35:11 +00:00
Nico Rieck
d2aff3295e llvm-readobj: Check for null section pointer 
llvm-svn: 180006
 2013-04-22 08:34:59 +00:00
Nico Rieck
bb000645f5 llvm-readobj: Do not print NULL StringRefs 
llvm-svn: 180005
 2013-04-22 08:34:46 +00:00
Arnaud A. de Grandmaison
087fe129d8 Cleanup: test source files do not need to be executable 
llvm-svn: 180003
 2013-04-22 08:02:43 +00:00
Eric Christopher
0a8c525676 Tidy. 
llvm-svn: 180000
 2013-04-22 07:51:08 +00:00
Eric Christopher
22de8b696a Update comment. Whitespace. 
llvm-svn: 179999
 2013-04-22 07:47:40 +00:00
David Blaikie
9bfe15c313 Revert "Revert "PR14606: debug info imported_module support"" 
This reverts commit r179840 with a fix to test/DebugInfo/two-cus-from-same-file.ll

I'm not sure why that test only failed on ARM & MIPS and not X86 Linux, even
though the debug info was clearly invalid on all of them, but this ought to fix
it.

llvm-svn: 179996
 2013-04-22 06:12:31 +00:00
Craig Topper
19930f378f Convert windows line endings to linux/unix line endings. 
llvm-svn: 179995
 2013-04-22 05:38:01 +00:00
Craig Topper
dcf0462f2d Fix indentation. No functional change. 
llvm-svn: 179994
 2013-04-22 04:24:02 +00:00
Craig Topper
04e44a9181 Put 'else' on same line as preceding curly brace per coding standards. No functional change. 
llvm-svn: 179993
 2013-04-22 04:22:40 +00:00
Craig Topper
9541948bfa Remove an unreachable 'break' following a 'return'. 
llvm-svn: 179991
 2013-04-22 04:06:59 +00:00
Jim Grosbach
3104dcf2ca Legalize vector truncates by parts rather than just splitting. 
Rather than just splitting the input type and hoping for the best, apply
a bit more cleverness. Just splitting the types until the source is
legal often leads to an illegal result time, which is then widened and a
scalarization step is introduced which leads to truly horrible code
generation. With the loop vectorizer, these sorts of operations are much
more common, and so it's worth extra effort to do them well.

Add a legalization hook for the operands of a TRUNCATE node, which will
be encountered after the result type has been legalized, but if the
operand type is still illegal. If simple splitting of both types
ends up with the result type of each half still being legal, just
do that (v16i16 -> v16i8 on ARM, for example). If, however, that would
result in an illegal result type (v8i32 -> v8i8 on ARM, for example),
we can get more clever with power-two vectors. Specifically,
split the input type, but also widen the result element size, then
concatenate the halves and truncate again.  For example on ARM,
To perform a "%res = v8i8 trunc v8i32 %in" we transform to:
  %inlo = v4i32 extract_subvector %in, 0
  %inhi = v4i32 extract_subvector %in, 4
  %lo16 = v4i16 trunc v4i32 %inlo
  %hi16 = v4i16 trunc v4i32 %inhi
  %in16 = v8i16 concat_vectors v4i16 %lo16, v4i16 %hi16
  %res = v8i8 trunc v8i16 %in16

This allows instruction selection to generate three VMOVN instructions
instead of a sequences of moves, stores and loads.

Update the ARMTargetTransformInfo to take this improved legalization
into account.

Consider the simplified IR:

define <16 x i8> @test1(<16 x i32>* %ap) {
  %a = load <16 x i32>* %ap
  %tmp = trunc <16 x i32> %a to <16 x i8>
  ret <16 x i8> %tmp
}

define <8 x i8> @test2(<8 x i32>* %ap) {
  %a = load <8 x i32>* %ap
  %tmp = trunc <8 x i32> %a to <8 x i8>
  ret <8 x i8> %tmp
}

Previously, we would generate the truly hideous:
	.syntax unified
	.section	__TEXT,__text,regular,pure_instructions
	.globl	_test1
	.align	2
_test1:                                 @ @test1
@ BB#0:
	push	{r7}
	mov	r7, sp
	sub	sp, sp, #20
	bic	sp, sp, #7
	add	r1, r0, #48
	add	r2, r0, #32
	vld1.64	{d24, d25}, [r0:128]
	vld1.64	{d16, d17}, [r1:128]
	vld1.64	{d18, d19}, [r2:128]
	add	r1, r0, #16
	vmovn.i32	d22, q8
	vld1.64	{d16, d17}, [r1:128]
	vmovn.i32	d20, q9
	vmovn.i32	d18, q12
	vmov.u16	r0, d22[3]
	strb	r0, [sp, #15]
	vmov.u16	r0, d22[2]
	strb	r0, [sp, #14]
	vmov.u16	r0, d22[1]
	strb	r0, [sp, #13]
	vmov.u16	r0, d22[0]
	vmovn.i32	d16, q8
	strb	r0, [sp, #12]
	vmov.u16	r0, d20[3]
	strb	r0, [sp, #11]
	vmov.u16	r0, d20[2]
	strb	r0, [sp, #10]
	vmov.u16	r0, d20[1]
	strb	r0, [sp, #9]
	vmov.u16	r0, d20[0]
	strb	r0, [sp, #8]
	vmov.u16	r0, d18[3]
	strb	r0, [sp, #3]
	vmov.u16	r0, d18[2]
	strb	r0, [sp, #2]
	vmov.u16	r0, d18[1]
	strb	r0, [sp, #1]
	vmov.u16	r0, d18[0]
	strb	r0, [sp]
	vmov.u16	r0, d16[3]
	strb	r0, [sp, #7]
	vmov.u16	r0, d16[2]
	strb	r0, [sp, #6]
	vmov.u16	r0, d16[1]
	strb	r0, [sp, #5]
	vmov.u16	r0, d16[0]
	strb	r0, [sp, #4]
	vldmia	sp, {d16, d17}
	vmov	r0, r1, d16
	vmov	r2, r3, d17
	mov	sp, r7
	pop	{r7}
	bx	lr

	.globl	_test2
	.align	2
_test2:                                 @ @test2
@ BB#0:
	push	{r7}
	mov	r7, sp
	sub	sp, sp, #12
	bic	sp, sp, #7
	vld1.64	{d16, d17}, [r0:128]
	add	r0, r0, #16
	vld1.64	{d20, d21}, [r0:128]
	vmovn.i32	d18, q8
	vmov.u16	r0, d18[3]
	vmovn.i32	d16, q10
	strb	r0, [sp, #3]
	vmov.u16	r0, d18[2]
	strb	r0, [sp, #2]
	vmov.u16	r0, d18[1]
	strb	r0, [sp, #1]
	vmov.u16	r0, d18[0]
	strb	r0, [sp]
	vmov.u16	r0, d16[3]
	strb	r0, [sp, #7]
	vmov.u16	r0, d16[2]
	strb	r0, [sp, #6]
	vmov.u16	r0, d16[1]
	strb	r0, [sp, #5]
	vmov.u16	r0, d16[0]
	strb	r0, [sp, #4]
	ldm	sp, {r0, r1}
	mov	sp, r7
	pop	{r7}
	bx	lr

Now, however, we generate the much more straightforward:
	.syntax unified
	.section	__TEXT,__text,regular,pure_instructions
	.globl	_test1
	.align	2
_test1:                                 @ @test1
@ BB#0:
	add	r1, r0, #48
	add	r2, r0, #32
	vld1.64	{d20, d21}, [r0:128]
	vld1.64	{d16, d17}, [r1:128]
	add	r1, r0, #16
	vld1.64	{d18, d19}, [r2:128]
	vld1.64	{d22, d23}, [r1:128]
	vmovn.i32	d17, q8
	vmovn.i32	d16, q9
	vmovn.i32	d18, q10
	vmovn.i32	d19, q11
	vmovn.i16	d17, q8
	vmovn.i16	d16, q9
	vmov	r0, r1, d16
	vmov	r2, r3, d17
	bx	lr

	.globl	_test2
	.align	2
_test2:                                 @ @test2
@ BB#0:
	vld1.64	{d16, d17}, [r0:128]
	add	r0, r0, #16
	vld1.64	{d18, d19}, [r0:128]
	vmovn.i32	d16, q8
	vmovn.i32	d17, q9
	vmovn.i16	d16, q8
	vmov	r0, r1, d16
	bx	lr

llvm-svn: 179989
 2013-04-21 23:47:41 +00:00
Jim Grosbach
2582e2e539 ARM: Split out cost model vcvt testcases. 
They had a separate RUN line already, so may as well be in a separate file.

llvm-svn: 179988
 2013-04-21 23:47:37 +00:00
Jakob Stoklund Olesen
c9f30e9065 Passing arguments to varags functions under the SPARC v9 ABI. 
Arguments after the fixed arguments never use the floating point
registers.

llvm-svn: 179987
 2013-04-21 21:36:49 +00:00
Jim Grosbach
a8b7f8e7f6 Tidy up comment grammar. 
llvm-svn: 179986
 2013-04-21 21:23:01 +00:00
Jakob Stoklund Olesen
d8a2b84611 Fix the SETHIimm pattern for 64-bit code. 
Don't ignore the high 32 bits of the immediate.

llvm-svn: 179985
 2013-04-21 21:18:03 +00:00
Stephen Lin
f18769472c Remove unused, undefined ArgFlagsTy::getArgFlagsString; add a comment about 'returned' 
llvm-svn: 179983
 2013-04-21 18:05:20 +00:00
Benjamin Kramer
47f18d3da1 SROA: Don't crash on a select with two identical operands. 
This is an edge case that can happen if we modify a chain of multiple selects.
Update all operands in that case and remove the assert. PR15805.

llvm-svn: 179982
 2013-04-21 17:48:39 +00:00
Arnold Schwaighofer
76cf4c753d Revert "SimplifyCFG: If convert single conditional stores" 
There is the temptation to make this tranform dependent on target information as
it is not going to be beneficial on all (sub)targets. Therefore, we should
probably do this in MI Early-Ifconversion.

This reverts commit r179957. Original commit message:

"SimplifyCFG: If convert single conditional stores

This transformation will transform a conditional store with a preceeding
uncondtional store to the same location:

a[i] =
may-alias with a[i] load
if (cond)
    a[i] = Y
into an unconditional store.

a[i] = X
may-alias with a[i] load
tmp = cond ? Y : X;
a[i] = tmp

We assume that on average the cost of a mispredicted branch is going to be
higher than the cost of a second store to the same location, and that the
secondary benefits of creating a bigger basic block for other optimizations to
work on outway the potential case were the branch would be correctly predicted
and the cost of the executing the second store would be noticably reflected in
performance.

hmmer's execution time improves by 30% on an imac12,2 on ref data sets. With
this change we are on par with gcc's performance (gcc also performs this
transformation). There was a 1.2 % performance improvement on a ARM swift chip.
Other tests in the test-suite+external seem to be mostly uninfluenced in my
experiments:
This optimization was triggered on 41 tests such that the executable was
different before/after the patch. Only 1 out of the 40 tests (dealII) was
reproducable below 100% (by about .4%). Given that hmmer benefits so much I
believe this to be a fair trade off.

I am going to watch performance numbers across the builtbots and will revert
this if anything unexpected comes up."

llvm-svn: 179980
 2013-04-21 13:09:04 +00:00
Tim Northover
593f76e08e ARM: fix part of test which actually needed an asserts build 
This should fix a buildbot failure that occurred after r179977.

llvm-svn: 179978
 2013-04-21 12:20:19 +00:00
Tim Northover
943f2a9234 ARM: Use ldrd/strd to spill 64-bit pairs when available. 
This allows common sp-offsets to be part of the instruction and is
probably faster on modern CPUs too.

llvm-svn: 179977
 2013-04-21 11:57:07 +00:00
Sylvestre Ledru
d6a0ccfc56 Remove the executable bit on cmake files 
llvm-svn: 179976
 2013-04-21 09:04:59 +00:00
Nadav Rotem
e567845da4 SLPVectorize: Add support for vectorization of casts. 
llvm-svn: 179975
 2013-04-21 08:05:59 +00:00
Nadav Rotem
b0e93c71e8 SLPVectorizer: Fix a bug in the code that scans the tree in search of nodes with multiple users. 
We did not terminate the switch case and we executed the search routine twice.

llvm-svn: 179974
 2013-04-21 07:37:56 +00:00
Michael Gottesman
7577b1c190 [objc-arc] Cleaned up tail-call-invariant-enforcement.ll. 
Specifically:

1. Added checks that unwind is being properly added to various instructions.
2. Fixed the declaration/calling of objc_release to have a return type of void.
3. Moved all checks to precede the functions and added checks to ensure that the
checks would only match inside the specific function that we are attempting to
check.

llvm-svn: 179973
 2013-04-21 02:59:44 +00:00
Michael Gottesman
3af6adbc8d [objc-arc] Check that objc-arc-expand properly handles all strictly forwarding calls and does not touch calls which are not strictly forwarding (i.e. objc_retainBlock). 
llvm-svn: 179972
 2013-04-21 01:57:46 +00:00
Michael Gottesman
03f1fec178 [objc-arc] Renamed the test file clang-arc-used-intrinsic-removed-if-isolated.ll -> intrinsic-use-isolated.ll to match the other test file intrinsic-use.ll. 
llvm-svn: 179971
 2013-04-21 01:42:24 +00:00
Bill Wendling
61eb6957c5 Remove tbaa metadata. 
llvm-svn: 179970
 2013-04-21 01:38:25 +00:00