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c40874054e
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Author SHA1 Message Date
Vikram S. Adve
c40874054e Support for annul/pred and other future flags on op codes. 
Support for recording the physical register for implcit references.

llvm-svn: 6471
 2003-05-31 07:43:01 +00:00
Vikram S. Adve
540655e2ae Minor changes. 
llvm-svn: 6470
 2003-05-31 07:41:54 +00:00
Vikram S. Adve
d43c10b583 Added MachineCodeForInstruction object as an argument to 
TmpInstruction constructors because every TmpInstruction object has
to be registered with a MachineCodeForInstruction to prevent leaks.
This simplifies the user's code.

llvm-svn: 6469
 2003-05-31 07:41:24 +00:00
Vikram S. Adve
b2bb0dd8ca Allow explicit physical registers for implicit operands. 
llvm-svn: 6468
 2003-05-31 07:39:06 +00:00
Vikram S. Adve
2d906f4550 Changes to allow explicit physical register arguments that have been 
preallocated.  While reg-to-reg dependences were already handled, this
change required new code for adding edges to/from call instructions.
This was part of the extensive changes to the way code generation occurs
for function call arguments and return values.
See log for CodeGen/PhyRegAlloc.cpp.

llvm-svn: 6467
 2003-05-31 07:37:05 +00:00
Vikram S. Adve
83409b0b78 Several bug fixes: globals in call operands were not being pulled out; 
globals in some other places may not have been pulled out either;
globals in phi operands were being put just before the phi instead of
in the predecessor basic blocks.

llvm-svn: 6466
 2003-05-31 07:34:57 +00:00
Vikram S. Adve
194a5862e0 Extensive changes to the way code generation occurs for function 
call arguments and return values:
Now all copy operations before and after a call are generated during
selection instead of during register allocation.
The values are copied to virtual registers (or to the stack), but
in the former case these operands are marked with the correct physical
registers according to the calling convention.
Although this complicates scheduling and does not work well with
live range analysis, it simplifies the machine-dependent part of
register allocation.

llvm-svn: 6465
 2003-05-31 07:32:01 +00:00
Vikram S. Adve
884f4c7a97 Reverting previous beautification changes. 
llvm-svn: 6464
 2003-05-31 07:27:17 +00:00
Misha Brukman
afa8e60f9f Fixed rewriting of branches -- they now work forward and backward. 
llvm-svn: 6463
 2003-05-31 06:26:48 +00:00
Misha Brukman
be11d6eed3 Removed useless code -- the byte order of output code is correct as is. 
llvm-svn: 6462
 2003-05-31 06:26:06 +00:00
Misha Brukman
32fae9b78a The 'rd' register is consistently mentioned last in instruction definitions. 
Created new classes from which instructions inherit their ordering of fields.

llvm-svn: 6461
 2003-05-31 06:25:19 +00:00
Misha Brukman
ee757debd1 * Put back into action SLL/SRL/SRA{r,i}6 instructions 
* Fixed page numbers referring to the Sparc manual

llvm-svn: 6460
 2003-05-31 06:24:29 +00:00
Misha Brukman
3fc07ad7b8 Code beautification, no functional changes. 
llvm-svn: 6459
 2003-05-31 06:22:37 +00:00
Vikram S. Adve
6e8b499993 3 more bugs from the SPEC codes and from richards_benchmark.c 
llvm-svn: 6458
 2003-05-31 04:45:56 +00:00
Misha Brukman
a49daf449e Enabling some of these passes causes lli to break 
llvm-svn: 6457
 2003-05-31 04:23:04 +00:00
Misha Brukman
0fae161230 The actual order of parameters in a 2-reg-immediate assembly instructions is 
"rs1, imm, rd": most importantly, rd goes last.

llvm-svn: 6456
 2003-05-31 04:22:26 +00:00
Chris Lattner
9a68ce5e89 New testcase 
llvm-svn: 6454
 2003-05-30 21:03:00 +00:00
Misha Brukman
a9a5c77dd4 Since malloc is no longer used, no need to free() memory. 
Fixed BasicBlock patching by supplying correct type for the displacement.

llvm-svn: 6453
 2003-05-30 20:39:37 +00:00
Misha Brukman
b1b8a6732e When converting virtual registers to immediate constants, change the opcode. 
llvm-svn: 6452
 2003-05-30 20:36:27 +00:00
Misha Brukman
c5a1e94883 Added saveBBreferences() for BasicBlock resolution. 
llvm-svn: 6451
 2003-05-30 20:32:45 +00:00
Misha Brukman
62904a1538 getValueOp() now takes a MachineInstr as well as a MachineOperand. 
llvm-svn: 6450
 2003-05-30 20:32:01 +00:00
Misha Brukman
d40446e90c Added: 
* ability to save BasicBlock references to be resolved later
* register remappings from the enum values to the real hardware numbers

llvm-svn: 6449
 2003-05-30 20:17:33 +00:00
Misha Brukman
6b36ebb7a9 Fixed the namespace to match SparcInternals.h; added notes on some missing 
sections of instructions.

llvm-svn: 6448
 2003-05-30 20:15:59 +00:00
Misha Brukman
0edfa6f237 The register types need to be visible outside of the class to be useful. 
For one, converting register numbers based on class in the code emitter.

llvm-svn: 6447
 2003-05-30 20:12:42 +00:00
Misha Brukman
ce67ffb229 Moved and expanded convertOpcodeFromRegToImm() to conver more opcodes. 
Code beautification for the rest of the code: changed layout to match the rest
of the code base.

llvm-svn: 6446
 2003-05-30 20:11:56 +00:00
Misha Brukman
e787ba07ed Make LLI behave just like LLC with regard to the compile passes it uses. 
llvm-svn: 6444
 2003-05-30 20:00:13 +00:00
Chris Lattner
a05571b144 Add SRoA pass to gccas 
llvm-svn: 6442
 2003-05-30 19:24:06 +00:00
Chris Lattner
e4108c9550 Move indvars pass after mem2reg pass where it is more likely to be useful 
llvm-svn: 6441
 2003-05-30 19:23:10 +00:00
Chris Lattner
1c10a30949 Okay totally give up on trying to optimize aggregates that cannot be completely 
broken up into their elements.  Too many programs break because of this.

llvm-svn: 6440
 2003-05-30 19:22:14 +00:00
Misha Brukman
f4345bcdb6 Made the register and immediate versions of instructions consecutive. 
llvm-svn: 6439
 2003-05-30 19:14:01 +00:00
Chris Lattner
bf8c1cb6a3 add a check that allows the SRoA pass to avoid breaking programs, even if their 
behavior is technically undefined

llvm-svn: 6438
 2003-05-30 18:09:57 +00:00
Misha Brukman
9c38927f33 Because the format of the shift instructions is `shift r, shcnt, r', the 
instructions of format 3.12 and 3.13 cannot inherit from F3rdrs1, because that
implies that the two registers are the first two parameters to the instruction.

Thus I made the instructions inherit from F3rd again, and manually added an rs1
field AFTER the shcnt field in the instruction, which maps to the appropriate
place in the instruction.

The other changes are just elimination of unnecessary spaces.

llvm-svn: 6437
 2003-05-30 18:06:10 +00:00
Tanya Lattner
ceefb5002a Sorry, correcting small typo. 
llvm-svn: 6433
 2003-05-30 15:53:50 +00:00
John Criswell
4cbc824e38 Added configurable options for the Linker and Archiver. 
llvm-svn: 6432
 2003-05-30 15:50:31 +00:00
Tanya Lattner
ce23a1f169 Added the CloneTrace function which clones traces. It takes a vector of basic blocks, removes 
internal phi nodes, and returns a new vector of basic blocks.

llvm-svn: 6431
 2003-05-30 15:50:18 +00:00
Tanya Lattner
117f7c0082 Added support for cloning a trace. 
llvm-svn: 6430
 2003-05-30 15:48:23 +00:00
Brian Gaeke
240b6d81b8 Makefile: Make SparcV9CodeEmitter.inc depend on SparcV9_F*.td as well. 
SparcV9_F3.td: F3_12 and F3_13 instructions have rd and rs1 fields. Also,
 their fields were totally screwed up. This seems to fix the problem.

llvm-svn: 6429
 2003-05-30 08:02:14 +00:00
Chris Lattner
c9d950434b Fix bug: ScalarRepl/2003-05-30-MultiLevel.ll 
llvm-svn: 6428
 2003-05-30 05:26:30 +00:00
Chris Lattner
43ab06fba5 New testcase 
llvm-svn: 6427
 2003-05-30 05:26:08 +00:00
Chris Lattner
0d415b2dd3 Fix bug: ScalarRepl/2003-05-29-ArrayFail.ll 
llvm-svn: 6425
 2003-05-30 04:15:41 +00:00
Brian Gaeke
ad23dd697f Fix call to mmap, so that it can be used on sparc. 
llvm-svn: 6424
 2003-05-30 03:37:13 +00:00
Guochun Shi
21f3083978 so far everything compiles 
llvm-svn: 6423
 2003-05-30 00:17:09 +00:00
Sumant Kowshik
d26d2d9d2b Implementation of Equivalence Classes 
llvm-svn: 6422
 2003-05-29 22:44:25 +00:00
Sumant Kowshik
f022bd6bf3 Changes to support function pointers 
llvm-svn: 6421
 2003-05-29 22:43:46 +00:00
Sumant Kowshik
3186cb2b05 Added support for function pointers 
llvm-svn: 6420
 2003-05-29 22:42:44 +00:00
Misha Brukman
7b26d58686 Prevent lines from wrapping. 
llvm-svn: 6419
 2003-05-29 22:12:35 +00:00
Dinakar Dhurjati
04a21368b8 Added documentation for the project options 
llvm-svn: 6418
 2003-05-29 21:49:00 +00:00
Chris Lattner
37fc07da9b New testcase 
llvm-svn: 6417
 2003-05-29 21:07:34 +00:00
Chris Lattner
ff029041a5 Get rid of extraneous ""s 
llvm-svn: 6416
 2003-05-29 20:40:32 +00:00
Chris Lattner
58c7aaa0e5 Add comment 
llvm-svn: 6415
 2003-05-29 20:26:30 +00:00