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Commit Graph

132134 Commits

Author SHA1 Message Date
Quentin Colombet
1daaa38901 [RegBankSelect] Look for the best mapping in greedy mode.
The Fast mode takes the first mapping, the greedy mode loops over all
the possible mapping for an instruction and choose the cheaper one.
Test case will come with target specific code, since we currently do not
have instructions that have several mappings.

llvm-svn: 270249
2016-05-20 18:37:33 +00:00
Chris Bieneman
7d36545403 [MachOYAML] Removing duplicated field from LC_UUID YAML
The uuid_command was duplicating the load_command.cmdsize field. This removes the duplicate from the YAML mapping and from the test cases.

llvm-svn: 270248
2016-05-20 18:36:52 +00:00
Quentin Colombet
ea428b668a [RegBankSelect] Get rid of a now dead method: setSafeInsertPoint.
This is now encapsulated in the RepairingPlacement class.

llvm-svn: 270247
2016-05-20 18:17:16 +00:00
David Majnemer
7c0e6f025f [X86] Reduce memory allocations in X86TargetMachine::getSubtargetImpl
We performed a number of memory allocations each time getTTI was called,
remove them by using SmallString.
No functionality change intended.

llvm-svn: 270246
2016-05-20 18:16:06 +00:00
Quentin Colombet
a8b9dff8f7 [RegBankSelect] Take advantage of a potential best cost information in
computeMapping.

Computing the cost of a mapping takes some time.
Since in Fast mode, the cost is irrelevant, just spare some cycles by not
computing it.
In Greedy mode, we need to choose the best cost, that means that when
the local cost gets more expensive than the best cost, we can stop
computing the repairing and cost for the current mapping.

llvm-svn: 270245
2016-05-20 18:00:46 +00:00
Quentin Colombet
f5dd7f7b19 [RegBankSelect] Use frequency and probability information to compute
more precise cost in Greedy mode.

In Fast mode the cost is irrelevant so do not bother requiring that
those passes get scheduled.

llvm-svn: 270244
2016-05-20 17:54:09 +00:00
Quentin Colombet
bc0aff52a0 [RegBankSelect] Use the Fast mode for functions with the optnone attribute.
llvm-svn: 270242
2016-05-20 17:36:54 +00:00
Chris Bieneman
ee3389f5e9 [obj2yaml][yaml2obj] Adding enumFallback for MachO load commands
This adds support for handling unknown load commands, and a bogus_load_command tests.

Unknown or unsupported load commands can be specified in YAML by their hex value.

llvm-svn: 270239
2016-05-20 17:20:42 +00:00
Sanjay Patel
d0547f1204 fix comments; NFC
llvm-svn: 270237
2016-05-20 17:07:19 +00:00
Sanjay Patel
2fd53c6d6b use range-loops; NFCI
llvm-svn: 270236
2016-05-20 17:00:10 +00:00
Quentin Colombet
3d214a2bd4 [RegBankSelect] Specify different optimization mode for the pass.
The mode should be choose by the target when instantiating the pass.

llvm-svn: 270235
2016-05-20 16:55:35 +00:00
Sanjay Patel
56256e385a fix documentation comments; NFC
llvm-svn: 270234
2016-05-20 16:46:01 +00:00
Krzysztof Parzyszek
e163deaf59 Fix error reporting in register scavenger (lack of emergency spill slot)
- Do not store Twine objects.
- Remove report_fatal_error, since llvm_unreachable does terminate the
  program in release mode.

llvm-svn: 270233
2016-05-20 16:38:34 +00:00
Quentin Colombet
e037aadc61 [RegBankSelect] Add a method to avoid splitting while repairing.
The previous choice of the insertion points for repairing was
straightfoward but may introduce some basic block or edge splitting. In
some situation this is something we can avoid.
For instance, when repairing a phi argument, instead of placing the
repairing on the related incoming edge, we may move it to the previous
block, before the terminators. This is only possible when the argument
is not defined by one of the terminator.

llvm-svn: 270232
2016-05-20 16:36:12 +00:00
Davide Italiano
0d97132cda [PM/PartiallyInlineLibCalls] Fix pass dependencies.
Inline getAnalysisUsage() while I'm here.

llvm-svn: 270231
2016-05-20 16:23:14 +00:00
Simon Pilgrim
95ba516d50 [X86][AVX] Generalized matching for target shuffle combines
This patch is a first step towards a more extendible method of matching combined target shuffle masks.

Initially this just pulls out the existing basic mask matches and adds support for some 256/512 bit equivalents. Future patterns will require a number of features to be added but I wanted to keep this patch simple.

I hope we can avoid duplication between shuffle lowering and combining and share more complex pattern match functions in future commits.

Differential Revision: http://reviews.llvm.org/D19198

llvm-svn: 270230
2016-05-20 16:19:30 +00:00
Simon Pilgrim
a938465a18 [X86][AVX] Sync with clang/test/CodeGen/avx-builtins.c
llvm-svn: 270229
2016-05-20 16:05:55 +00:00
Davide Italiano
40ec2b9ed7 [PartiallyInlineLibCalls] Remove dead includes. NFC.
llvm-svn: 270228
2016-05-20 15:52:23 +00:00
Davide Italiano
4bbe3cd0f0 [PM/PartiallyInlineLibCalls] Convert to static function in preparation for porting this pass to the new PM.
llvm-svn: 270225
2016-05-20 15:43:39 +00:00
Sanjay Patel
41ae96619d [SimplifyCFG] eliminate switch cases based on known range of switch condition
This was noted in PR24766:
https://llvm.org/bugs/show_bug.cgi?id=24766#c2

We may not know whether the sign bit(s) are zero or one, but we can still
optimize based on knowing that the sign bit is repeated.

Differential Revision: http://reviews.llvm.org/D20275

llvm-svn: 270222
2016-05-20 14:53:09 +00:00
Krzysztof Parzyszek
894bb33fce Correction to r270219: fix detection of invalid frame index
llvm-svn: 270220
2016-05-20 14:34:03 +00:00
Krzysztof Parzyszek
3535601298 Skip entries with invalid indexes in the search loop in register scavenger
llvm-svn: 270219
2016-05-20 14:18:54 +00:00
Sanjay Patel
7dea78f421 [MCExpr] avoid UB via negation of INT_MIN
I accidentally exposed a bug in MCExpr::evaluateAsRelocatableImpl() with the test file added in:
http://reviews.llvm.org/rL269977

Differential Revision: http://reviews.llvm.org/D20434

llvm-svn: 270218
2016-05-20 14:09:41 +00:00
Krzysztof Parzyszek
4f2926bc68 [Hexagon] Use pipe instead of temporary files in tests
llvm-svn: 270217
2016-05-20 14:01:34 +00:00
Rafael Espindola
3acc1df4cd Refactor X86 symbol access classification.
This refactors the logic in X86 to avoid code duplication. It also
splits it in two steps: it first decides if a symbol is local to the DSO
and then uses that information to decide how to access it.

The first part is implemented by shouldAssumeDSOLocal. It is not in any
way specific to X86. In a followup patch I intend to move it to
somewhere common and reused it in other backends.

llvm-svn: 270209
2016-05-20 12:20:10 +00:00
Rafael Espindola
8b4b8109e9 Simplify handling of hidden stubs on PowerPC.
We now handle them just like non hidden ones. This was already the case
on x86 (r207518) and arm (r207517).

llvm-svn: 270205
2016-05-20 12:00:52 +00:00
NAKAMURA Takumi
60e2685884 SparcISelLowering.cpp: Add missing StringSwitch.h
llvm-svn: 270200
2016-05-20 10:53:56 +00:00
Chris Dewhurst
1afaa64b44 [Sparc] Implement getRegisterByName.
Allows Sparc registers to be specifically referred to in inline assembly.

llvm-svn: 270198
2016-05-20 10:21:01 +00:00
Benjamin Kramer
a123062071 [ProfileData] Thread unique_ptr through the summary builder to avoid leaks.
llvm-svn: 270195
2016-05-20 09:18:37 +00:00
Igor Kudrin
18d682df79 [Coverage] Fix an issue where improper coverage mapping data could be loaded for an inline function.
If an inline function is observed but unused in a translation unit, dummy
coverage mapping data with zero hash is stored for this function.
If such a coverage mapping section came earlier than real one, the latter
was ignored. As a result, llvm-cov was unable to show coverage information
for those functions.

Differential Revision: http://reviews.llvm.org/D20286

llvm-svn: 270194
2016-05-20 09:14:24 +00:00
Chris Dewhurst
08a87b67ef [Sparc] Enable more inline assembly constraints.
Note: This is specifically to allow GCC's test pr44707 to pass.

Trivial change, not put for differential revision. Test included.

llvm-svn: 270192
2016-05-20 09:03:01 +00:00
Diana Picus
2fe376f63f Fix some comment typos in SelectionDAGBuilder. NFC
llvm-svn: 270190
2016-05-20 08:06:31 +00:00
Saleem Abdulrasool
2fe41d42b0 Target: move enum back into MC
Move the enumeration back to avoid the layering violation.  Should repair the
modules build.

llvm-svn: 270184
2016-05-20 05:13:35 +00:00
Craig Topper
3d9d65f12a [X86] Run the AVX/AVX2 intrinsic tests in AVX512VL mode too just to make sure we don't break any older intrinsics.
llvm-svn: 270183
2016-05-20 05:10:32 +00:00
Craig Topper
1780b40874 [X86] Fix another AVX pattern to only be disable if VLX and BWI are supported.
llvm-svn: 270182
2016-05-20 05:10:27 +00:00
Saleem Abdulrasool
7a9c99b407 Target: move the EH enumeration and add option
Move the ExceptionHandling enumeration into TargetOptions and introduce a field
to track the desired exception model.  This will allow us to set the exception
model from the frontend (needed to optionally use SjLj EH on other targets where
zero-cost is available and preferred).

llvm-svn: 270178
2016-05-20 03:39:28 +00:00
Jacques Pienaar
b966c4f1a6 [lanai] Use Optional<Reloc> in LanaiTargetMachine.
Follow r269988 and use Optional<Reloc>.

llvm-svn: 270176
2016-05-20 03:21:37 +00:00
Craig Topper
4b288a1e5a Revert accidental commit of a test command line addition.
llvm-svn: 270175
2016-05-20 02:01:51 +00:00
Craig Topper
195c9b10ae [X86] Fix some AVX patterns to only be disabled if VLX and BWI are supported. Without this we get isel failures on the avx-intrinsics-x86.ll test in AVX512VL.
llvm-svn: 270174
2016-05-20 02:00:08 +00:00
Dan Liew
6e0cb44dfd [LibFuzzer] Fix implementation of `GetPeakRSSMb()` on Mac OSX.
On Linux ``rusage.ru_maxrss`` is in KiB but on Mac OSX it is in bytes.

Differential Revision: http://reviews.llvm.org/D20410

llvm-svn: 270173
2016-05-20 01:37:54 +00:00
Dan Liew
5f9fb67e87 [LibFuzzer] Fix `NumberOfCpuCores()` on Mac OSX.
The ``nprocs`` command does not exist under Mac OSX so use
``sysctl`` instead on that platform.

Whilst I'm here

* Use ``pclose()`` instead of ``fclose()`` which the ``popen()``
  documentation says should be used.
* Check for errors that were previously unhandled.

Differential Revision: http://reviews.llvm.org/D20409

llvm-svn: 270172
2016-05-20 01:30:36 +00:00
Dylan McKay
e6c6905f3e Add AVRTargetStreamers
Reviewed by Matt Arsenault in http://reviews.llvm.org/D16311

llvm-svn: 270171
2016-05-20 01:17:38 +00:00
Quentin Colombet
831af7c5fc [RegBankSelect] Refactor the code to split the repairing and mapping of
an instruction.

Use the previously introduced RepairingPlacement class to split the code
computing the repairing placement from the code doing the actual
placement. That way, we will be able to consider different placement and
then, only apply the best one.

llvm-svn: 270168
2016-05-20 00:55:51 +00:00
Quentin Colombet
6648df1d84 [RegBankSelect] Add helper class for repairing code placement.
When assigning the register banks we may have to insert repairing code
to move already assigned values accross register banks.

Introduce a few helper classes to keep track of what is involved in the
repairing of an operand:
- InsertPoint and its derived classes record the positions, in the CFG,
  where repairing has to be inserted.
- RepairingPlacement holds all the insert points for the repairing of an
  operand plus the kind of action that is required to do the repairing.

This is going to be used to keep track of how the repairing should be
done, while comparing different solutions for an instruction. Indeed, we
will need the repairing placement to capture the cost of a solution and
we do not want to compute it a second time when we do the actual
repairing.

llvm-svn: 270167
2016-05-20 00:49:10 +00:00
Quentin Colombet
3b5a443ef3 [RegBankSelect] Refactor assignmentMatch to avoid testing the current
register bank twice.

Prior to this change, we were checking if the assignment for the current
machine operand was matching, then we would check if the mismatch
requires to insert repair code.
We actually already have this information from the first check, so just
pass it along.

NFCI.

llvm-svn: 270166
2016-05-20 00:42:57 +00:00
Rafael Espindola
2844c2359f Fix pr27728.
Sorry for the lack testcase. There is one in the pr, but it depends on
std::sort and the .ll version is 110 lines, so I don't think it is
wort it.

The bug was that we were sorting after adding a terminator, and the
sorting algorithm could end up putting the terminator in the middle of
the List vector.

With that we would create a Spans map entry keyed on nullptr which would
then be added to CUs and fail in that sorting.

llvm-svn: 270165
2016-05-20 00:38:28 +00:00
Quentin Colombet
b67f0beee7 [RegBankSelect] Introduce MappingCost helper class.
This helper class will be used to represent the cost of mapping an
instruction to a specific register bank.
The particularity of these costs is that they are mostly local, thus the
frequency of the basic block is irrelevant. However, for few
instructions (e.g., phis and terminators), the cost may be non-local and
then, we need to account for the frequency of the involved basic blocks.

This will be used by the greedy mode I am working on.

llvm-svn: 270163
2016-05-20 00:35:26 +00:00
Richard Smith
0174897015 Restore ASCIIbetical order.
llvm-svn: 270161
2016-05-20 00:05:55 +00:00
Chris Bieneman
04f5e2c0d4 [obj2yaml] [yaml2obj] Adding a test for r270124
This test covers strings after load command structs and zero fill bytes.

llvm-svn: 270159
2016-05-19 23:26:39 +00:00
Chris Bieneman
2718792478 [yaml2obj] Removing debug code that scribbled 0xDEADBEEF
Now that MachO load command fields are fully covered we can fill unaccounted for bytes with 0. That allows us to sparsely specify YAML to simplify tests.

Simplifying load_commands test accordingly.

llvm-svn: 270158
2016-05-19 23:26:31 +00:00