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200 Commits

Author SHA1 Message Date
Dale Johannesen
bd87541147 Describe tail merging's use of InsertBranch. 
llvm-svn: 65062
 2009-02-19 19:40:21 +00:00
Evan Cheng
9dc1507838 Turns out AnalyzeBranch can modify the mbb being analyzed. This is a nasty 
suprise to some callers, e.g. register coalescer. For now, add an parameter
that tells AnalyzeBranch whether it's safe to modify the mbb. A better
solution is out there, but I don't have time to deal with it right now.

llvm-svn: 64124
 2009-02-09 07:14:22 +00:00
Evan Cheng
e00df1d39c Move getPointerRegClass from TargetInstrInfo to TargetRegisterInfo. 
llvm-svn: 63938
 2009-02-06 17:43:24 +00:00
Evan Cheng
381b2df5ff Add TargetInstrInfo::isSafeToMoveRegisterClassDefs. It returns true if it's safe to move an instruction which defines a value in the register class. Replace pre-splitting specific IgnoreRegisterClassBarriers with this new hook. 
llvm-svn: 63936
 2009-02-06 17:17:30 +00:00
Evan Cheng
b3c82db63d Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well. 
llvm-svn: 62600
 2009-01-20 19:12:24 +00:00
Dan Gohman
d55f68eef2 Fix a typo in a comment. 
llvm-svn: 61035
 2008-12-15 17:26:50 +00:00
Dan Gohman
74529a2226 Split foldMemoryOperand into public non-virtual and protected virtual 
parts, and add target-independent code to add/preserve
MachineMemOperands.

llvm-svn: 60488
 2008-12-03 18:43:12 +00:00
Dan Gohman
04e99d0f3f Add more const qualifiers. This fixes build breakage from r59540. 
llvm-svn: 59542
 2008-11-18 19:49:32 +00:00
Evan Cheng
3bcbccf563 For now, don't split live intervals around x87 stack register barriers. FpGET_ST0_80 must be right after a call instruction (and ADJCALLSTACKUP) so we need to find a way to prevent reload of x87 registers between them. 
llvm-svn: 58230
 2008-10-27 07:14:50 +00:00
Evan Cheng
7156715793 Add storeRegTo{StackSlot|Addr} and loadRegFrom{StackSlot|Addr} descriptions. 
llvm-svn: 58164
 2008-10-25 23:08:22 +00:00
Dan Gohman
1c36874fdd Fix a typo in a comment. 
llvm-svn: 57832
 2008-10-20 15:58:02 +00:00
Dan Gohman
86527c1834 Const-ify several TargetInstrInfo methods. 
llvm-svn: 57622
 2008-10-16 01:49:15 +00:00
Evan Cheng
a056deb8b1 Clarify meaning of copyRegToReg's return value. 
llvm-svn: 57449
 2008-10-13 17:30:56 +00:00
Cedric Venet
62a65ed510 - small bug corrected: incorrect iterator type. 
- fix to please VS: add a return after an assert.

llvm-svn: 55380
 2008-08-26 19:49:04 +00:00
Owen Anderson
5fef19facf Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy requested 
was inserted or not.  This allows bitcast in fast isel to properly handle the case
where an appropriate reg-to-reg copy is not available.

llvm-svn: 55375
 2008-08-26 18:03:31 +00:00
Owen Anderson
600a8ca0d5 Convert uses of std::vector in TargetInstrInfo to SmallVector. This change had to be propoagated down into all the targets and up into all clients of this API. 
llvm-svn: 54802
 2008-08-14 22:49:33 +00:00
Dan Gohman
dd8c0b17bf Clarify the comments here, to make slightly more clear the 
difference in purpose of TargetInstrInfo and TargetInstrDesc,
which isn't immediately obvious from the name.

llvm-svn: 53683
 2008-07-16 16:02:59 +00:00
Owen Anderson
604f9f722d Make LiveVariables even more optional, by making it optional in the call to TargetInstrInfo::convertToThreeAddressInstruction 
Also, if LV isn't around, then TwoAddr doesn't need to be updating flags, since they won't have been set in the first place.

llvm-svn: 53058
 2008-07-02 23:41:07 +00:00
Dan Gohman
c8097f8c8c Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminating 
the need for a flavor operand, and add a new SDNode subclass,
LabelSDNode, for use with them to eliminate the need for a label id
operand.

Change instruction selection to let these label nodes through
unmodified instead of creating copies of them. Teach the MachineInstr
emitter how to emit a MachineInstr directly from an ISD label node.

This avoids the need for allocating SDNodes for the label id and
flavor value, as well as SDNodes for each of the post-isel label,
label id, and label flavor.

llvm-svn: 52943
 2008-07-01 00:05:16 +00:00
Evan Cheng
2dfe8c2435 Add option to commuteInstruction() which forces it to create a new (commuted) instruction. 
llvm-svn: 52308
 2008-06-16 07:33:11 +00:00
Bill Wendling
646f3458c4 Constify the machine instruction passed into the 
"is{Trivially,Really}ReMaterializable" methods.

llvm-svn: 51001
 2008-05-12 20:54:26 +00:00
Nicolas Geoffray
82baa2d2c6 Infrastructure for getting the machine code size of a function and an instruction. X86, PowerPC and ARM are implemented 
llvm-svn: 49809
 2008-04-16 20:10:13 +00:00
Evan Cheng
38a755499d Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo. 
llvm-svn: 48995
 2008-03-31 20:40:39 +00:00
Christopher Lamb
b4f4b41048 Make insert_subreg a two-address instruction, vastly simplifying LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register. 
llvm-svn: 48412
 2008-03-16 03:12:01 +00:00
Evan Cheng
11d2c09adc Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF. 
llvm-svn: 48380
 2008-03-15 00:03:38 +00:00
Christopher Lamb
0f1c32eb63 Get rid of a pseudo instruction and replace it with subreg based operation on real instructions, ridding the asm printers of the hack used to do this previously. In the process, update LowerSubregs to be careful about eliminating copies that have side affects. 
Note: the coalescer will have to be careful about this too, when it starts coalescing insert_subreg nodes.
llvm-svn: 48329
 2008-03-13 05:47:01 +00:00
Evan Cheng
2cb3fd8f72 Added CommuteChangesDestination(). This returns true if commuting the specified 
machine instr will change its definition register.

llvm-svn: 47166
 2008-02-15 18:21:33 +00:00
Evan Cheng
90f03a0b88 It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned. 
llvm-svn: 46893
 2008-02-08 21:20:40 +00:00
Evan Cheng
c57ec111f2 SDIsel processes llvm.dbg.declare by recording the variable debug information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc. 
Added ISD::DECLARE node type to represent llvm.dbg.declare intrinsic. Now the intrinsic calls are lowered into a SDNode and lives on through out the codegen passes.
For now, since all the debugging information recording is done at isel time, when a ISD::DECLARE node is selected, it has the side effect of also recording the variable. This is a short term solution that should be fixed in time.

llvm-svn: 46659
 2008-02-02 04:07:54 +00:00
Chris Lattner
bfffa4f21e Simplify the side effect stuff a bit more and make licm/sinking 
both work right according to the new flags.

This removes the TII::isReallySideEffectFree predicate, and adds
TII::isInvariantLoad. 

It removes NeverHasSideEffects+MayHaveSideEffects and adds
UnmodeledSideEffects as machine instr flags.  Now the clients
can decide everything they need.

I think isRematerializable can be implemented in terms of the
flags we have now, though I will let others tackle that.

llvm-svn: 45843
 2008-01-10 23:08:24 +00:00
Chris Lattner
ba567fa77b split TargetInstrDesc out into its own header file. 
llvm-svn: 45696
 2008-01-07 07:33:08 +00:00
Chris Lattner
f83aae613c rename TargetInstrDescriptor -> TargetInstrDesc. 
Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.

llvm-svn: 45695
 2008-01-07 07:27:27 +00:00
Chris Lattner
c9e870d7c6 remove a dead method. 
llvm-svn: 45694
 2008-01-07 06:47:10 +00:00
Chris Lattner
57e851edfe Rename all the M_* flags to be namespace qualified enums, and switch 
all clients over to using predicates instead of these flags directly.
These are now private values which are only to be used to statically
initialize the tables.

llvm-svn: 45692
 2008-01-07 06:42:05 +00:00
Chris Lattner
c745aa59b3 add more and significantly better comments to the rest of the machineinstr 
flags that can be set.  Add predicates for the ones lacking it, and switch
some clients over to using the predicates instead of Flags directly.

llvm-svn: 45690
 2008-01-07 06:21:53 +00:00
Chris Lattner
1cdb8f4da1 add some mroe comments, add a isImplicitDef() method, add 
isConditionalBranch() and isUnconditionalBranch() methods.

llvm-svn: 45688
 2008-01-07 05:38:38 +00:00
Chris Lattner
9b987de2c5 rename hasVariableOperands() -> isVariadic(). Add some comments. 
Evan, please review the comments I added to getNumDefs to make sure
that they are accurate, thx.

llvm-svn: 45687
 2008-01-07 05:19:29 +00:00
Chris Lattner
b0e50db817 Move M_* flags down in the file. Move SchedClass up in the 
TargetInstrDescriptor class and shrink to 16-bits, saving a 
word in TargetInstrDescriptor.  Add some comments.

llvm-svn: 45686
 2008-01-07 05:06:49 +00:00
Chris Lattner
9d38dfa4a5 Move a bunch more accessors from TargetInstrInfo to TargetInstrDescriptor 
llvm-svn: 45680
 2008-01-07 03:13:06 +00:00
Chris Lattner
55343065e3 remove MachineOpCode typedef. 
llvm-svn: 45679
 2008-01-07 02:48:55 +00:00
Chris Lattner
96d0a93f8e remove some uses of MachineOpCode, move getSchedClass 
into TargetInstrDescriptor from TargetInstrInfo.

llvm-svn: 45678
 2008-01-07 02:46:03 +00:00
Chris Lattner
93e1e6ee12 Add predicates methods to TargetOperandInfo, and switch all clients 
over to using them, instead of diddling Flags directly.  Change the
various flags from const variables to enums.

llvm-svn: 45677
 2008-01-07 02:39:19 +00:00
Chris Lattner
f7f96d818f Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects 
that it is cheap and efficient to get.

Move a variety of predicates from TargetInstrInfo into 
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around.  Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.

Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.

llvm-svn: 45674
 2008-01-07 01:56:04 +00:00
Owen Anderson
f19692b2f6 Move even more functionality from MRegisterInfo into TargetInstrInfo. 
Some day I'll get it all moved over...

llvm-svn: 45672
 2008-01-07 01:35:02 +00:00
Chris Lattner
14310afe42 rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate. 
llvm-svn: 45667
 2008-01-06 23:38:27 +00:00
Chris Lattner
5489888580 rename isStore -> mayStore to more accurately reflect what it captures. 
llvm-svn: 45656
 2008-01-06 08:36:04 +00:00
Chris Lattner
06c02cdcbc describe isStore and simplify the implementation of hasUnmodelledSideEffects. 
No functionality change. 

llvm-svn: 45651
 2008-01-06 05:43:21 +00:00
Owen Anderson
2adf8c5533 Move some more functionality from MRegisterInfo to TargetInstrInfo. 
llvm-svn: 45603
 2008-01-04 23:57:37 +00:00
Owen Anderson
e6856128ab Move some more instruction creation methods from RegisterInfo into InstrInfo. 
llvm-svn: 45484
 2008-01-01 21:11:32 +00:00
Chris Lattner
1285ec2ae7 Fix a problem where lib/Target/TargetInstrInfo.h would include and use 
a header file from libcodegen.  This violates a layering order: codegen
depends on target, not the other way around.  The fix to this is to 
split TII into two classes, TII and TargetInstrInfoImpl, which defines
stuff that depends on libcodegen.  It is defined in libcodegen, where 
the base is not.

llvm-svn: 45475
 2008-01-01 01:03:04 +00:00