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Commit Graph

218961 Commits

Author SHA1 Message Date
Simon Pilgrim
fadcc816a1 [MIPS][MSA] Regenerate basic operations test checks
Cleanup the check prefixes to make refresh a lot easier
2021-07-20 13:37:44 +01:00
LLVM GN Syncbot
bcb32ee85a [gn build] Port 2b08f6af62af 2021-07-20 12:00:01 +00:00
Sebastian Neubauer
d89384c520 [AMDGPU] Improve register computation for indirect calls
First, collect the register usage in each function, then apply the
maximum register usage of all functions to functions with indirect
calls.

This is more accurate than guessing the maximum register usage without
looking at the actual usage.

As before, assume that indirect calls will hit a function in the
current module.

Differential Revision: https://reviews.llvm.org/D105839
2021-07-20 13:48:50 +02:00
Ulrich Weigand
8d80402b64 [SystemZ] Fix invalid assumption in getCPUNameFromS390Model
Code in getCPUNameFromS390Model currently assumes that the
numerical value of the model number always increases with
future hardware.  While this has happened to be the case
with the last few machines, it is not guaranteed -- that
assumption was violated with (much) older machines, and
it can be violated again with future machines.

Fix by explicitly listing model numbers for all supported
machine models.
2021-07-20 13:39:22 +02:00
Timm Bäder
55ff387ea9 [llvm][tools] Hide more unrelated tool options
Differential Revision: https://reviews.llvm.org/D106271
2021-07-20 13:27:33 +02:00
Jay Foad
70ace9e728 [AMDGPU] Pre-commit test case for D106284
This test case shows the scheduler wrongly reordering two buffer
accesses that might alias.
2021-07-20 12:05:33 +01:00
Jeremy Morse
7d0a83254c [DebugInfo][InstrRef] Fix a broken substitution method, add test coverage
This patch fixes a clearly-broken function that I absent-mindedly bodged
many months ago.

Over in D85749 I landed the substituteDebugValuesForInst, that creates
substitution records for all the def operands from one debug-labelled
instruction to the new one. Unfortunately it would crash if the two
instructions had different numbers of operands; I tried to fix this in
537f0fbe82 by adding a "max operand" parameter to the method, but then
didn't actually change the loop bound to take account of this. It passed
all the tests because.... well there wasn't any real test coverage of this
method.

This patch fixes up the loop to be bounded by the MaxOperand bound; and
adds test coverage for the x86-fixup-LEAs calls to this method, so that
it's actually tested.

Differential Revision: https://reviews.llvm.org/D105820
2021-07-20 11:45:13 +01:00
Nico Weber
125ab5ca8a [gn build] (manually) port bc1a2979fc70 2021-07-20 06:43:30 -04:00
Chen Zheng
06edcd023a [PowerPC][NFC] add more cases for lfiwzx/lfiwax 2021-07-20 10:29:56 +00:00
Stanislav Mekhanoshin
c99f31d90e [AMDGPU] Disable LDS lowering for GFX shaders
Apparently these need external LDS symbols to remain.

Fixes: SC1-3279

Differential Revision: https://reviews.llvm.org/D106288
2021-07-20 02:55:25 -07:00
Dawid Jurczak
a09883bcb0 [DSE] Transform memset + malloc --> calloc (PR25892)
After this change DSE can eliminate malloc + memset and emit calloc.
It's https://reviews.llvm.org/D101440 follow-up.

Differential Revision: https://reviews.llvm.org/D103009
2021-07-20 11:39:05 +02:00
Florian Mayer
be3736ea6f Revert "[hwasan] Use stack safety analysis."
This reverts commit e9c63ed10b3bdf6eb3fa76d1a3eb403d6fc6a118.
2021-07-20 10:36:46 +01:00
Kai Luo
eacf3837e5 [PowerPC] Add lit.local.cfg in AtomicExpand tests
Fixed build errors on other platforms.
2021-07-20 09:13:50 +00:00
Florian Mayer
1c1f625528 [hwasan] Use stack safety analysis.
This avoids unnecessary instrumentation.

Reviewed By: eugenis, vitalybuka

Differential Revision: https://reviews.llvm.org/D105703
2021-07-20 10:06:35 +01:00
Sander de Smalen
04cb04f74d [AArch64][SVE][InstCombine] last{a,b} of a splat vector
Replace last{a,b}(splat(X)) with X, irrespective of the predicate.

Patch by/Committing on behalf of: Usman Nadeem (mnadeem)

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D105520
2021-07-20 09:44:43 +01:00
Cullen Rhodes
6765229853 [AArch64][SME] Add system registers and related instructions
This patch adds the new system registers introduced in SME:

  - ID_AA64SMFR0_EL1 (ro) SME feature identifier.
  - SMCR_ELx (r/w) streaming mode control register for configuring
    effective SVE Streaming SVE Vector length when the PE is in
    Streaming SVE mode.
  - SVCR (r/w) streaming vector control register, visible at all
    exception levels. Provides access to PSTATE.SM and PSTATE.ZA
    using MSR and MRS instructions.
  - SMPRI_EL1 (r/w) streaming mode execution priority register.
  - SMPRIMAP_EL2 (r/w) streaming mode priority mapping register.
  - SMIDR_EL1 (ro) streaming mode identification register.
  - TPIDR2_EL0 (r/w) for use by SME software to manage per-thread
    SME context.
  - MPAMSM_EL1 (r/w) MPAM (v8.4) streaming mode register, for
    labelling memory accesses performed in streaming mode.

Also added in this patch are the SME mode change instructions.
Three MSR immediate instructions are implemented to set or clear
PSTATE.SM, PSTATE.ZA, or both respectively:

  - MSR SVCRSM, #<imm1>
  - MSR SVCRZA, #<imm1>
  - MSR SVCRSMZA, #<imm1>

The following smstart/smstop aliases are also implemented for
convenience:

  smstart    -> MSR SVCRSMZA, #1
  smstart sm -> MSR SVCRSM,   #1
  smstart za -> MSR SVCRZA,   #1

  smstop     -> MSR SVCRSMZA, #0
  smstop sm  -> MSR SVCRSM,   #0
  smstop za  -> MSR SVCRZA,   #0

The reference can be found here:
https://developer.arm.com/documentation/ddi0602/2021-06

Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D105576
2021-07-20 08:06:26 +00:00
Amara Emerson
c7647f3217 [AArch64][GlobalISel] Don't form truncstores in postlegalizer-lowering for s128.
We don't support truncating s128 stores, so don't form them.
2021-07-20 00:04:34 -07:00
Johannes Doerfert
afd4fe3364 [Attributor] Use set vector instead of vector to prevent duplicates 2021-07-20 01:39:34 -05:00
Johannes Doerfert
bce3c823b4 [Attributor] Simplify to values in the genericValueTraversal
We already simplified to a constant, given the new interface we can also
simplify to a generic value.
2021-07-20 01:39:34 -05:00
Johannes Doerfert
fc4701b4f4 [Attributor] Use checkForAllUses instead of custom use tracking
AAMemoryBehaviorFloating used a custom use tracking mechanism even
though checkForAllUses exists and is already more powerful. Further,
AAMemoryBehaviorFloating uses AANoCapture to guarantee that there are no
aliases and following the uses is sufficient. This is an OK assumption
if checkForAllUses is used but custom tracking is easily out of sync
with AANoCapture and problems follow.
2021-07-20 01:39:33 -05:00
Kai Luo
98d913fa91 [PowerPC] Fallback to base's implementation of shouldExpandAtomicCmpXchgInIR and shouldExpandAtomicCmpXchgInIR
If we can't decide `shouldExpandAtomicCmpXchgInIR` or `shouldExpandAtomicCmpXchgInIR` in PPC's implementation after https://reviews.llvm.org/rGb9c3941cd61de1e1b9e4f3311ddfa92394475f4b, resort to base's implementation.

This fixes internal build of OpenMP which uses atomic operations on float.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D106234
2021-07-20 06:14:24 +00:00
Craig Topper
3baf156215 [RISCV] Add test cases to show an issue with our fcvt.wu isel patterns on RV64.
The pattern we match is (sext_inreg (assertzexti32 (fp_to_uint)), i32). If
the assertzexti32 has an additional user we'll end up emitting
an fcvt.wu and an fcvt.lu.

This can happen if the original fp_to_uint before type legalization
has one user that causes a sext_inreg to be emitted and one that
doesn't.
2021-07-19 22:58:42 -07:00
LLVM GN Syncbot
733b3890af [gn build] Port adb55d7c3265 2021-07-20 05:51:14 +00:00
Johannes Doerfert
8c94163113 [Attributor] Gracefully handle interprocedural reachability queries
This does ensure `InformationCache::getPotentiallyReachable` will not
crash/assert on instructions from different functions but simply return
that one is reachable, which is conservatively correct.
2021-07-20 00:35:14 -05:00
Johannes Doerfert
d03bb7e9e6 [Attributor] Ensure to simplify operands in AAValueConstantRange
As with other patches before, the simplification callback interface
requires us to go through the Attributor::getAssumedSimplified API first
before we recurs.

It is unclear if the problem can be explicitly tested with our current
infrastructure.
2021-07-20 00:35:14 -05:00
Johannes Doerfert
f79b3d9db4 [Attributor] Extend the AAValueSimplify compare simplification logic
We first simplify the operands of a compare and then reason on the
simplified versions, e.g., with AANonNull.

This does improve the simplification capabilities but also fixes a
potential problem that has not yet been observed by simplifying the
operands first.
2021-07-20 00:35:14 -05:00
Johannes Doerfert
28e9e9d011 [Attributor][NFCI] Expose getAssumedUnderlyingObjects API 2021-07-20 00:35:13 -05:00
Johannes Doerfert
68e52fea50 [OpenMP] Remove XFAIL and update check lines properly
Undo 15c5701c8324d2dea519fa379c04d5c619a570ab and update check lines.
2021-07-20 00:35:13 -05:00
Johannes Doerfert
6f8d0fac4a [Attributor][NFC] Fix function name spelling 2021-07-20 00:35:13 -05:00
Johannes Doerfert
b1fa0d798c [OpenMP][FIX] Temporarily XFAIL tests waiting for new check lines
The test is not wrong nor is the current main broken, it just an
interplay issue. Check lines will be updated in shortly.
2021-07-19 23:14:35 -05:00
Johannes Doerfert
f4443afe7c [Attributor][FIX] Do not simplify byval arguments
A byval argument is a different value in the caller and callee, we
cannot propagate the information as part of AAValueSimplify. Users that
want to deal with byval arguments need to specifically perform the
argument -> call site step. We do not do this for now.
2021-07-19 22:48:51 -05:00
Johannes Doerfert
895c3ad5ac [Attributor] Introduce AAPointerInfo
This patch introduces AAPointerInfo which tracks the uses of a pointer
and places them in "bins" based on their offset from the base and access
size.

As with other AAs, any pointer can be tracked but it is up to the user
to make sense of the results. The user in this patch is AAValueSimplify
and AAPotentialValues which both utilize AAPointerInfo to determine the
value of a load. For now, this is restricted to loads of allocas and
internal globals. Through the use of AAPointerInfo and the "bins" we can
track struct members separately. The users also know that storing only
zeros (at unknown indices) will result in loading only 0 (from unknown
indices). Other than that, the users are flow and context insensitive
(for now).

To deal with the "bins" more easily, AAPointerInfo provides a
forallInterfearingAccesses that applies a callback on all accesses
that might interfere with a given load or store.

Differential Revision: https://reviews.llvm.org/D104432
2021-07-19 22:48:35 -05:00
Johannes Doerfert
273b9adf8c [Attributor] Simplify loads
As a first step to simplify loads we only handle `null` and `undef`
underlying objects, as well as objects that have the load as a single user.
Loads of those values can be replaced by the initializer, if any.
Proper reasoning is introduced in a follow up patch

Differential Revision: https://reviews.llvm.org/D103862
2021-07-19 22:47:29 -05:00
Johannes Doerfert
c445095c97 [OpenMP] Fix carefully track SPMDCompatibilityTracker
We did not properly use SPMDCompatibilityTracker in various places.
This patch makes sure we look at the validity properly and also fix
the state if we can.

Differential Revision: https://reviews.llvm.org/D106085
2021-07-19 22:47:03 -05:00
Matt Arsenault
d3598a0449 CodeGen: Make MachineOptimizationRemarkEmitterPass a CFG analysis
This avoids rerunning it a few times.
2021-07-19 21:08:26 -04:00
Matt Arsenault
de55d90906 GlobalISel: Remove some mystery code that clears isReturned
I don't understand what this is going for, and haven't found an analog
in DAG code. No tests fail with this removed.
2021-07-19 20:21:05 -04:00
Matt Arsenault
d58cbace52 AArch64/GlobalISel: Preserve memory types 2021-07-19 20:21:05 -04:00
Fangrui Song
9f9a9f472c Revert D105519 "[WebAssembly] Deduplicate imports of the same module name, field name, and type" and its followup
This reverts commit 4ae575b9997e0903d1c2ec01a43e3f3f2db5df16 and 9b965b37c75d626c01951184088314590e38d299.

There is an use-of-uninitialized-value bug in the `else` branch in ImportSection::addImport.
2021-07-19 17:09:01 -07:00
Nico Weber
4ebc105ec1 [gn build] Fix llvm_build_instrumented_coverage=true builds with goma/rbe 2021-07-19 19:57:02 -04:00
Philip Reames
be7020e420 [tests] Add a couple of tests for zero stride trip counts w/loop varying exit values 2021-07-19 16:33:10 -07:00
Eli Friedman
18c83b5d27 [ScalarEvolution] Refine computeMaxBECountForLT to be accurate in more cases.
Allow arbitrary strides, and make sure we return the correct result when
the backedge-taken count is zero.

Differential Revision: https://reviews.llvm.org/D106197
2021-07-19 15:43:30 -07:00
Philip Reames
0f6ddbc33f [SCEV] Add a clarifying comment in howManyLessThans
Wrap semantics are subtle when combined with multiple exits.  This has caused several rounds of confusion during recent reviews, so try to document the subtly distinction between when wrap flags provide <u and <=u facts.
2021-07-19 15:13:48 -07:00
Arthur Eubanks
23b99bd6ce [NewPM][opt] Add -debug-pass-manager=quiet to not print analysis info
Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D106307
2021-07-19 15:08:26 -07:00
Arthur Eubanks
0b315633ca [NewPM] Bail out of devirtualization wrapper if the current SCC is invalidated
The specific case that triggered this was when inlining a recursive
internal function into itself caused the recursion to go away, allowing
the inliner to mark the function as dead. The inliner marks the SCC as
invalidated but does not provide a new SCC to continue with.

This matches the implementations of ModuleToPostOrderCGSCCPassAdaptor
and CGSCCPassManager.

Fixes PR50363.

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D106306
2021-07-19 15:07:30 -07:00
LLVM GN Syncbot
3b84d5a91c [gn build] Port 08b289867b5a 2021-07-19 21:33:24 +00:00
Artem Belevich
33f436abed Revert "[MemCpyOpt] Enable memcpy optimizations unconditionally."
This reverts commit 2c98298a7559dfe4a264ef1adaad0921526768cc which breaks
sanitizers.
2021-07-19 14:27:41 -07:00
Derek Schuff
0c7127a873 [WebAssembly] Generate R_WASM_FUNCTION_OFFSET relocs in debuginfo sections
Debug info sections need R_WASM_FUNCTION_OFFSET_I32 relocs (with FK_Data_4 fixup
kinds) to refer to functions (instead of R_WASM_TABLE_INDEX as is used in data
sections). Usually this is done in a convoluted way, with unnamed temp data
symbols which target the start of the function, in which case
WasmObjectWriter::recordRelocation converts it to use the section symbol
instead. However in some cases the function can actually be undefined; in this
case the dwarf generator uses the function symbol (a named undefined function
symbol) instead. In that case the section-symbol transform doesn't work and we
need to generate the correct reloc type a different way. In this change
WebAssemblyWasmObjectWriter::getRelocType takes the fixup section type into
account to choose the correct reloc type.

Fixes PR50408
Differential Revision: https://reviews.llvm.org/D103557
2021-07-19 14:02:33 -07:00
Mircea Trofin
846c3e0e7d [MLGO] Use binary protobufs for improved training performance.
It turns out that during training, the time required to parse the
textual protobuf of a training log is about the same as the time it
takes to compile the module generating that log. Using binary protobufs
instead elides that cost almost completely.

Differential Revision: https://reviews.llvm.org/D106157
2021-07-19 13:59:28 -07:00
Nick Fitzgerald
b3c6e87b2d [WebAssembly] Deduplicate imports of the same module name, field name, and type
When two symbols import the same thing, only one import should be emitted in the Wasm file.

Fixes https://bugs.llvm.org/show_bug.cgi?id=50938

Reviewed By: sbc100

Differential Revision: https://reviews.llvm.org/D105519
2021-07-19 13:59:02 -07:00
Stuart Brady
1df98c77f3 [demangler] Fix demangling of 'half'
Demangle 'Dh' as 'half' (as per GCC), and not 'decimal16' (which doesn't
make sense, as there is no IEEE 754 decimal16 format).

The Itanium C++ ABI specification describes 'Dh' as:
> IEEE 754r half-precision floating point (16 bits)

(https://itanium-cxx-abi.github.io/cxx-abi/abi.html#mangling-builtin)

Reviewed By: ldionne, jyknight

Differential Revision: https://reviews.llvm.org/D103833
2021-07-19 21:21:34 +01:00