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Commit Graph

181373 Commits

Author SHA1 Message Date
Thomas Preud'homme
c7adf5822e [FileCheck] Add missing final dot in comment
llvm-svn: 365190
2019-07-05 12:00:56 +00:00
Eugene Leviant
f98174731f [ThinLTO] Attempt to recommit r365040 after caching fix
It's possible that some function can load and store the same
variable using the same constant expression:

store %Derived* @foo, %Derived** bitcast (%Base** @bar to %Derived**)
%42 = load %Derived*, %Derived** bitcast (%Base** @bar to %Derived**)

The bitcast expression was mistakenly cached while processing loads,
and never examined later when processing store. This caused @bar to
be mistakenly treated as read-only variable. See load-store-caching.ll.

llvm-svn: 365188
2019-07-05 12:00:10 +00:00
James Henderson
d000b963f9 [docs][llvm-objcopy] Improve some wording.
llvm-svn: 365187
2019-07-05 11:57:07 +00:00
Nico Weber
8896c28cc1 Make joined instances of JoinedOrSeparate flags point to the unaliased args, like all other arg types do
This fixes an 8-year-old regression. r105763 made it so that aliases
always refer to the unaliased option – but it missed the "joined" branch
of JoinedOrSeparate flags. (r162231 then made the Args classes
non-virtual, and r169344 moved them from clang to llvm.)

Back then, there was no JoinedOrSeparate flag that was an alias, so it
wasn't observable. Now /U in CLCompatOptions is a JoinedOrSeparate alias
in clang, and warn_slash_u_filename incorrectly used the aliased arg id
(using the unaliased one isn't really a regression since that warning
checks if the undefined macro contains slash or backslash and only then
emits the warning – and no valid use will pass "-Ufoo/bar" or similar).

Also, lld has many JoinedOrSeparate aliases, and due to this bug it had
to explicitly call `getUnaliasedOption()` in a bunch of places, even
though that shouldn't be necessary by design. After this fix in Option,
these calls really don't have an effect any more, so remove them.

No intended behavior change.

(I accidentally fixed this bug while working on PR29106 but then
wondered why the warn_slash_u_filename broke. When I figured it out, I
thought it would make sense to land this in a separate commit.)

Differential Revision: https://reviews.llvm.org/D64156

llvm-svn: 365186
2019-07-05 11:45:24 +00:00
Nico Weber
24ec7afabe gn build: Merge r365179
llvm-svn: 365185
2019-07-05 11:34:48 +00:00
George Rimar
7add0fa08e [Object/ELF.h] - Improve error reporting.
The errors coming from ELF.h are usually not very
useful because they are uninformative. This patch is a
first step to improve the situation.

I tested this patch with a run of check-llvm and found
that few messages are untested. In this patch, I did not
add more tests but marked all such cases with a "TODO" comment.

For all tested messages I extended the error text to
provide more details (see test cases changed).

Differential revision: https://reviews.llvm.org/D64014

llvm-svn: 365183
2019-07-05 11:28:49 +00:00
Nico Weber
41ec2302bf lld-link: Make /debugtype: option work better
- The code tried to pass false to split()'s KeepEmpty parameter, but
  instead passed it to MaxSplit. As a result, it would never split on
  commas. This has been broken since the flag was added in r278056.

- The code used getSpelling() for getting the argument's values, but
  getSpelling() always returns the `/debugtype:` prefix without any
  values. So if any /debugtype: flag was passed, it always resulted in
  an "unknown option:" warning. (The warning code then used the correct
  getValue() for printing the invalid option, so the warning looked
  kind of like it made sense.) This regressed in r342894.

Slightly improve the test coverage of this feature (but since I don't
know what this flag actually does, there's still no test for the correct
semantics), and add a comment to getSpelling() explaining what it does.

llvm-svn: 365182
2019-07-05 11:28:31 +00:00
Simon Pilgrim
a505ee9998 [X86][SSE] LowerINSERT_VECTOR_ELT - early out for out of range indices
Fixes OSS-Fuzz #15662

llvm-svn: 365180
2019-07-05 10:34:53 +00:00
David Green
1676daeb17 [ARM] MVE VMOV immediate handling
This adds some handling for VMOVimm, using the same method that NEON uses. We
create VMOVIMM/VMVNIMM/VMOVFPIMM nodes based on the immediate, and select them
using the now renamed ARMvmovImm/etc. There is also an extra 64bit immediate
mode that I have not yet added here.

Code by David Sherwood

Differential Revision: https://reviews.llvm.org/D63884

llvm-svn: 365178
2019-07-05 10:02:43 +00:00
David Green
1783c7f2bd [ARM] MVE fp to int conversions
This adds the patterns needed for fptosi and sitofp.

Differential Revision: https://reviews.llvm.org/D63729

llvm-svn: 365176
2019-07-05 09:34:30 +00:00
Fangrui Song
c2647006c3 [RISCV] Delete a ctor that is commented out. NFC
llvm-svn: 365175
2019-07-05 08:25:14 +00:00
Seiya Nuta
95574c7fc3 [llvm-objcopy][NFC] Refactor output target parsing v2
Summary:
Use an enum instead of string to hold the output file format in Config.InputFormat and Config.OutputFormat. It's essential to support other output file formats other than ELF.

This patch originally has been submitted as D63239. However, there was an use-of-uninitialized-value bug and reverted in r364379 (git commit 4ee933c).

This patch includes the fix for the bug by setting Config.InputFormat/Config.OutputFormat in parseStripOptions.

Reviewers: espindola, alexshap, rupprecht, jhenderson

Reviewed By: jhenderson

Subscribers: emaste, arichardson, jakehehrlich, MaskRay, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64170

llvm-svn: 365173
2019-07-05 05:28:38 +00:00
Fangrui Song
fc1281d728 [llvm-objcopy][test] Fix respect-umask.test after D62718/r365162
llvm-svn: 365172
2019-07-05 05:10:28 +00:00
Alex Brachet
f2933ff9d8 Fix patch not passing test cases
llvm-svn: 365170
2019-07-05 01:28:41 +00:00
Alex Brachet
ed81df11c0 Temporarily stop failing test case
llvm-svn: 365168
2019-07-05 01:13:09 +00:00
Peter Collingbourne
2b7fc385f9 gn build: Merge r365130.
llvm-svn: 365167
2019-07-05 01:11:20 +00:00
Peter Collingbourne
f3e1554185 gn build: Merge r365103.
llvm-svn: 365166
2019-07-05 01:11:18 +00:00
Peter Collingbourne
b5743da917 gn build: Merge r365007.
llvm-svn: 365165
2019-07-05 01:11:16 +00:00
Peter Collingbourne
d71bef0e75 gn build: Merge r365091.
llvm-svn: 365164
2019-07-05 01:11:14 +00:00
Craig Topper
14cc551da9 [X86] Add custom isel to select ADD/SUB/OR/XOR/AND to their non-immediate forms under optsize when the immediate has additional users.
Summary:
We attempt to prevent folding immediates with multiple users under optsize. But we only do this from store nodes and X86ISD::ADD/SUB/XOR/OR/AND patterns. We don't do it for ISD::ADD/SUB/XOR/OR/AND even though we count them as users when deciding whether to fold into other nodes. This leads to situations where we block folding to a compare for example, but still fold into an AND or OR as seen in PR27202.

Unfortunately touching the isel patterns in tablegen for the ISD::ADD/SUB/XOR/OR/AND opcodes will cause the patterns to be unusable for fast isel. And we don't have a way to make a fast isel only pattern.

To workaround this, this patch adds custom isel in front of the isel table that will select the non-immediate forms if the immediate has additional users. This may create some issues for ANDN and NOT matching. And there's room for improvement with unsigned 32 immediates on 64-bit AND.

This patch needs more thorough test cases, but I wanted to get feedback on the direction. Please send me any other test cases you've seen in the wild.

I think we probably have the same issue with the immediate matching when we fold RMW from X86ISD::ADD/SUB/XOR/OR/AND. And our TEST immedaite shrinking logic. Our cost modeling for immediates that can fit in a sign extended 8-bit immediate on a 16/32/64 bit operation is completely wrong.

I also wonder if we should update the ConstantHoisting cost model and block folding for "opaque" constants. But of course constants can still be created by DAG combine and lowering optimizations.

Fixes PR27202

Reviewers: spatel, RKSimon, andreadb

Reviewed By: RKSimon

Subscribers: jsji, hiraditya, jdoerfert, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D59909

llvm-svn: 365163
2019-07-04 22:53:57 +00:00
Alex Brachet
33790e584f [llvm-objcopy] Change handling of output file permissions
Summary: Address bug [[ https://bugs.llvm.org/show_bug.cgi?id=42082 | 42082 ]] where files were always outputted with 0775 permissions. Now, the output file is given either 0666 or 0777 if the object is executable.

Reviewers: espindola, alexshap, rupprecht, jhenderson, jakehehrlich, MaskRay

Reviewed By: rupprecht, jhenderson, jakehehrlich, MaskRay

Subscribers: emaste, arichardson, jakehehrlich, MaskRay, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62718

llvm-svn: 365162
2019-07-04 22:45:27 +00:00
Simon Atanasyan
1adce17c0f [mips] Refactor expandSeq and expandSeqI methods. NFC
llvm-svn: 365161
2019-07-04 22:45:07 +00:00
Hubert Tong
3bebe36404 [NFC] Make some ObjectFormatType switches covering
Summary:
This patch removes the `default` case from some switches on
`llvm::Triple::ObjectFormatType`, and cases for the missing enumerators
are then added.

For `UnknownObjectFormat`, the action (`llvm_unreachable`) for the
`default` case is kept.

For the other unhandled cases, `report_fatal_error` is used instead.

Reviewers: sfertile, jasonliu, daltenty

Reviewed By: sfertile

Subscribers: wuzish, aheejin, jsji, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D63767

llvm-svn: 365160
2019-07-04 21:40:28 +00:00
Alex Brachet
847203d76b [docs] [tools] Fix see also links
Summary: Changes "see also" links to use :manpage: instead of plain text or the form `name|name` which was being treated literally, not as a link.

Reviewers: jhenderson, rupprecht

Reviewed By: jhenderson

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63970

llvm-svn: 365159
2019-07-04 21:19:05 +00:00
Craig Topper
20330a7c7f [DAGCombiner] Don't combine (addcarry (uaddo X, Y), 0, Carry) -> (addcarry X, Y, Carry) if the Carry comes from the uaddo.
Summary:
The uaddo won't be removed and the addcarry will still be
dependent on the uaddo. So we'll just increase the use count
of X and Y and potentially require a COPY.

Reviewers: spatel, RKSimon, deadalnix

Reviewed By: RKSimon

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64190

llvm-svn: 365149
2019-07-04 18:18:46 +00:00
Tim Renouf
dd229b271a [AMDGPU] Custom lower INSERT_SUBVECTOR v3, v4, v5, v8
Summary:
Since the changes to introduce vec3 and vec5, INSERT_VECTOR for these
sizes has been marked "expand", which made LegalizeDAG lower it to loads
and stores via a stack slot. The code got optimized a bit later, but the
now-unused stack slot was never deleted.

This commit avoids that problem by custom lowering INSERT_SUBVECTOR into
an EXTRACT_VECTOR_ELT and INSERT_VECTOR_ELT for each element in the
subvector to insert.

V2: Addressed review comments re test.

Differential Revision: https://reviews.llvm.org/D63160

Change-Id: I9e3c13e36f68cfa3431bb9814851cc1f673274e1
llvm-svn: 365148
2019-07-04 17:38:24 +00:00
Sanjay Patel
eab9da7e7d [InstCombine] allow undef elements when forming splat from chain of insertelements
We allow forming a splat (broadcast) shuffle, but we were conservatively limiting
that to cases where all elements of the vector are specified. It should be safe
from a codegen perspective to allow undefined lanes of the vector because the
expansion of a splat shuffle would become the chain of inserts again.

Forming splat shuffles can reduce IR and help enable further IR transforms.
Motivating bugs:
https://bugs.llvm.org/show_bug.cgi?id=42174
https://bugs.llvm.org/show_bug.cgi?id=16739

Differential Revision: https://reviews.llvm.org/D63848

llvm-svn: 365147
2019-07-04 16:45:34 +00:00
Jay Foad
22bf72432d Fix typos in comments and debug output.
llvm-svn: 365146
2019-07-04 15:04:29 +00:00
Simon Pilgrim
84a859530e [X86][SSE] Add partial dereferenceable vector load test inspired by PR21780
llvm-svn: 365145
2019-07-04 15:00:04 +00:00
Andus Yu
578aa28604 llvm-c-test avoid calling malloc(0)
Summary:
As explained in D63668, malloc(0) could return a null pointer. llvm-c-test does not handle this case correctly. Instead of calling malloc(0), avoid the operation altogether.

Authored By: andusy

Reviewers: hubert.reinterpretcast, xingxue, jasonliu, daltenty, cebowleratibm

Reviewed By: hubert.reinterpretcast

Subscribers: mehdi_amini, dexonsmith, jsji, llvm-commits

Tags: LLVM

Differential Revision: https://reviews.llvm.org/D63788

llvm-svn: 365144
2019-07-04 14:36:34 +00:00
Serge Guelton
6424f88131 Document legacy pass manager extension points
Differential Revision: https://reviews.llvm.org/D64093

llvm-svn: 365142
2019-07-04 14:03:11 +00:00
David Bolvansky
77b1673246 [NFC] Added tests for D64099
llvm-svn: 365141
2019-07-04 13:48:32 +00:00
Simon Pilgrim
21bb414493 [X86][SSE] Add some partial dereferenceable vector load tests inspired by PR16739
llvm-svn: 365138
2019-07-04 13:31:49 +00:00
Michael Liao
dbdd84c616 [AMDGPU] Correct the setting of FlatScratchInit.
Summary: - That flag setting should skip spilling stack slot.

Reviewers: arsenm, rampitec

Subscribers: qcolombet, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64143

llvm-svn: 365137
2019-07-04 13:29:45 +00:00
Simon Pilgrim
012b67e573 [X86] Regenerate load fold peephole test.
llvm-svn: 365136
2019-07-04 12:33:37 +00:00
Simon Pilgrim
7bf0aedf35 Fix -Wdocumentation param warning.
Don't put the full stop at the end of a param name - it confuses the doxygen parser

llvm-svn: 365128
2019-07-04 10:35:31 +00:00
Simon Pilgrim
a8f9089664 Fix -Wdocumentation warning.
llvm-svn: 365127
2019-07-04 10:33:21 +00:00
Simon Pilgrim
c1b05ea1f0 [X86][AVX1] Combine concat_vectors(pshufd(x,c),pshufd(y,c)) -> vpermilps(concat_vectors(x,y),c)
Bitcast v4i32 to v8f32 and back again - it might be worth adding isel patterns for X86PShufd v8i32 on AVX1 targets like we did for X86Blendi to avoid the bitcasts?

llvm-svn: 365125
2019-07-04 10:17:10 +00:00
Simon Pilgrim
b24fbcea49 Fix MSVC "not all control paths return a value" warnings. NFCI.
llvm-svn: 365119
2019-07-04 09:46:06 +00:00
Mikael Holmen
0a0fbcd1db [Remarks] Silence gcc warning by catching unhandled values in switches
Without this fix gcc (7.4) complains with
 ../lib/Remarks/RemarkParser.cpp: In function 'std::unique_ptr<llvm::remarks::ParserImpl> formatToParserImpl(llvm::remarks::ParserFormat, llvm::StringRef)':
 ../lib/Remarks/RemarkParser.cpp:29:1: error: control reaches end of non-void function [-Werror=return-type]
  }
  ^
 ../lib/Remarks/RemarkParser.cpp: In function 'std::unique_ptr<llvm::remarks::ParserImpl> formatToParserImpl(llvm::remarks::ParserFormat, llvm::StringRef, const llvm::remarks::ParsedStringTable&)':
 ../lib/Remarks/RemarkParser.cpp:38:1: error: control reaches end of non-void function [-Werror=return-type]
  }
  ^

The Format enum currently only contains the value YAML which is indeed
already handled in the switches, but gcc complains anyway.

Adding a default case with an llvm_unreachable silences gcc.

llvm-svn: 365118
2019-07-04 09:29:18 +00:00
David Green
48e4d991e8 [ARM] Favour PL/MI over GE/LT when possible
The arm condition codes for GE is N==V (and for LT is N!=V). If the source of
flags cannot set V (overflow), such as a cmp against #0, then we can use the
simpler PL and MI conditions that only check N. As these PL/MI conditions are
simpler than GE/LT, other passes like the peephole optimiser can have a better
time optimising away the redundant CMPs.

The exception is the VSEL instruction, which cannot take the PL code, so there
the transform favours GE.

Differential Revision: https://reviews.llvm.org/D64160

llvm-svn: 365117
2019-07-04 08:58:58 +00:00
David Green
5349edee0f [ARM] Added testing for D64160. NFC
Adds some extra vsel testing and regenerates long shift and saturation bitop
tests.

llvm-svn: 365116
2019-07-04 08:49:32 +00:00
James Henderson
0e835405fd [docs][llvm-dwarfdump] Remove unnecessary reference to --show-children
The --show-children option description describes what it does, and
references the =<offset> parameter of section dump switches. I don't
think it needs to be explained again in the documentation of the
section dump switches too.

Reviewed by: JDevlieghere

Differential Revision: https://reviews.llvm.org/D64132

llvm-svn: 365115
2019-07-04 08:49:04 +00:00
Simon Tatham
b8c33a2f38 [TableGen] Allow DAG isel patterns to override default operands.
When a Tablegen instruction description uses `OperandWithDefaultOps`,
isel patterns for that instruction don't have to fill in the default
value for the operand in question. But the flip side is that they
actually //can't// override the defaults even if they want to.

This will be very inconvenient for the Arm backend, when we start
wanting to write isel patterns that generate the many MVE predicated
vector instructions, in the form with predication actually enabled. So
this small Tablegen fix makes it possible to write an isel pattern
either with or without values for a defaulted operand, and have the
default values filled in only if they are not overridden.

If all the defaulted operands come at the end of the instruction's
operand list, there's a natural way to match them up to the arguments
supplied in the pattern: consume pattern arguments until you run out,
then fill in any missing instruction operands with their default
values. But if defaulted and non-defaulted operands are interleaved,
it's less clear what to do. This does happen in existing targets (the
first example I came across was KILLGT, in the AMDGPU/R600 backend),
and of course they expect the previous behaviour (that the default for
those operands is used and a pattern argument is not consumed), so for
backwards compatibility I've stuck with that.

Reviewers: nhaehnle, hfinkel, dmgreen

Subscribers: mehdi_amini, javed.absar, tpr, kristof.beyls, steven_wu, dexonsmith, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63814

llvm-svn: 365114
2019-07-04 08:43:20 +00:00
David Green
6ac13d1aff [ARM] MVE bitwise instruction patterns
This adds patterns for the simpler VAND, VORR and VEOR bitwise vector
instructions. It also adjusts the top16Zero PatLeaf to not match on vector
instructions, which can otherwise cause problems.

Code written by David Sherwood.

Differential Revision: https://reviews.llvm.org/D63867

llvm-svn: 365113
2019-07-04 08:41:23 +00:00
QingShan Zhang
4c61560804 [NFC][PowerPC] Make the PowerPC scheduling strategy feature only control the strategy instead of the scheduler.
llvm-svn: 365110
2019-07-04 07:43:51 +00:00
Craig Topper
31cd0cf042 [X86] Use pointer sized indices instead of i32 for EXTRACT_VECTOR_ELT and INSERT_VECTOR_ELT in a couple places.
Most places already did this.

llvm-svn: 365109
2019-07-04 06:21:54 +00:00
Dylan McKay
cdfc91359a [AVR] Fix tests after r363757
r363757 renamed ExpandISelPseudo to FinalizeISel, so the RUN line in
select-must-add-unconditional-jump.mir needed updating to refer to finalize-isel.

llvm-svn: 365108
2019-07-04 06:12:47 +00:00
Serguei Katkov
8903e651cf [LoopPeel] Some small comment update. NFC.
Follow-up change of comment after
https://reviews.llvm.org/D63917 is landed.

llvm-svn: 365107
2019-07-04 05:10:14 +00:00
Fangrui Song
852d642125 [PowerPC] Support constraint code "ww"
Summary:
"ww" and "ws" are both constraint codes for VSX vector registers that
hold scalar double data. "ww" is preferred for float while "ws" is
preferred for double.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D64119

llvm-svn: 365106
2019-07-04 04:44:42 +00:00