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12 Commits

Author SHA1 Message Date
Evandro Menezes
d6a1cb395c Add support for Samsung Exynos M3 (NFC) 
llvm-svn: 289613
 2016-12-13 23:31:41 +00:00
Chad Rosier
43ed029160 [AArch64] Add support for Qualcomm's Falkor CPU. 
Differential Revision: https://reviews.llvm.org/D26673

llvm-svn: 287036
 2016-11-15 21:34:12 +00:00
Evandro Menezes
fad8ba7058 [AArch64] Add support for Samsung Exynos M2 (NFC). 
llvm-svn: 277364
 2016-08-01 18:39:45 +00:00
Silviu Baranga
5bf17bacfc [AArch64] Switch regression tests to test features not CPUs 
Summary:
We have switched to using features for all heuristics, but
the tests for these are still using -mcpu, which means we
are not directly testing the features.

This converts at least some of the existing regression tests
to use the new features.

This still leaves the following features untested:

merge-narrow-ld
predictable-select-expensive
alternate-sextload-cvt-f32-pattern
disable-latency-sched-heuristic

Reviewers: mcrosier, t.p.northover, rengolin

Subscribers: MatzeB, aemerson, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D21288

llvm-svn: 273271
 2016-06-21 15:16:34 +00:00
Pankaj Gode
62398e4da8 [AARCH64] Add support for Broadcom Vulcan 
Adding core tuning support for new Broadcom Vulcan core (ARMv8.1A).

Differential Revision: http://reviews.llvm.org/D21500

llvm-svn: 273148
 2016-06-20 11:13:31 +00:00
Sjoerd Meijer
067c8106bd This adds support for Cortex-A73 as an available target. 
Differential Revision: http://reviews.llvm.org/D20865

llvm-svn: 271508
 2016-06-02 10:48:52 +00:00
Paul Robinson
119632fa81 Fix tests that used CHECK-NEXT-NOT and CHECK-DAG-NOT. 
FileCheck actually doesn't support combo suffixes.

Differential Revision: http://reviews.llvm.org/D17588

llvm-svn: 262054
 2016-02-26 19:40:34 +00:00
Chad Rosier
81da1b9bcf [AArch64] Add support for Qualcomm Kryo CPU. 
Machine model description by Dave Estes <cestes@codeaurora.org>.

llvm-svn: 260686
 2016-02-12 15:51:51 +00:00
MinSeong Kim
fea8e6c4f8 [AArch64] Add support for Samsung Exynos-M1 
Adds core tuning support for new Samsung Exynos-M1 core (ARMv8-A).

Differential Revision: http://reviews.llvm.org/D15663

llvm-svn: 256828
 2016-01-05 12:51:59 +00:00
Christof Douma
b1205456e7 [AArch64]: Add support for Cortex-A35 
Adds support for the new Cortex-A35 ARMv8-A core.

llvm-svn: 254503
 2015-12-02 11:53:44 +00:00
Renato Golin
0bf68985f6 Adding support to LLVM for targeting Cortex-A72 
Currently, Cortex-A72 is modelled as an Cortex-A57 except the fp
load balancing pass isn't enabled for Cortex-A72 as it's not
profitable to have it enabled for this core.

Patch by Ranjeet Singh.

llvm-svn: 228140
 2015-02-04 13:31:29 +00:00
Jiangning Liu
86fc448354 Implement AArch64 TTI interface isAsCheapAsAMove. 
llvm-svn: 214159
 2014-07-29 02:09:26 +00:00