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Commit Graph

1589 Commits

Author SHA1 Message Date
Chris Lattner
c94f21143f don't dist internal readme's
llvm-svn: 31246
2006-10-28 00:49:54 +00:00
Chris Lattner
838d0cbb0a this doesn't occur any more in mason
llvm-svn: 31236
2006-10-27 22:02:19 +00:00
Chris Lattner
6fe4efd730 the code in question is now:
cmpw cr0, r7, r3
        ble cr0, LBB1_5 ;bb25
LBB1_8: ;bb17
        cmpw cr0, r8, r5
        bgt cr0, LBB1_2 ;bb

which is just as good as crnand.

llvm-svn: 31235
2006-10-27 22:00:55 +00:00
Evan Cheng
65e78f3d08 Place cstrings in .cstring section.
llvm-svn: 31207
2006-10-26 21:48:57 +00:00
Devang Patel
0691019e12 Move getPreferredAlignmentLog from AsmPrinter to TargetData
llvm-svn: 31171
2006-10-24 20:32:14 +00:00
Chris Lattner
e38c95d2a3 Add intrinsics for the rest of the DCB* instructions.
llvm-svn: 31148
2006-10-24 01:08:42 +00:00
Chris Lattner
a9adb1e558 Implement support for branch reversal, fix a bug in branch analysis.
This provides stuff like:

        cmpw cr0, r15, r29
        mr r14, r15
-       bge cr0, LBB3_111       ;bb656
-       b LBB3_90       ;bb501
+       blt cr0, LBB3_90        ;bb501
 LBB3_111:      ;bb656
        lwz r18, 68(r1)

which is particularly good for dispatch group formation.

llvm-svn: 31101
2006-10-21 06:03:11 +00:00
Chris Lattner
20bb8bfd45 Simplify code, no functionality change
llvm-svn: 31097
2006-10-21 05:42:09 +00:00
Chris Lattner
d3e583b2e1 implement support for inserting a cond branch
llvm-svn: 31096
2006-10-21 05:36:13 +00:00
Chris Lattner
0f686ec438 set the ppc64 stack pointer right, dynamic alloca now works for ppc64
llvm-svn: 31028
2006-10-18 01:20:43 +00:00
Chris Lattner
6c403f7102 Expand alloca for ppc64
llvm-svn: 31027
2006-10-18 01:18:48 +00:00
Chris Lattner
7353b07275 expose DWARF_LABEL opcode# so the branch folder can update debug info properly.
llvm-svn: 31024
2006-10-17 22:41:45 +00:00
Chris Lattner
bf15d2f503 add support for inserting an uncond branch
llvm-svn: 31003
2006-10-17 18:06:55 +00:00
Jim Laskey
d266d999cb Use S_debug for dwarf info.
llvm-svn: 30994
2006-10-17 11:30:57 +00:00
Chris Lattner
b90d66b7da implement branch inspection/modification methods.
llvm-svn: 30946
2006-10-13 21:21:17 +00:00
Evan Cheng
fe5bb5dbe6 Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.
llvm-svn: 30945
2006-10-13 21:14:26 +00:00
Chris Lattner
b22754853b add note
llvm-svn: 30937
2006-10-13 20:20:58 +00:00
Chris Lattner
14f18d4896 set isBarrier correctly
llvm-svn: 30936
2006-10-13 19:10:34 +00:00
Chris Lattner
a3f4e611a4 Correctly handle instruction separators.
llvm-svn: 30935
2006-10-13 17:56:02 +00:00
Chris Lattner
e4e8893807 mark adjcallstack up/down as clobbering and using the SP
llvm-svn: 30908
2006-10-12 17:56:34 +00:00
Evan Cheng
ca66f49574 Add properties to ComplexPattern.
llvm-svn: 30891
2006-10-11 21:03:53 +00:00
Evan Cheng
d22f3dd3ed Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes.
llvm-svn: 30844
2006-10-09 20:57:25 +00:00
Evan Cheng
275825195a Make use of getStore().
llvm-svn: 30759
2006-10-05 23:01:46 +00:00
Chris Lattner
08da1a510d Don't bother setting JumpTableTextSection, it is about to disappear
llvm-svn: 30745
2006-10-05 03:13:59 +00:00
Chris Lattner
068190eb91 Pass the MachineFunction into EmitJumpTableInfo.
llvm-svn: 30742
2006-10-05 03:01:21 +00:00
Chris Lattner
ca844c6695 Move getSectionForFunction to AsmPrinter, change it to return a string.
llvm-svn: 30735
2006-10-05 02:42:20 +00:00
Chris Lattner
0ca8a69c28 implement DarwinTargetAsmInfo::getSectionForFunction, use it when outputting
function bodies

llvm-svn: 30733
2006-10-05 00:35:50 +00:00
Chris Lattner
2e10b0c095 emit jump table before debug info
llvm-svn: 30731
2006-10-05 00:26:05 +00:00
Chris Lattner
dd6343bd8d Always emit the jump table after the function so it's part of the same 'atom'
as the function body.

llvm-svn: 30730
2006-10-05 00:24:46 +00:00
Evan Cheng
494e8e6971 Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an
extra operand to LOADX to specify the exact value extension type.

llvm-svn: 30714
2006-10-04 00:56:09 +00:00
Chris Lattner
b3b7cf3be6 wrap long lines
llvm-svn: 30662
2006-09-28 23:32:43 +00:00
Chris Lattner
c1adb2f1d3 Shift amounts are always 32-bits, even in 64-bit mode. This fixes
CodeGen/PowerPC/2006-09-28-shift_64.ll

llvm-svn: 30652
2006-09-28 20:48:45 +00:00
Chris Lattner
26213b40aa Use abstract private/comment directives, to increase portability to ppc/linux
llvm-svn: 30621
2006-09-27 02:55:21 +00:00
Chris Lattner
09176ab54f Compile:
int x __attribute__((used));

to:

        .data
.comm _x,4              ; 'x'
        .no_dead_strip  _x

on both x86 and ppc darwin targets.

llvm-svn: 30605
2006-09-26 03:39:53 +00:00
Nate Begeman
7bcce1a7f6 Fold AND and ROTL more often
llvm-svn: 30577
2006-09-22 05:01:56 +00:00
Chris Lattner
663748827c The DarwinAsmPrinter need not check for isDarwin. createPPCAsmPrinterPass
should create the right asmprinter subclass.

llvm-svn: 30542
2006-09-20 17:12:19 +00:00
Chris Lattner
6d66264a5f Wrap some darwin'isms with isDarwin checks.
llvm-svn: 30541
2006-09-20 17:07:15 +00:00
Chris Lattner
6b434ee662 item done
llvm-svn: 30518
2006-09-20 06:41:56 +00:00
Chris Lattner
102718b1b2 This is already done
llvm-svn: 30512
2006-09-20 04:59:33 +00:00
Chris Lattner
4d97247875 Improve PPC64 equality comparisons like PPC32 comparisons.
llvm-svn: 30510
2006-09-20 04:33:27 +00:00
Chris Lattner
69390a3f80 Two improvements:
1. Codegen this comparison:
     if (X == 0x8000)

as:

        cmplwi cr0, r3, 32768
        bne cr0, LBB1_2 ;cond_next

instead of:

        lis r2, 0
        ori r2, r2, 32768
        cmpw cr0, r3, r2
        bne cr0, LBB1_2 ;cond_next


2. Codegen this comparison:
      if (X == 0x12345678)

as:

        xoris r2, r3, 4660
        cmplwi cr0, r2, 22136
        bne cr0, LBB1_2 ;cond_next

instead of:

        lis r2, 4660
        ori r2, r2, 22136
        cmpw cr0, r3, r2
        bne cr0, LBB1_2 ;cond_next

llvm-svn: 30509
2006-09-20 04:25:47 +00:00
Chris Lattner
ee42b9ae24 Add a note that we should match rlwnm better
llvm-svn: 30508
2006-09-20 03:59:25 +00:00
Chris Lattner
3057944738 Legalize is no longer limited to cleverness with just constant shift amounts.
Allow it to be clever when possible and fall back to the gross code when needed.

This allows us to compile:

long long foo1(long long X, int C) {
  return X << (C|32);
}
long long foo2(long long X, int C) {
  return X << (C&~32);
}

to:
_foo1:
        rlwinm r2, r5, 0, 27, 31
        slw r3, r4, r2
        li r4, 0
        blr


        .globl  _foo2
        .align  4
_foo2:
        rlwinm r2, r5, 0, 27, 25
        subfic r5, r2, 32
        slw r3, r3, r2
        srw r5, r4, r5
        or r3, r3, r5
        slw r4, r4, r2
        blr

instead of:

_foo1:
        ori r2, r5, 32
        subfic r5, r2, 32
        addi r6, r2, -32
        srw r5, r4, r5
        slw r3, r3, r2
        slw r6, r4, r6
        or r3, r3, r5
        slw r4, r4, r2
        or r3, r3, r6
        blr


        .globl  _foo2
        .align  4
_foo2:
        rlwinm r2, r5, 0, 27, 25
        subfic r5, r2, 32
        addi r6, r2, -32
        srw r5, r4, r5
        slw r3, r3, r2
        slw r6, r4, r6
        or r3, r3, r5
        slw r4, r4, r2
        or r3, r3, r6
        blr

llvm-svn: 30507
2006-09-20 03:47:40 +00:00
Chris Lattner
92c8924309 Fold the PPCISD shifts when presented with 0 inputs. This occurs for code
like:
long long test(long long X, int Y) {
  return 1ULL << Y;
}
long long test2(long long X, int Y) {
  return -1LL << Y;
}

which we used to compile to:

_test:
        li r2, 1
        subfic r3, r5, 32
        li r4, 0
        addi r6, r5, -32
        srw r3, r2, r3
        slw r4, r4, r5
        slw r6, r2, r6
        or r3, r4, r3
        slw r4, r2, r5
        or r3, r3, r6
        blr
_test2:
        li r2, -1
        subfic r3, r5, 32
        addi r6, r5, -32
        srw r3, r2, r3
        slw r4, r2, r5
        slw r2, r2, r6
        or r3, r4, r3
        or r3, r3, r2
        blr

Now we produce:

_test:
        li r2, 1
        addi r3, r5, -32
        subfic r4, r5, 32
        slw r3, r2, r3
        srw r4, r2, r4
        or r3, r4, r3
        slw r4, r2, r5
        blr
_test2:
        li r2, -1
        subfic r3, r5, 32
        addi r6, r5, -32
        srw r3, r2, r3
        slw r4, r2, r5
        slw r2, r2, r6
        or r3, r4, r3
        or r3, r3, r2
        blr

llvm-svn: 30479
2006-09-19 05:22:59 +00:00
Chris Lattner
ce85ffa396 add a note
llvm-svn: 30377
2006-09-14 20:56:30 +00:00
Evan Cheng
dd52a60189 Reflects MachineConstantPoolEntry changes.
llvm-svn: 30279
2006-09-12 21:04:05 +00:00
Nate Begeman
1109e4a222 Behold, more work on relocations. Things are looking pretty good now.
llvm-svn: 30240
2006-09-10 23:03:44 +00:00
Nate Begeman
2dfa13e74f First pass at supporting relocations. Relocations are written correctly to
the file now, however the relocated address is currently wrong.  Fixing
that will require some deep pondering.

llvm-svn: 30207
2006-09-08 22:42:09 +00:00
Jim Laskey
8cbf601f06 Missing tab
llvm-svn: 30188
2006-09-08 13:06:56 +00:00
Nate Begeman
bb053826f9 We actually do support object file writing, so don't return true (error)
llvm-svn: 30173
2006-09-08 03:42:15 +00:00