RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-28 14:32:51 +01:00
Code Issues Projects Releases Wiki Activity
37,482 Commits 4 Branches 5 Tags 704 MiB
c9ecee85c4
Commit Graph

37482 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Dale Johannesen
c9ecee85c4 There is no "-mattr=+sse1" flag; fix test for non-x86 hosts. 
llvm-svn: 48156
 2008-03-10 17:13:37 +00:00
Dale Johannesen
2bbe0d95cf Use uint64_t not unsigned long long. 
llvm-svn: 48154
 2008-03-10 17:05:01 +00:00
Scott Michel
38f8a1043a Integer comparison tests for CellSPU. 
llvm-svn: 48152
 2008-03-10 16:58:52 +00:00
Duncan Sands
1a76dafb41 Fix formatting. 
llvm-svn: 48151
 2008-03-10 16:38:37 +00:00
Gordon Henriksen
2bedc8476d Refresh Makefile.ocaml in objdir if it is modified in srcdir. 
Patch by Erick Tryzelaar!

llvm-svn: 48150
 2008-03-10 16:15:32 +00:00
Gordon Henriksen
d42b23a2d9 Refresh Makefile.ocaml in objdir if it is modified in srcdir. 
Patch by Erick Tryzelaar!

llvm-svn: 48149
 2008-03-10 15:58:40 +00:00
Gordon Henriksen
254e583d41 Regenerate. 
llvm-svn: 48148
 2008-03-10 15:49:38 +00:00
Gordon Henriksen
7af7f7f186 Adding ocamldoc generation. 
Patch by Erick Tryzelaar.

llvm-svn: 48147
 2008-03-10 15:49:16 +00:00
Gordon Henriksen
a6d10e21f7 Formatting improvements. 
llvm-svn: 48146
 2008-03-10 15:47:03 +00:00
Scott Michel
bb8e8fca47 Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC's 
return ValueType can depend its operands' ValueType.

This is a cosmetic change, no functionality impacted.

llvm-svn: 48145
 2008-03-10 15:42:14 +00:00
Nicolas Geoffray
e3381f0f1f Add description of individual bits in CR. This fix PR1765. 
llvm-svn: 48143
 2008-03-10 14:12:10 +00:00
Bill Wendling
91ff268a77 Minor cleanup. No functionality change. 
llvm-svn: 48142
 2008-03-10 08:13:01 +00:00
Evan Cheng
02b66c3a32 - Fix a subtle bug in RemoveCopyByCommutingDef. ALR is the live range where the source is defined; BLR is the live range which is defined by the copy. 
If ALR and BLR overlaps and end of BLR extends beyond end of ALR, e.g.                                                                                                 
 A = or A, B                                                                                                                                                            
 ...                                                                                                                                                                    
 B = A                                                                                                                                                                  
 ...                                                                                                                                                                    
 C = A<kill>                                                                                                                                                            
 ...                                                                                                                                                                    
   = B                                                                                                                                                                  
                                                                                                                                                                        
then do not add kills of A to the newly created B interval.
- Also fix some kill info update bug.

llvm-svn: 48141
 2008-03-10 08:11:32 +00:00
Evan Cheng
554d2c443b Doh 
llvm-svn: 48140
 2008-03-10 07:59:01 +00:00
Tanya Lattner
8be5e14a70 Add nosubmit option to control what is sent back to the results server. 
Patch by Joachim Durchholz. Thanks!

llvm-svn: 48139
 2008-03-10 07:28:08 +00:00
Owen Anderson
6b69a8671e Move StrongPHIElimination after live interval analysis. This will make things happier down the road. 
llvm-svn: 48138
 2008-03-10 07:22:36 +00:00
Tanya Lattner
8ac346c316 Remove llvm-upgrade and update tests. 
llvm-svn: 48137
 2008-03-10 07:21:50 +00:00
Evan Cheng
3c0ddc999f Avoid creating BUILD_VECTOR of all zero elements of "non-normalized" type (e.g. v8i16 on x86) after legalizer. Instruction selection does not expect to see them. In all likelihood this can only be an issue in a bugpoint reduced test case. 
llvm-svn: 48136
 2008-03-10 07:19:13 +00:00
Chris Lattner
95a37b6592 remove an execution test. 
llvm-svn: 48135
 2008-03-10 06:53:14 +00:00
Chris Lattner
689667aced switch from hard coded g++/as tools to the ones detected from 
the build system.  Patch by Joachim Durchholz  for PR2121

llvm-svn: 48134
 2008-03-10 06:52:10 +00:00
Chris Lattner
ee2fc96a32 Fix a typo 
llvm-svn: 48133
 2008-03-10 06:49:40 +00:00
Chris Lattner
1f7a88ce5f Fix PR2120 by changing the replacement order to change compile_cxx 
before compile_c.  Patch by Joachim Durchholz!

llvm-svn: 48132
 2008-03-10 06:45:35 +00:00
Christopher Lamb
32e5ce3d96 Allow insert_subreg into implicit, target-specific values. 
Change insert/extract subreg instructions to be able to be used in TableGen patterns.
Use the above features to reimplement an x86-64 pseudo instruction as a pattern.

llvm-svn: 48130
 2008-03-10 06:12:08 +00:00
Nick Lewycky
fac0f67198 Update the .cvs files to match today's asm syntax change. 
llvm-svn: 48128
 2008-03-10 05:01:34 +00:00
Christopher Lamb
c1e184122a Revert accidentally committed local changes. 
llvm-svn: 48126
 2008-03-10 04:16:09 +00:00
Christopher Lamb
3d7bb6ec01 Add support in TableGen for unknown operands that infer their type from the pattern their used in. This will be used to allow insert/extract subreg patterns in .td files! 
llvm-svn: 48125
 2008-03-10 04:13:41 +00:00
Nick Lewycky
5dd879d5b5 Turn unwind_to into "unwinds to". 
llvm-svn: 48123
 2008-03-10 02:20:00 +00:00
Dale Johannesen
e6b0009792 Increase ISD::ParamFlags to 64 bits. Increase the ByValSize 
field to 32 bits, thus enabling correct handling of ByVal
structs bigger than 0x1ffff.  Abstract interface a bit.
Fixes gcc.c-torture/execute/pr23135.c and 
gcc.c-torture/execute/pr28982b.c in gcc testsuite (were ICE'ing
on ppc32, quietly producing wrong code on x86-32.)

llvm-svn: 48122
 2008-03-10 02:17:22 +00:00
Anton Korobeynikov
72e4cbe457 This works on x86_64 
llvm-svn: 48121
 2008-03-09 22:24:03 +00:00
Chris Lattner
4a5abdbe3f Darwin PPC64 indirect call target goes in X12, not R12. This fixes these 
two regression tests:
test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert.ll
test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert2.ll

llvm-svn: 48120
 2008-03-09 20:49:33 +00:00
Chris Lattner
23ee644c71 cell really does support cross-regclass moves, because R3 is in lots of different regclasses, and the code is not consistent when it comes to value tracking. 
llvm-svn: 48119
 2008-03-09 20:31:11 +00:00
Chris Lattner
9185c43c7d make sure ar.pfs is in a register class, this fixes test/CodeGen/IA64/ret-0.ll 
llvm-svn: 48118
 2008-03-09 20:12:44 +00:00
Chris Lattner
9d93efcfbd remove an extraneous (and ugly) default argument, thanks Duncan. 
llvm-svn: 48117
 2008-03-09 20:04:36 +00:00
Evan Cheng
53424806b1 Fix RUN line. 
llvm-svn: 48116
 2008-03-09 19:55:22 +00:00
Ted Kremenek
b05e945be4 Fix some compilation errors on msvc: 
- "Redefinition of I" (iterator masks previous definition)
- include missing header file

Patch by Argiris Kirtzidis!

llvm-svn: 48115
 2008-03-09 18:32:50 +00:00
Nick Lewycky
efac6a28b4 And again. 
llvm-svn: 48112
 2008-03-09 17:13:05 +00:00
Nick Lewycky
dd4885aa80 Braces belong here. No functionality change. 
llvm-svn: 48111
 2008-03-09 17:11:18 +00:00
Anton Korobeynikov
aab81a09ef Temporary XFAIL the test, until I'll commit a fix 
llvm-svn: 48110
 2008-03-09 16:24:04 +00:00
Nick Lewycky
8626cfb86d SCCP also needs to be taught to follow unwind_to 
llvm-svn: 48109
 2008-03-09 09:44:38 +00:00
Chris Lattner
a85b0b591e fp_round's produced by getCopyFromParts should always be exact, because 
they are produced by calls (which are known exact) and by cross block copies
which are known to be produced by extends.

This improves:

define double @test2() {
	%tmp85 = call double asm sideeffect "fld0", "={st(0)}"()
	ret double %tmp85
}

from:

_test2:
	subl	$20, %esp
	# InlineAsm Start
	fld0
	# InlineAsm End
	fstpl	8(%esp)
	movsd	8(%esp), %xmm0
	movsd	%xmm0, (%esp)
	fldl	(%esp)
	addl	$20, %esp
	#FP_REG_KILL
	ret

to:

_test2:
	# InlineAsm Start
	fld0
	# InlineAsm End
	#FP_REG_KILL
	ret

by avoiding a f64 <-> f80 trip

llvm-svn: 48108
 2008-03-09 09:38:46 +00:00
Chris Lattner
b6bfedbcfd teach X86InstrInfo::copyRegToReg how to copy into ST(0) from 
an RFP register class.

Teach ScheduleDAG how to handle CopyToReg with different src/dst 
reg classes.

This allows us to compile trivial inline asms that expect stuff
on the top of x87-fp stack.

llvm-svn: 48107
 2008-03-09 09:15:31 +00:00
Nick Lewycky
1d6b50743f Don't eliminate blocks that are only reachable by unwind_to. 
llvm-svn: 48106
 2008-03-09 08:50:23 +00:00
Chris Lattner
8d0203478f Add ScheduleDAG support for copytoreg where the src/dst register are 
in different register classes, e.g. copy of ST(0) to RFP*.  This gets
some really trivial inline asm working that plops things on the top of
stack (PR879)

llvm-svn: 48105
 2008-03-09 08:49:15 +00:00
Chris Lattner
b29a963cf5 add some code to support cross-register class copying from 
RST -> RFP{32/64/80}.  We only handle ST(0) for now.

llvm-svn: 48104
 2008-03-09 08:46:19 +00:00
Tanya Lattner
9aa573954c Remove llvm-upgrade and update tests. 
llvm-svn: 48103
 2008-03-09 08:16:40 +00:00
Chris Lattner
53b86390b7 rearrange some code, no functionality change. 
llvm-svn: 48101
 2008-03-09 07:58:04 +00:00
Chris Lattner
4893d8fac2 fix 80 col violation 
llvm-svn: 48100
 2008-03-09 07:51:01 +00:00
Nick Lewycky
4732d3c9b7 Firstly, having a BranchInst isn't exclusive with having an unwind_to. 
Secondly, we have to check whether the branch is actually pointing to the block
with the unwind in it. We could have gotten here because of the unwind_to alone.

llvm-svn: 48099
 2008-03-09 07:50:37 +00:00
Chris Lattner
71189e9501 claim ST(x) registers are 80 bits, which is true. This doesn't affect 
codegen yet because these can't be spilled (they don't exist until after RA).

llvm-svn: 48098
 2008-03-09 07:49:01 +00:00
Chris Lattner
9e5cf6dc21 extend fp values with FP_EXTEND not FP_ROUND. 
llvm-svn: 48097
 2008-03-09 07:47:22 +00:00